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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

Large-area, low-cost via formation and metallization in multilayer thin film interconnection on Printed Wiring Boards (PWB)

Li, Weiping 05 1900 (has links)
No description available.
12

Component placement sequence optimization in printed circuit board assembly using genetic algorithms

Hardas, Chinmaya S. 11 December 2003 (has links)
Over the last two decades, the assembly of printed circuit boards (PCB) has generated a huge amount of industrial activity. One of the major developments in PCB assembly was introduction of surface mount technology (SMT). SMT has displaced through-hole technology as a primary means of assembling PCB over the last decade. It has also made it easy to automate PCB assembly process. The component placement machine is probably the most important piece of manufacturing equipment on a surface mount assembly line. It is used for placing components reliably and accurately enough to meet the throughput requirements in a cost-effective manner. Apart from the fact that it is the most expensive equipment on the PCB manufacturing line, it is also often the bottleneck. There are a quite a few areas for improvements on the machine, one of them being component placement sequencing. With the number of components being placed on a PCB ranging in hundreds, a placement sequence which requires near minimum motion of the placement head can help optimize the throughput rates. This research develops an application using genetic algorithm (GA) to solve the component placement sequencing problem for a single headed placement machine. Six different methods were employed. The effects of two parameters which are critical to the execution of a GA were explored at different levels. The results obtained show that the one of the methods performs significantly better than the others. Also, the application developed in this research can be modified in accordance to the problems or machines seen in the industry to optimize the throughput rates. / Graduation date: 2004
13

Setup reduction in PCB assembly : a group technology application using Genetic Algorithms

Capps, Carlos H. 03 December 1997 (has links)
For some decades, the assembly of printed circuit boards (PCB), had been thought to be an ordinary example of mass production systems. However, technological factors and competitive pressures have currently forced PCB manufacturers to deal with a very high mix, low volume production environment. In such an environment, setup changes happen very often, accounting for a large part of the production time. PCB assembly machines have a fixed number of component feeders which supply the components to be mounted. They can usually hold all the components for a specific board type in their feeder carrier but not for all board types in the production sequence. Therefore, the differences between boards in the sequence determines the number of component feeders which have to be replaced when changing board types. Consequently, for each PCB assembly line, production control of this process deals with two dominant problems: the determination for each manufacturing line of a mix resulting in larger similarity of boards and of a board sequence resulting in setup reduction. This has long been a difficult problem since as the number of boards and lines increase, the number of potential solutions increases exponentially. This research develops an approach for applying Genetic Algorithms (GA) to this problem. A mathematical model and a solution algorithm were developed for effectively determining the near-best set of printed circuit boards to be assigned to surface mount lines. The problem was formulated as a Linear Integer Programming model attempting to setup reduction and increase of machine utilization while considering manufacturing constraints. Three GA based heuristics were developed in order to search for a near optimal solution for the model. The effects of several crucial factors of GA on the performance of each heuristic for the problem were explored. The algorithm was then tested on two different problem structures, one with a known optimal solution and one with a real problem encountered in the industry. The results obtained show that the algorithm could be used by the industry to reduce setups and increase machine utilization in PCB assembly lines. / Graduation date: 1998
14

Diffusion Kinetics and Microstructure of Eutectic and Composite Solder/Copper Joints

Wu, Yujing 05 1900 (has links)
Sn/Pb solders are widely used by the electronics industry to provide both mechanical and electrical interconnections between electronic components and printed circuit boards. Solders with enhanced mechanical properties are required for high reliability for Surface Mount Technology (SMT) applications. One approach to improve the mechanical properties of solder is to add metallic or intermetallic particles to eutectic 63Sn/37Pb solder to form composite solders. Cu6Sn5 and Cu3Sn form and grow at the solder/copper substrate interface. The formation and growth of these intermetallics have been proposed as controlling mechanisms for solderability and reliability of solder/copper joints. The goal of this study was to investigate the diffusion kinetics and microstructures of six types of composite solder/copper joints.
15

Optimization of Printed Electronics

Yang, Shyuan January 2016 (has links)
Solution processed circuits are expected to be the main components to achieve low cost, large area, flexible electronics. However, the commercialization of solution processed flexible electronics face several challenges. The passive component such as capacitors are limited in frequency range and operating voltage. The active component such as transistors suffer from low mobility ultimately leading to limited current-carrying capacity. Just as in traditional silicon technology, the fabrication process and material choices significantly impact the performance of the fabricated devices. My thesis focuses on the optimization of the performance of printed capacitors and transistors through investigation of several aspects of the device structure and fabrication process. The first part of this work focuses on the optimization of printed nanoparticle/polymer composite capacitors. Thin film metal oxide nanoparticle/polymer composites have enormous potential to achieve printable high-k dielectrics. The combination of high-k ceramic nanoparticle and polymer enables room temperature deposition of high dielectric constant film without the need of high temperature sintering process. The polymer matrix host fills the packing voids left behind by the nanoparticles resulting to higher effective dielectric permittivity as a system and suppresses surface states leading to reduced dielectric loss. Such composite systems have been employed in a number of flexible electronic applications such as the dielectrics in capacitors and thin film transistors. One of the most important properties of thin film capacitors is the breakdown field. In a typical capacitor system, the breakdown process leads to catastrophic failure that destroys the capacitor; however, in a nanoparticle/polymer composite system with self-healing property, the point of breakdown is not well-defined. The breakdown of the dielectric or electrodes in the system limits the leakage observed. It is possible, however, to define a voltage/field tolerance. Field tolerance is defined as the highest practical field at which the device stays operational with low failure rate by qualifying the devices with defined leakage current density. In my work, the optimization of the field tolerance of (Ba,Sr)TiO₃ (BST)/parylene-C composite capacitors is achieved by studying the influence of the electromigration parameter on leakage and field strength through the inherit asymmetrical structure of the fabricated capacitors. One approach to creating these composites is to use a spin-coated nanoparticle film together with vapor deposited polymers, which can yield high performance, but also forms a structurally asymmetric device. The performance of a nanoparticle BST/parylene-C composite capacitor is compared to that of a nanoparticle BST capacitor without the polymer layer under both directions of bias. The composite device shows a five orders of magnitude improvement in the leakage current under positive bias of the bottom electrode relative to the pure-particle device, and four orders of magnitude improvement when the top electrode is positively biased. The voltage tolerance of the device is also improved, and it is asymmetric (44 V vs. 28 V in bottom and top positive bias, respectively). This study demonstrates the advantage of this class of composite device construction, but also shows that proper application of the device bias in this type of asymmetrical system can yield an additional benefit. The dependence of the field tolerance of nanoparticle/polymer composite capacitors on the electromigration parameter of the electrodes is investigated using the symmetrical dielectric system. The breakdown is suppressed by selecting the polarity used in nanoparticle (Ba,Sr)TiO₃/parylene-C composite film-based capacitors. Metals including gold, silver, copper, chromium, and aluminum with comparable surface conditions were examined as the electrodes. The asymmetric silver, aluminum, gold, copper, and chromium electrode devices show a 64 %, 29 %, 28 %, 17 %, 33 %, improvement in the effective maximum operating field, respectively, when comparing bias polarity. The field at which filament formation is observed shows a clear dependence on the electromigration properties of the electrode material and demonstrates that use of electromigration resistant metal electrodes offers an additional route to improving the performance of capacitors using this nanoparticle/polymer composite architecture. The second part of my thesis focuses on the novel pneumatic printing process that enables manipulation of the crystal growth of the organic semiconductors to achieve oriented crystal with high mobility. Small molecule organic semiconductors are attracting immense attention as the active material for the large-area flexible electronics due to their solution processability, mechanical flexibility, and potential for high performance. However, the ability to rapidly pattern and deposit multiple materials and control the thin-film morphology are significant challenges facing industrial scale production. A novel and simple pneumatic nozzle printing approach is developed to control the crystallization of organic thin-films and deposit multiple materials with wide range of viscosity including on the same substrate. Pneumatic printing uses capillary action between the nozzle and substrate combined with control of air pressure to dispense the solution from a dispense tip with a reservoir. Orientation and size of the crystals is controlled by tuning the printing direction, speed, and the temperature of the substrate. The main advantages of pneumatic printing technique are 1) simple setup and process, 2) multi-material layered deposition applicable to wide range of solution viscosity, 3) control over crystal growth. The manipulation of crystal growth will be discussed in the next chapter. This method for performance optimization and patterning has great potential for advancing printed electronics. The dependence of the mobility of printed thin film 6,13-bis(triisopropylsilylethynyl) pentacene [TIPS-pentacene] and C8-BTBT on printing conditions is investigated, and the result indicates that the formation of well-ordered crystals occurs at an optimal head translation speed. A maximum mobility of 0.75 cm²/(Vs) is achieved with 0.3 mm/s printing speed and 1.3 cm²/(Vs) with 0.3 mm/s printing speed at 50C for TIPS-pentacene and C8-BTBT respectively. In summary, pneumatic printing technique can be an attractive route to industrial scale large area flexible electronics fabrication.

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