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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Implementation of a Program Address Generator in a DSP processor / Implementering av en Programadress generator i en DSP processor

Waltersson, Roland January 2003 (has links)
<p>The purpose of this thesis is to construct a"Program Address Generator"(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the program control unit, and should consist of the following units: </p><p>A system stack for storing jump and loop information. A program counter, a status register, a stack pointer, an operating mode register and two registers called loop address and loop counter register, to support hardware loops. </p><p>The PAG handles the fetch stage of the processor pipeline, and should handle instructions such as the jump, subroutine jump, return from subroutine/interrupt and loop instructions, among others. </p><p>The PAG was successfully designed, and its function verified through extensive tests, where common combinations of ASM instructions were tested. Files for automated testing was created, to support easy testing if only small changes are applied to the PAG.</p>
2

Implementation of a Program Address Generator in a DSP processor / Implementering av en Programadress generator i en DSP processor

Waltersson, Roland January 2003 (has links)
The purpose of this thesis is to construct a"Program Address Generator"(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the program control unit, and should consist of the following units: A system stack for storing jump and loop information. A program counter, a status register, a stack pointer, an operating mode register and two registers called loop address and loop counter register, to support hardware loops. The PAG handles the fetch stage of the processor pipeline, and should handle instructions such as the jump, subroutine jump, return from subroutine/interrupt and loop instructions, among others. The PAG was successfully designed, and its function verified through extensive tests, where common combinations of ASM instructions were tested. Files for automated testing was created, to support easy testing if only small changes are applied to the PAG.
3

The Effect of Computer-Adaptive Control (Remediation) on Achievement and Time on Task in Foreign Language Learning

Bachelder, Leslie Ricks 26 June 2007 (has links) (PDF)
Technology has provided the means for the creation of many tools to facilitate the teaching and learning of foreign languages. These tools include computer programs designed to aid language learning by providing various levels of control to the language learner. This control allows the learner to make decisions regarding some or all of the elements of a program such as the pace, sequence, and content to name but a few. Because the amount of learner control can be varied, many research efforts have sought to determine the optimal level of control for learning. These efforts have produced mixed results, with some research suggesting that learners perform better with less control while other findings suggest the opposite. The purpose of this research was to investigate the use of remediation, a computer-adaptive control, in Swahili 101 university level courses and its effect on achievement and time. Participants included Swahili language learners from two universities, three colleges, and one student not affiliated with any school. The study required that participants complete a pretest, a background survey, the Swahili 101 online lesson materials, and an opinion survey. “Gate pages," or webpage-based assessments, were used throughout the online course to assess participant progress. The participants were randomly assigned to control and experimental groups. Those in the control group completed the online component at their own discretion, working through assigned tasks with review as desired. Those in the experimental group were required to obtain a minimum score on each lesson's gate page in order to advance in the lesson and thus in the course. If that score was not met, then the software assigned a series of remediation or review pages. Scores from the gate pages and time spent on the gate pages were stored and analyzed for both groups. The results from this study suggest that language learners benefit from computer intervention and guidance (remediation). The participants in the experimental group learned more Swahili than the control group, despite spending the same amount of time on the gate pages as the control group. Therefore, remediation, as defined and implemented in this study, can increase language learning while at the same time not requiring the learners to significantly increase the initial time they spend responding to questions presented on the gate pages.
4

Technologie výroby frézováním na CNC strojích / Technology of productive milling on CNC machines

Trunda, Jiří January 2009 (has links)
Objective graduation theses, is determining and propound optimal alternate manufacturing section servant as base of electron microscope. As a production method is used chippy cutting on numerical controlled machine behind by the help of usage progressive cutting tools. To construction control program was use 3D CAD/CAM system of Solid Vision, Ltd. Corporation. Product working is complete project and procedure on manufacturing section, that is in finish well-founded technoeconomic evaluation.

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