Global ETD Search

21	Routing algorithms for field-programmable gate arrays Lee, Seokjin 28 August 2008 (has links) Not available / text Field programmable gate arrays
22	A reconfigurable post-silicon debug infrastructure for systems-on-chip Quinton, Bradley 11 1900 (has links) As the level of integrated circuit (IC) complexity continues to increase, the post-silicon validation stage is becoming a large component of the overall development cost. To address this, we propose a reconfigurable post-silicon debug infrastructure that enhances the post-silicon validation process by enabling the observation and control of signals that are internal to the manufactured device. The infrastructure is composed of dedicated programmable logic and programmable access networks. Our reconfigurable infrastructure enables not only the diagnoses of bugs; it also allows the detection and potential correction of errors in normal operation. In this thesis we describe the architecture, implementation and operation of our new infrastructure. Furthermore, we identify and address three key challenges arising from the implementation of this infrastructure. Our results demonstrate that it is possible to implement an effective reconfigurable post-silicon infrastructure that is able to observe and control circuits operating at full speed, with an area overhead of between 5% and 10% for many of our target ICs. Debug Programmable logic
23	The design of a hybrid microprocessor/binary decision programmable controller / Hudson, Robert Douglas. January 1984 (has links) No description available. Programmable controllers. Process control.
24	A new design of built-in self-testing programmable logic arrays with high fault coverage and low overhead / Treuer, Robert. January 1985 (has links) No description available. Programmable array logic.
25	The functional memory approach to the design of custom computing machines Halverson, Richard Peyton January 1994 (has links) Thesis (Ph. D.)--University of Hawaii at Manoa, 1994. / Includes bibliographical references (leaves 185-186). / Microfiche. / xviii, 186 leaves, bound ill. 29 cm Field programmable gate arrays
26	Built-in self test of configurable memory resources in field programmable gate arrays Milton, Daniel, January 2007 (has links) (PDF) Thesis (M.S.)--Auburn University, 2007. / Abstract. Vita. Includes bibliographic references (ℓ. 101-103) Field programmable gate arrays.
27	Routing algorithms for field-programmable gate arrays Lee, Seokjin, Wong, D. F., Fussell, Donald S., January 2003 (has links) (PDF) Thesis (Ph. D.)--University of Texas at Austin, 2003. / Supervisors: Martin D. F. Wong and Donald S. Fussell. Vita. Includes bibliographical references. Available also from UMI Company. Field programmable gate arrays.
28	Preemptive multitasking auf FPGA-Prozessoren : ein Betriebssystem für FPGA-Prozessoren / Simmler, Harald C. January 2001 (has links) Mannheim, Univ., Diss., 2001. Field programmable gate array
29	Multi-FPGA systems / Hauck, Scott. January 1995 (has links) Thesis (Ph. D.)--University of Washington, 1995. / Vita. Includes bibliographical references (p. [218]-230). Field programmable gate arrays.
30	Ein generisches Konzept zur Modellierung und Bewertung feldprogrammierbarer Architekturen Wolz, Frank. January 2004 (has links) (PDF) Würzburg, Univ., Diss., 2004. / Erscheinungsjahr auf Titelseite: 2003. Field programmable gate array

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