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Využití programovatelného logického automatu Siemens LOGO! při výuce automatizace a elektroniky na SŠ / Application of Programmable Logic Controller - Siemens LOGO! in high school education of automatization and electronicsKOŠÍČEK, František January 2012 (has links)
The content of the thesis is to familiarize students with module PLC Siemens LOGO! and its practical use in teaching courses in the subjects as automation, electro-nics and mechatronics at vocational secondary schools. The content is focused on the basic description of the development and graphical environment and its use in practical problems solving. In the practical part of the proposals there are worksheets for pupils with the design of pupils´ simple tasks. After studying this text and the compilation of practical problems, the student should be capable of independent operation with module PLC Siemens LOGO! and implementation of complex applications.
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Retention of Programmable Metallization Cells During Ionizing Radiation ExposureJanuary 2015 (has links)
abstract: Non-volatile memory (NVM) has become a staple in the everyday life of consumers. NVM manifests inside cell phones, laptops, and most recently, wearable tech such as smart watches. NAND Flash has been an excellent solution to conditions requiring fast, compact NVM. Current technology nodes are nearing the physical limits of scaling, preventing flash from improving. To combat the limitations of flash and to appease consumer demand for progressively faster and denser NVM, new technologies are needed. One possible candidate for the replacement of NAND Flash is programmable metallization cells (PMC). PMC are a type of resistive memory, meaning that they do not rely on charge storage to maintain a logic state. Depending on their application, it is possible that devices containing NVM will be exposed to harsh radiation environments. As part of the process for developing a novel memory technology, it is important to characterize the effects irradiation has on the functionality of the devices.
This thesis characterizes the effects that ionizing γ-ray irradiation has on the retention of the programmed resistive state of a PMC. The PMC devices tested used Ge30Se70 doped with Ag as the solid electrolyte layer and were fabricated by the thesis author in a Class 100 clean room. Individual device tiles were wire bonded into ceramic packages and tested in a biased and floating contact scenario.
The first scenario presented shows that PMC devices are capable of retaining their programmed state up to the maximum exposed total ionizing dose (TID) of 3.1 Mrad(Si). In this first scenario, the contacts of the PMC devices were left floating during exposure. The second scenario tested shows that the PMC devices are capable of retaining their state until the maximum TID of 10.1 Mrad(Si) was reached. The contacts in the second scenario were biased, with a 50 mV read voltage applied to the anode contact. Analysis of the results show that Ge30Se70 PMC are ionizing radiation tolerant and can retain a programmed state to a higher TID than NAND Flash memory. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2015
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Modeling and Simulation of the Programmable Metallization Cells (PMCs) and Diamond-Based Power DevicesJanuary 2017 (has links)
abstract: This PhD thesis consists of three main themes. The first part focusses on modeling of Silver (Ag)-Chalcogenide glass based resistive memory devices known as the Programmable Metallization Cell (PMC). The proposed models are examined with the Technology Computer Aided Design (TCAD) simulations. In order to find a relationship between electrochemistry and carrier-trap statistics in chalcogenide glass films, an analytical mapping for electron trapping is derived. Then, a physical-based model is proposed in order to explain the dynamic behavior of the photodoping mechanism in lateral PMCs. At the end, in order to extract the time constant of ChG materials, a method which enables us to determine the carriers’ mobility with and without the UV light exposure is proposed. In order to validate these models, the results of TCAD simulations using Silvaco ATLAS are also presented in the study, which show good agreement.
In the second theme of this dissertation, a new model is presented to predict single event transients in 1T-1R memory arrays as an inverter, where the PMC is modeled as a constant resistance while the OFF transistor is model as a diode in parallel to a capacitance. The model divides the output voltage transient response of an inverter into three time segments, where an ionizing particle striking through the drain–body junction of the OFF-state NMOS is represented as a photocurrent pulse. If this current source is large enough, the output voltage can drop to a negative voltage. In this model, the OFF-state NMOS is represented as the parallel combination of an ideal diode and the intrinsic capacitance of the drain–body junction, while a resistance represents an ON-state NMOS. The proposed model is verified by 3-D TCAD mixed-mode device simulations. In order to investigate the flexibility of the model, the effects of important parameters, such as ON-state PMOS resistance, doping concentration of p-region in the diode, and the photocurrent pulse are scrutinized.
The third theme of this dissertation develops various models together with TCAD simulations to model the behavior of different diamond-based devices, including PIN diodes and bipolar junction transistors (BJTs). Diamond is a very attractive material for contemporary power semiconductor devices because of its excellent material properties, such as high breakdown voltage and superior thermal conductivity compared to other materials. Collectively, this research project enhances the development of high power and high temperature electronics using diamond-based semiconductors. During the fabrication process of diamond-based devices, structural defects particularly threading dislocations (TDs), may affect the device electrical properties, and models were developed to account of such defects. Recognition of their behavior helps us understand and predict the performance of diamond-based devices. Here, the electrical conductance through TD sites is shown to be governed by the Poole-Frenkel emission (PFE) for the temperature (T) range of 323 K ˂ T ˂ 423 K. Analytical models were performed to fit with experimental data over the aforementioned temperature range. Next, the Silvaco Atlas tool, a drift-diffusion based TCAD commercial software, was used to model diamond-based BJTs. Here, some field plate methods are proposed in order to decrease the surface electric field. The models used in Atlas are modified to account for both hopping transport in the impurity bands associated with high activation energies for boron doped and phosphorus doped diamond. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017
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Cu-Silica Based Programmable Metallization Cell: Fabrication, Characterization and ApplicationsJanuary 2017 (has links)
abstract: The Programmable Metallization Cell (PMC) is a novel solid-state resistive switching technology. It has a simple metal-insulator-metal “MIM” structure with one metal being electrochemically active (Cu) and the other one being inert (Pt or W), an insulating film (silica) acts as solid electrolyte for ion transport is sandwiched between these two electrodes. PMC’s resistance can be altered by an external electrical stimulus. The change of resistance is attributed to the formation or dissolution of Cu metal filament(s) within the silica layer which is associated with electrochemical redox reactions and ion transportation. In this dissertation, a comprehensive study of microfabrication method and its impacts on performance of PMC device is demonstrated, gamma-ray total ionizing dose (TID) impacts on device reliability is investigated, and the materials properties of doped/undoped silica switching layers are illuminated by impedance spectroscopy (IS). Due to the inherent CMOS compatibility, Cu-silica PMCs have great potential to be adopted in many emerging technologies, such as non-volatile storage cells and selector cells in ultra-dense 3D crosspoint memories, as well as electronic synapses in brain-inspired neuromorphic computing. Cu-silica PMC device performance for these applications is also assessed in this dissertation. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2017
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Construção,modelagem e controle de um pêndulo invertido com CLP e software scadaSilva, Edilson Alfredo da [UNESP] 29 May 2013 (has links) (PDF)
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silva_ea_me_ilha.pdf: 1235273 bytes, checksum: 4f8072b9552a55466c24ba7961ecb337 (MD5) / O objetivo principal desta dissertação foi a construção de um pêndulo invertido de baixo custo, com partes de uma impressora matricial, para ser utilizado no estudo de sistemas de controle. Após esta construção, foi obtido um modelo matemático linearizado desse sistema. Também, com base em experimento, realizado no laboratório, incluindo a obtenção da resposta em frequência, foram determinadas as funções de transferência do sistema. Em seguida foram projetados controladores, considerando o vetor de estado disponível, utilizando-se técnica de realimentação dos estados. Após a simulação do sistema controlado no software Matlab, esse controlador foi implementado em um CLP e utilizado um software SCADA. Então, foram registrados os resultados experimentais desse sistema de controle no laboratório, os quais apresentaram boa correlação com os resultados obtidos nas simulações. Esse estudo pode ser útil para aplicações didáticas, pois apresenta baixo custo e emprega equipamento CLP e software SCADA, aplicados largamente na indústria / The main aim of this dissertation was to build a low cost inverted pendulum with parts of matricial printers, for the study of control systems. After that, a linear mathematical modeling of this systems was obtained. Then, based on experiments at the laboratory, incluing the frequency response, the transfer functions of the inverted pendulum were obtained. Considering ther transfer functions and supposing that the state vector is available, a controller was designed based on the pole placement control design method. The designed controller was implemented in a Programmable Logic Controller (PLC), using the software SCADA. This study can be useful in didatic applications, because the proposed procedure presents low cost and uses device (PLC) and software (SCADA) broadly used in industries
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DESENVOLVIMENTO DE UM EQUIPAMENTO PROGRAMÁVEL PARA MICRO E PEQUENA EMPRESA / DEVELOPMENT OF A PROGRAMMABLE EQUIPMENT FOR SMALL BUSINESSBandeira, Marco Aurelio Garcia 24 April 2005 (has links)
This essay has as main objective to present an alternative to CNC equipments for small business that need to increase the flexibility of the productive process with little capital as an investment. A bibliography review about the flexible system of production is presented with the necessary information for its development and a history of programmable systems for tool machines. Aiming to reach this objective, the research was developed in seven industries, of small business, located in the city of Santa Maria, RS. This research allowed to identify the difficulties that this industries face to turn its productive system flexible, and the problems from lack of flexibility. Based on this, a model of programmable coordinates table was developed, using parts and available supplies which are commercialized with a low cost, which the main objective is to test its working through a program developed to this purpose. / Este trabalho tem por objetivo apresentar uma alternativa a equipamentos CNC para as pequenas e micros empresas, que necessitam aumentar a flexibilidade de seu processo produtivo com pouco capital para investimento. Apresenta uma revisão bibliográfica sobre o sistema flexível de produção, as informações necessárias ao seu desenvolvimento e
um histórico dos sistemas programáveis para máquinas ferramenta. No trabalho de campo foram observados sete empresas industriais, de micro e pequeno porte, sediadas na cidade de Santa Maria, RS. A pesquisa de campo permitiu identificar as dificuldades que estas empresas encontram
em flexibilizar seu sistema produtivo, e os problemas advindos da falta de flexibilização. Para isso foi desenvolvido um modelo de mesa de coordenadas programável, utilizando peças e materiais disponíveis comercialmente à baixo custo, tendo como principal objetivo testar seu funcionamento por meio de programa desenvolvido para esse fim.
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Augmentation of a nano-satellite electronic power system using a field-programmable-gate-array.Cupido, Stephen William John January 2013 (has links)
Thesis is submitted in fulfilment of the requirements for the degree
Master of Technology: Electrical Engineering
in the Faculty of Engineering
at the Cape Peninsula University of Technology
2013 / The CubeSat standard has various engineering challenges due to its small size and surface area. The challenge is to incorporate a large amount of technology into a form factor no bigger than 10cm3. This research project investigates the space environment, solar cells, secondary sources of power, and Field-Programmable-Gate-Array (FPGA) technology in order to address the size, weight and power challenges presented by the CubeSat standard. As FPGAs have not yet been utilised in this particular sub-system as the main controller, this research investigates whether or not the implementation of an FPGA-based electronic power supply sub-system will optimise its functionality by overcoming these size weight and power challenges.
The SmartFusion FPGA was chosen due to its analogue front end which can reduce the number of peripheral components required by such complex systems. Various maximum power point tracking algorithms were studied and it was determined that the perturb-and-observe maximum power point tracking algorithm best suits the design constraints, as it only requires the measurement of either solar cell voltage or solar cell current, thus further decreasing the component count. The SmartFusion FPGA analogue compute engine allows for increased performance of the perturb-and-observe algorithm implemented on the microcontroller sub-system as it allows for the offloading of many repetitive calculations. A VHDL implementation of the pulse-width-modulator was developed in order to produce the various changes in duty cycle produced by the perturb-and-observe algorithm.
The aim of this research project was achieved through the development and testing of a nano-satellite power system prototype using the SmartFusion FPGA from Microsemi with a decreased number of peripheral circuits. Maximum power point was achieved in 347ms at worst case with a 55% decrease in power consumption from the estimated 330mW as indicated in the power budget. The SmartFusion FPGA consumes only a worst case of 148.93mW. It was found that the unique features of the SmartFusion FPGA do in fact address the size weight and power constraints of the CubeSat standard within this sub-system.
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IEC 61850-9-2 based sampled values and IEC 61850-8-1 Goose messages mapping on an FPGA platformNcube, Alexander Mandlenkosi January 2016 (has links)
Thesis (MTech (Electrical Engineering))--Cape Peninsula University of Technology, 2016. / Electricity substation monitoring and control systems have evolved over the years from simple systems capable of achieving minimalistic functions to autonomous, self-healing smart grid schemes (Farhangi, 2010). The migration of technology to networked smart grid systems was driven by the need for standardisation of communication networks, system configuration and also the reduction of system implementation costs and engineering time.
Before the introduction of a uniform communication standard, legacy (non-standardised) communication protocols, for example, the Distributed Network Protocol (DNP3) were used by Remote Terminal Units (RTUs) for information exchange (Luwaca, 2014). These communication protocols could not provide a standard naming convention or data semantics since the data/information was accessed using an address-based system. The implementation of automation systems based on legacy protocols and RTUs was expensive because of parallel copper wiring required to connect instrument transformers and circuit breakers to multiple RTUs for protection and monitoring functions (Iloh et al., 2014). Legacy systems refer to Supervisory Control and Data Acquisition (SCADA) systems implemented using RTUs and legacy communication protocols. Legacy systems tended to be vendor specific because devices from different vendors did not support the same communication protocol. These issues led to the introduction of the IEC 61850 standard. The IEC 61850 standard for “communication networks and systems in a substation” provides standardised naming convention, data semantics, standardised device configuration and also device interoperability and interchangeability in some instances. The IEC 61850 standard provides a solution to expensive parallel copper wiring and standardisation issues experienced with legacy protocols. In as much as the introduction of the IEC 61850 standard addresses problems experienced with legacy system there is still a need to provide inexpensive access to IEC 61850-compliant devices and effective knowledge transfer to facilitate implementation of automation systems based on this standard. The development of an IEC 61850-compliant device requires a specialised skillset and financial investment for research and industrialisation therefore only a few vendors manufacture these devices resulting in an increase in production and manufacturing costs. For this reason this research project develops VHDL modules for mapping IEC 61850-9-2 Sampled Value (SV) messages and IEC 61850-8-1 Generic Object Oriented Substation Event (GOOSE) messages on a Field Programmable Gate Array (FPGA) platform. Sampled values are used for transmitting current and voltage transformer (CT and VT) measurements to protection devices while GOOSE messages exchange information/commands between primary equipment (CT, VT and circuit breaker) and protection devices over an Ethernet network known as the process bus.
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Construção,modelagem e controle de um pêndulo invertido com CLP e software scada /Silva, Edilson Alfredo da. January 2013 (has links)
Orientador: Marcelo Carvalho Minhoto Teixeira / Coorientador: Jean Marcos de Souza Ribeiro / Banca: Jose Paulo Fernandes Garcia / Banca: Cristiano Quevedo Andrea / Resumo: O objetivo principal desta dissertação foi a construção de um pêndulo invertido de baixo custo, com partes de uma impressora matricial, para ser utilizado no estudo de sistemas de controle. Após esta construção, foi obtido um modelo matemático linearizado desse sistema. Também, com base em experimento, realizado no laboratório, incluindo a obtenção da resposta em frequência, foram determinadas as funções de transferência do sistema. Em seguida foram projetados controladores, considerando o vetor de estado disponível, utilizando-se técnica de realimentação dos estados. Após a simulação do sistema controlado no software Matlab, esse controlador foi implementado em um CLP e utilizado um software SCADA. Então, foram registrados os resultados experimentais desse sistema de controle no laboratório, os quais apresentaram boa correlação com os resultados obtidos nas simulações. Esse estudo pode ser útil para aplicações didáticas, pois apresenta baixo custo e emprega equipamento CLP e software SCADA, aplicados largamente na indústria / Abstract: The main aim of this dissertation was to build a low cost inverted pendulum with parts of matricial printers, for the study of control systems. After that, a linear mathematical modeling of this systems was obtained. Then, based on experiments at the laboratory, incluing the frequency response, the transfer functions of the inverted pendulum were obtained. Considering ther transfer functions and supposing that the state vector is available, a controller was designed based on the pole placement control design method. The designed controller was implemented in a Programmable Logic Controller (PLC), using the software SCADA. This study can be useful in didatic applications, because the proposed procedure presents low cost and uses device (PLC) and software (SCADA) broadly used in industries / Mestre
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Otimização de algoritmos de decodificação de códigos de bloco por conjuntos de informação visando sua implementação em hardwareGortan, Antonio 09 December 2011 (has links)
Este trabalho tem como finalidade realizar uma análise teórica dos processos envolvidos
na decodificação de códigos de bloco lineares por meio de conjuntos de informação
visando otimizar esses procedimentos para viabilizar sua implementação em hardware de forma eficiente através do uso de FPGAs (do inglês Field Programmable Gate Array). Em especial, quatro contribuições são apresentadas com essa finalidade: uma versão modificada do algorítimo de Dorsch, um conjunto de algoritmos para determinar as candidatas mais prováveis e dimensionar sua quantidade de acordo com o ganho de codificação desejado aproximando seu desempenho ao do decodificador de máxima verossimilhança, uma versão implementável em hardware do critério de parada BGW (das iniciais dos autores: Barros, Godoy e Wille) e a obtenção de critérios para o dimensionamento da quantidade de intervalos de quantização a utilizar. / The purpose of this work is to undertake a theoretical analysis of the processes involved in soft-decision decoding of linear block codes using the information set approach aiming at an efficient hardware implementation in FPGAs (Field Programmable
Gate Arrays). Accordingly, four contributions to this goal are presented: a
modified version of the Dorsch algorithm, a set of algorithms to determine the most
reliable candidates and to gauge their quantity according desired coding gain, approaching its performance to the maximum likelihood decoder, a hardware implementable
version of the BGW (from the authors initials: Barros, Godoy e Wille) stop rule and the attainment of design criteria for the number of quantization intervals to
apply.
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