The aim of this master´s thesis is an explanation of the problem of transport optical networks with Dense Wavelength Division Multiplexing. DWDM principle, properties and limit of transmission system. Focus of thesis is also specification properties of migration transmission system to higher speed 40G, 100G and in future to 400G. Part of thesis is outlined the basic division of multiplexing system, there are discussed the basic solutions of wavelength multiplexes CWDM and DWDM, focus for the effects of nonlinear phenomena and parasitic modulation FWM, SPM and XPM in modulation DP-QPSK and 16-QAM. In practicle part we will make measurement of properties of 10G and then experimental measurement parameters on 100G.

ITC/USA 2011 Conference Proceedings / The Forty-Seventh Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2011 / Bally's Las Vegas, Las Vegas, Nevada / The Central Test and Evaluation Investment Program (CTEIP) Integrated Network Enhanced Telemetry (iNET) program is currently testing networked telemetry transceivers (IP.TM-Tx/Rx) using the Internet Protocol (IP), for use in telemetry (TM) channels. A unique characteristic of networked telemetry channel is packet drops due to radio frequency (RF) signal dynamics, i.e., terrain, weather, aircraft attitude, manmade objects, etc.. One of the key measures of the IP.TMTx/ Rx is reliability is link availability (LA), and a key element of LA is time to resynchronize after RF link loss.

An experimental investigation of an M level (M = 16, 64 and 256) Quadrature Amplitude Modulation (QAM) transmission system suitable for video transmission is presented. The communication system is based on layered video coding and unequal error protection to make the video bitstream robust to channel errors. An implementation is described in which H.264 video is protected unequally by partitioning the compressed data into two layers of different visual importance. The partition scheme is based on a separation of the group of pictures (GoP) in the intra-coded frame (I-frame) and predictive coded frame (P frame). This partition scheme is then applied to split the H.264-coded video bitstream and is suitable for Constant Bit Rate (CBR) transmission. Unequal error protection is based on uniform and non-uniform M-QAM constellations in conjunction with different scenarios of splitting the transmitted symbol for protection of the more important information of the video data; different constellation arrangements are proposed and evaluated to increase the capacity of the high priority layer. The performance of the transmission system is evaluated under Additive White Gaussian Noise (AWGN) and Rayleigh fading conditions. Simulation results showed that in noisy channels the decoded video can be improved by assigning a larger portion of the video data to the enhancement layer in conjunction with non-uniform constellation arrangements; in better channel conditions the quality of the received video can be improved by assigning more bits in the high priority channel and using uniform constellations. The aforementioned varying conditions can make the video transmission more successful over error-prone channels. Further techniques were developed to combat various channel impairments by considering channel coding methods suitable for layered video coding applications. It is shown that a combination of non-uniform M-QAM and forward error correction (FEC) will yield a better performance. Additionally, antenna diversity techniques are examined and introduced to the transmission system that can offer a significant improvement in the quality of service of mobile video communication systems in environments that can be modelled by a Rayleigh fading channel.

In 2008, the European Digital Video Broadcasting (DVB) standardization committee issued the second generation of Digital Video Broadcasting-Terrestrial (DVB-T2) standard in order to enable the wide broadcasting of high definition and 3D TV programmes. DVB-T2 has adopted several new technologies to provide more robust reception compared to the first genaration standard. One important technology is the bit interleaved coded modulation (BICM) with doubled signal space diversity plus the usage of low-density parity check (LDPC) codes. Both techniques can be combined at the receiver side through an iterative process between the decoder and demapper in order to further increase the system performance. The object of my study was to design and prototype a DVB-T2 receiver which supports iterative process. The two main contributions to the demapper design are the proposal of a linear approximation of Euclidean distance computation and the derivation of a sub-region detection algorithm for the two-dimensional demapper. Both contributions allows the computational complexity of the demapper to be reduced for its hardware implementation. In order to enable iterative processing between the demapper and the decoder, we investigated the use of vertical shuffled Min-Sum LDPC decoding algorithm. A novel vertical shuffled iterative structure aiming at reducing the latency of iterative processing and the corresponding architecture of the decoder were proposed. The proposed demapper and decoder have been integrated in a real DVB-T2 demodulator and tested in order to validate the efficiency of the proposed architecture. The prototype of a simplified DVB-T2 transceiver has been implemented, in which the receiver supports both non-iterative process and iterative process. We published the first paper related to a DVB-T2 iterative receiver.

In this thesis, we investigate in detail, certain important problems in cryptography and coding theory. In the first part of this thesis, we discuss the number field sieve and compare the two ways in which the sieving step is implemented -one method using the line sieve and the other using the lattice sieve. We discuss why the lattice sieve performs better than the line sieve in the presence of large primes -this has not been attempted before. In the second part of this thesis, we design low-correlation CDMA sequences over the Quadrature Amplitude Modulation (QAM) alphabet. The sequences proposed in this thesis have the lowest value of the maximum correlation parameter as compared to any other family in the literature. In the third part of this thesis, we design large families of optimal two-dimensional optical orthogonal codes for optical CDMA. The size of these codes is larger than any other code in the literature.

[EN] The insatiable demand for bandwidth of communication on the part of end-users, linked to the lowering the price of the terminals and in telecommunication services have led to a spectacular growth of the wireless communications market in recent years. Those entities that are responsible, at the international level, of the technological standardization have known to guide this growth writing standards as LTE (Long Term Evolution), IEEE 802.11 (WiFi) and IEEE 802.16 (WiMax) or 3G networks or 4GPP. They all share a common denominator, for the improvement of the spectral efficiency, the use of MIMO technologies, which uses multiple antennas on transmitter and receiver, and the use of high modulation schemes as 256QAM, introduced in revision 12 of the standard 3GPP-LTE. Under this perspective of great gains in the spectral efficiency, it is not surprising that MIMO technology has been incorporated into the standards mentioned above. However, achieving these gains is not trivial, to the extent that the VLSI implementation of this technology has become a challenge. In this thesis has undertaken a comprehensive study of different MIMO detectors, studying those belonging to the two families that show best features for being implemented in VLSI technology: successive interference cancellation (VBLAST detector) and based on a search in tree (KBest detector). Although initially the benefits achieved by the seconds (KBest) are far superior to those of the first (VBLAST), the recent appearance in the specialized literature of the Successive Projections Algorithm (SPA) opens the door to the development of a new detector, belonging to the family of the detectors of Successive Interference Cancellations (SIC), which will be able to compete in performance with the KBest detectors. This work provides the necessary algorithmic keys that make viable and competitive the hardware implementation of the SPA algorithm. In particular, two mechanisms of control of repetitions have been developed: Simplified-ESPA (SESPA) and Table-ESPA (TESPA), and the mechanisms for obtaining hard and soft output, existing in the literature, have been adapted to this algorithm. It has designed the first VLSI architecture for the SPA algorithm, being highly flexible, in the sense that adapts to different conditions of transmission and complies with the latest published specifications in the WiMAX and LTE standards. The flexibility of the architecture allows you to select different configurations of antennas in transmission and reception, from 2x2 to 4x4, different modulation schemes from QPSK until 256QAM, controls the balance between transmission rate and the benefits BER/FER and offers the soft output and hard output decisions. Finally, with this architecture has been implemented the SESPA and TESPA detectors, with soft output and hard output, in FPGA and ASIC technology. These detectors have been evaluated and compared to the best published in the specialized literature, achieving a peak rate of 465 Mbps for the detector SESPA 4x4 256QAM, with an area of 3.83 mm2 with a 90 nm technology. The detectors implemented offer as added value, in addition to the high configurability, the ability to decode 256-QAM without increasing the area. This feature is highly competitive with the non-linear detectors based on KBest, which are very sensitive, in regard to decoding rate and area, with the selected modulation scheme. In addition, the detectors based on ESPA reach a FER performance (soft output) clearly competitive with KBest detectors, due to a higher quality of the LLR generated by the ESPA. The comparison with other flexible architectures selected shows that the SESPA and TESPA detectors offer the greater configurability of transmission parameters and the best balance between area, BER performance and detection rate. / [ES] La insaciable demanda de ancho de banda de comunicación por parte de los usuarios finales, unido al abaratamiento de los terminales y de los servicios de telecomunicación han provocado un crecimiento espectacular del mercado de las comunicaciones inalámbricas en estos últimos años. Las entidades responsables, a nivel internacional, de la estandarización tecnológica han sabido acompañar y guiar este crecimiento redactando normas como LTE (Long Term Evolution), IEEE 802.11 (WiFi) e IEEE 802.16 (WiMax) o las redes 3G o 4GPP. Todas ellas comparten como denominador común, para la mejora de la eficiencia espectral, el uso de las tecnologías MIMO, que utiliza múltiples antenas en emisor y receptor, y el uso de esquemas de modulación elevados como 256QAM, introducido en la revisión 12 del estándar 3GPP-LTE. Bajo esta perspectiva de grandes ganancias en la eficiencia espectral, no es de extrañar que la tecnología MIMO haya sido incorporada en los estándares mencionados anteriormente. No obstante, conseguir estas ganancias no es trivial, hasta el punto de que la implementación VLSI de esta tecnología se ha convertido en un reto. En esta tesis se ha realizado un estudio exhaustivo de diferentes detectores MIMO, fijando el punto de mira en aquellos pertenecientes a las dos familias que muestran mejores características para su implementación VLSI: cancelación sucesiva de interferencias (detector VBLAST) y basados en búsqueda en árbol (detector KBest). Aunque inicialmente las prestaciones alcanzadas por los segundos (KBest) son muy superiores a las de los primeros (VBLAST), la reciente aparición en la literatura especializada del algoritmo de proyecciones sucesivas (SPA) abre la puerta al desarrollo de un nuevo detector, que pueda competir en prestaciones con los detectores KBest. La tesis aporta las claves algorítmicas necesarias que hacen viable y competitiva la implementación hardware del algoritmo SPA. En particular, se han desarrollado dos mecanismos de control de repeticiones: Simplified-ESPA (SESPA) y Table-ESPA (TESPA), y se han adaptado los mecanismos de obtención de salidas hard output y soft output, existentes en la literatura, a este algoritmo. Se ha diseñado la primera arquitectura VLSI para el algoritmo SPA, siendo ésta altamente flexible, en el sentido de que se adapta a diferentes condiciones de transmisión y cumple con las últimas especificaciones publicadas en los estándares WiMAX y LTE. La flexibilidad de la arquitectura permite seleccionar diferentes configuraciones de antenas en transmisión y recepción, desde 2x2 hasta 4x4, diferentes esquemas de modulación desde QPSK hasta 256QAM, controla el balance entre tasa de transmisión y las prestaciones BER/FER y ofrece las decisiones soft output y hard output. Finalmente, con esta arquitectura se ha realizado la implementación de los detectores SESPA y TESPA, con salidas soft output y hard output, en los dispositivos FPGA y ASIC. Estos detectores han sido evaluados y comparados con los mejores publicados en la literatura especializada, consiguiendo la tasa de pico máxima de 465 Mbps para el detector SESPA 4x4 256QAM, en un área de 3.83 mm2 con una tecnología de 90 nm. Los detectores implementados ofrecen como valor añadido, además de la alta configurabilidad, la posibilidad de decodificar 256QAM sin incrementar el área. Esta característica es altamente competitiva con los detectores no lineales basados en KBest, que son muy sensibles, en cuanto a tasa de decodificación y área se refiere, con el esquema de modulación seleccionado. Además, los detectores basados en ESPA alcanzan unas prestaciones FER (soft output) claramente competitivas con los detectores KBest, debido a la mayor calidad del LLR generado por el ESPA. La comparación con otras arquitecturas flexibles seleccionadas demuestra que los detectores SESPA y TESPA ofrecen la mayor configurabilidad de parámetros de transmisión y el mejor equilibrio entre área, pr / [CAT] La insaciable demanda d'ample de banda de comunicació per part dels usuaris finals, unit a l'abaratiment dels terminals i dels servicis de telecomunicació han provocat un creixement espectacular del mercat de les comunicacions sense fils en aquests últims anys. Les entitats responsables, a nivell internacional, de l'estandardització tecnològica han sabut acompanyar i guiar aquest creixement redactant normes com LTE (Long Term Evolution), IEEE 802.11 (WiFi) i IEEE 802.16 (WiMax) o les xarxes 3G o 4GPP. Totes elles comparteixen com denominador comú, per a la millora de l'eficiència espectral, l'ús de les tecnologies MIMO, que utilitza múltiples antenes en emissor i receptor, i l'ús d'esquemes de modulació elevats com 256QAM, introduït en la revisió 12 de l'estàndard 3GPP-LTE. Baix esta perspectiva de grans guanys en l'eficiència espectral, no és d'estranyar que la tecnologia MIMO hi haja estat incorporada en els normatives mencionats anteriorment. No obstant això, aconseguir aquests guanys no és trivial, fins l'extrem que la implementació VLSI d'aquesta tecnologia s'ha convertit en un repte. En aquesta tesi s'ha realitzat un estudi exhaustiu de diferents detectors MIMO, fixant el punt de mira en aquells que pertanyen a les dos famílies que mostren millors característiques per a la seua implementació VLSI: cancel-lació successiva d'interferències (detector VBLAST) i els basats en recerca en arbre (detector KBest). Encara que inicialment les prestacions aconseguides pels segons (KBest) són molt superiors a les dels primers (VBLAST), la recent aparició en la literatura especialitzada de l'algoritme de projeccions successives (SPA) permet el desenvolupament d'un nou detector, que puga competir en prestacions amb els detectors KBest. Este treball aporta les claus algorítmiques necessàries que fan viable i competitiva la implementació hardware de l'algoritme SPA. En particular, s'han desenvolupat dos mecanismes de control de repeticions: Simplified-ESPA (SESPA) i Table-ESPA (TESPA), i s'han adaptat els mecanismes d'obtenció d'eixides hard-output i soft-output, existents en la literatura, a aquest algoritme. S'ha dissenyat la primera arquitectura VLSI per a l'algoritme SPA, sent aquesta altament flexible, en el sentit de que s'adapta a diferents condicions de transmissió i acompleix les últimes especificacions publicades en els estàndards WiMax i LTE. La flexibilitat de l'arquitectura permet seleccionar diferents configuracions d'antenes en transmissió i recepció, des de 2x2 fins 4x4, diferents esquemes de modulació des de QPSK fins 256QAM, controla el balanç entre taxa de transmissió i les prestacions BER/FER i ofereix les decisions hard output i soft output. Finalment, amb l'arquitectura proposta s'ha realitzat la implementació dels detectors SESPA i TESPA, amb eixides hard output i soft output, en els dispositius FPGA i en ASIC. Aquests detectors han segut valorats i comparats amb els millors publicats en la literatura especialitzada, i s'ha aconseguint la taxa de pic màxim de 465 Mbps per al detector SESPA 4x4 256QAM, dins una àrea de 3.83 mm2 en una tecnologia de 90 nm. Els detectors implementats ofereixen com a valor afegit, a més de l'alta configurabilitat, la possibilitat de decodificar 256QAM sense incrementar l'àrea. Esta característica és altament competitiva en els detectors no lineals basats en KBest, que són molt sensibles, en relació a taxa de decodificació i a l'àrea del circuit, a l'esquema de modulació seleccionada. A més a més, els detectors basats en ESPA aconsegueixen unes prestacions FER (soft output) clarament competitives amb els detectors KBEST, degut a la major qualitat del LLR generat per l'ESPA. La comparació amb altres arquitectures flexibles seleccionades demostra que els detectors SESPA i TESPA ofereixen una major configurabilitat de paràmetres de transmissió i un millor equilibri entre l'àrea del circuit, les prestacions BER i la taxa de dete / Marín-Roig Ramón, J. (2016). Implementación VLSI del algoritmo de proyecciones sucesivas para detección de sistemas MIMO [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/62164 / TESIS

This thesis describes a design of a simulation of transmission of digital information via communication system and equalization of communication function. The layout of communication channel with multiway transmission is described in following part. Next part is about hardware modulator which generate modulated signal which is transmitted via communication channel and after is sampled by A/D convertion card to computer, where is equalizated and demodulated in Simulink. In the last part of this thesis, there is proposal of the laboratory task and its sample solution.

An experimental investigation of an M level (M = 16, 64 and 256) Quadrature Amplitude Modulation (QAM) transmission system suitable for video transmission is presented. The communication system is based on layered video coding and unequal error protection to make the video bitstream robust to channel errors. An implementation is described in which H.264 video is protected unequally by partitioning the compressed data into two layers of different visual importance. The partition scheme is based on a separation of the group of pictures (GoP) in the intra-coded frame (I-frame) and predictive coded frame (P frame). This partition scheme is then applied to split the H.264-coded video bitstream and is suitable for Constant Bit Rate (CBR) transmission. Unequal error protection is based on uniform and non-uniform M-QAM constellations in conjunction with different scenarios of splitting the transmitted symbol for protection of the more important information of the video data; different constellation arrangements are proposed and evaluated to increase the capacity of the high priority layer. The performance of the transmission system is evaluated under Additive White Gaussian Noise (AWGN) and Rayleigh fading conditions. Simulation results showed that in noisy channels the decoded video can be improved by assigning a larger portion of the video data to the enhancement layer in conjunction with non-uniform constellation arrangements; in better channel conditions the quality of the received video can be improved by assigning more bits in the high priority channel and using uniform constellations. The aforementioned varying conditions can make the video transmission more successful over error-prone channels. Further techniques were developed to combat various channel impairments by considering channel coding methods suitable for layered video coding applications. It is shown that a combination of non-uniform M-QAM and forward error correction (FEC) will yield a better performance. Additionally, antenna diversity techniques are examined and introduced to the transmission system that can offer a significant improvement in the quality of service of mobile video communication systems in environments that can be modelled by a Rayleigh fading channel.

This doctoral thesis is focused on problems of modulators based on six-ports. It begins with description of current state of the art of six-ports used like modulators, their transfer functions and SIW technology. A design part of this thesis consists from experimental six-port based on substrate integrated waveguide (SIW) technology. There is presented step-by-step development of this six-port using this technology and also there is introduced micro-strip technology based six-port. Final design of six-ports and variable impedances were measured, the results are discussed and compared with expected ones in next chapters. Second part of this thesis deals with influences of internal parameters of six-ports to final signal transmission and derives theirs transfer functions for more than one reflection in structure. The computation results are compared with experimental measurements for fixed loads. With using of ideal loads sweeps, modulations with shaped input signals were calculated. For designed variables impedances, there was founded the optimal biasing points for demanded IQ diagram and discussed which from tested active circuit is suitable. In the last part there are shown results of experiment with these variable loads connected to both types of designed six-ports.

Les centres de données deviennent de plus en plus importants, allant de petites fermes de serveurs distribuées à des grandes fermes dédiées à des tâches spécifiques. La diffusion de services "dans le nuage" conduit à une augmentation incessante de la demande de trafic dans les centres de données. Dans cette thèse, nous étudions l'évolution des réseaux dans les centres de données et proposons des solutions à court et à long terme pour leur intra-connexion physique. Aujourd'hui, la croissance de la demande de trafic met en lumière la nécessité urgente d’interfaces à grande vitesse capables de faire face à la bande passante exigeant de nouvelles applications. Ainsi, à court terme, nous proposons de nouveaux transpondeurs optiques à haut débit, mais à faible coût, permettant la transmission de 200 Gb /s utilisant des schémas de modulation en intensité et à détection directe. Plusieurs types de modulations d’impulsions en amplitude avancées sont explorés, tout en augmentant la vitesse à des débits symboles allant jusqu’à 100 GBd. La génération électrique à haute vitesse est réalisé grâce à un nouveau convertisseur analogique-numérique intégré, capable de doubler les vitesses des entrées et de générer des signaux à plusieurs niveaux d’amplitude. Cependant, le trafic continuera sa croissance. Les centres de données actuels reposent sur plusieurs niveaux de commutateurs électroniques pour construire un réseau d'interconnexion capable de supporter une telle grande quantité de trafic. Dans une telle architecture, la croissance du trafic est directement liée à une augmentation du nombre des composants du réseau, y-compris les commutateurs avec plus de ports, les interfaces et les câbles. Le coût et la consommation d'énergie qui peut être attendus à l'avenir est intenable, ce qui appelle à une réévaluation du réseau. Par conséquent, nous présentons ensuite un nouveau concept fondé sur la commutation de "slots" optiques (Burst Optical Slot Switching, i.e. BOSS) dans lequel les serveurs sont connectés via des nœuds BOSS à travers des anneaux de fibres multiplexé en longueur d'onde et en temps, et organisés dans une topologie en tore. Au cours de cette thèse, nous étudions la mise en œuvre des nœuds BOSS; en particulier, la matrice de commutation et les transpondeurs optiques. L'élément principal au sein de la matrice de commutation est le bloqueur de slots, qui est capable d'effacer n’importe quel paquet (slot) sur n’importe quelle longueur d'onde en quelques nanosecondes seulement. D'une part, nous explorons l'utilisation d'amplificateurs optiques à semi-conducteurs comme portes optiques à utiliser dans le bloqueur des slots, et étudier leur cascade. D'autre part, nous développons un bloqueur de slots intégré monolithiquement capable de gérer jusqu'à seize longueurs d'onde avec la diversité de polarisation. Ensuite, nous présentons plusieurs architectures de transpondeur et nous étudions leur performance. La signalisation des transpondeurs doit répondre à deux exigences principales: le fonctionnement en mode paquet et la résistance au filtrage serré. D'abord, nous utilisons des transpondeurs élastiques qui utilisent des modulations Nyquist N-QAM, et qui adaptent le format de modulation en fonction du nombre de nœuds à traverser. Ensuite, nous proposons l'utilisation du multiplexage par répartition orthogonale de la fréquence en cohérence optique (CO-OFDM). Avec une structure de paquet inhérente et leur grande adaptabilité fréquentielle, nous démontrons que les transpondeurs CO-OFDM offrent une capacité plus élevée et une meilleure portée que leurs homologues Nyquist. Finalement, nous comparons notre solution BOSS avec la topologie Clos replié utilisée aujourd'hui. Nous montrons que notre architecture BOSS nécessite 400 fois moins de transpondeurs et de câbles que les réseaux de commutation électronique d'aujourd'hui, ce qui ouvre la voie à des centres de données hautement évolutifs et durables / Data centers are becoming increasingly important and ubiquitous, ranging from large server farms dedicated to various tasks such as data processing, computing, data storage or the combination thereof, to small distributed server farms. The spread of cloud services is driving a relentless increase of traffic demand in datacenters, which is doubling every 12 to 15 months. Along this thesis we study the evolution of data center networks and present short- and long-term solutions for their physical intra-connection. Today, rapidly-growing traffic in data centers spotlights the urgent need for high-speed low-cost interfaces capable to cope with hungry-bandwidth demanding new applications. Thereby, in the short-term we propose novel high-datarate low-cost optical transceivers enabling up to 200 Gb/s transmission using intensity-modulation and direct-detection schemes. Several advanced pulse amplitude modulation schemes are explored while increasing speeds towards record symbol-rates, as high as 100 GBd. High-speed electrical signaling is enabled by an integrated selector-power digital-to- analog converter, capable of doubling input baud-rates while outputting advance multi-level pulse amplitude modulations. Notwithstanding, data centers’ global traffic will continue increasing incessantly. Current datacenters rely on high-radix all-electronic Ethernet switches to build an interconnecting network capable to pave with such vast amount of traffic. In such architecture, traffic growth directly relates to an increase of networking components, including switches with higher port-count, interfaces and cables. Unsustainable cost and energy consumption that can be expected in the future calls for a network reassessment. Therefore, we subsequently present a novel concept for intra-datacenter networks called burst optical slot switching (BOSS); in which servers are connected via BOSS nodes through wavelength- and time-division multiplexed fiber rings organized in a Torus topology. Along this thesis we investigate on the implementation of BOSS nodes; in particular, the switching fabric and the optical transceivers. The main element within the switching fabric is the slot blocker, which is capable of erasing any packet of any wavelength in a nanosecond time-scale. On the one hand, we explore the use of semiconductor optical amplifiers as means of gating element to be used within the slot blocker and study their cascadability. On the other hand we develop a monolithically integrated slot blocker capable of handling up to sixteen wavelength channels with dual-polarization diversity. Then we present several transceiver architectures and study their performances. Transceivers’ signaling needs to fulfill two main requirements: packet-mode operation, i.e. being capable of recovering few microsecond –long bursts; and resiliency to tight filtering, which occurs when cascading many nodes (e.g. up to 100). First we build packet-mode Nyquist-pulse-shaped N-QAM transceivers, which adapt the modulation format as a function of the number of nodes to traverse. Later we propose the use of coherent-optical orthogonal frequency division multiplexing (CO-OFDM). With inherent packet structure and high spectral tailoring capabilities, we demonstrate that CO-OFDM-based transceivers offer higher capacity and enhanced reach than its Nyquist counterpart. Finally, we compare our BOSS solution to today’s Folded Clos topology, and show that our BOSS architecture requires x400 fewer transponders and cables than today’s electronic switching networks, which paves the way to highly scalable and sustainable datacenters