This thesis presents a real-time operating system hardware extension core which supports the integration of hardware accelerators into real-time system-on-chip designs as hardware tasks. The hardware extension core utilizes reconfigurable logic to manage synchronization events, data transfers, and hardware task control. A reduction in interrupt latency, frequency, and execution time provides performance and predictability improvements for real-time applications. Required communication between the CPU and hardware accelerators is also reduced significantly. Compared to a software implementation, synthetic benchmarks of common synchronization tasks show up to a 41% increase in synchronization performance. Analysis of a test case design for audio encoding and encryption using three hardware accelerators shows results of a 2.89x throughput improvement in comparison to the use of software device driver tasks. Overall, this design simplifies the integration of hardware accelerators into real-time system-on-chip designs while improving the performance and predictability of these systems.

People make mistakes. Software engineers are no exception to this fact. When software engineers make mistakes, these manifest in the form of buggy software - a major problem in today's industry. The existence of bugs is commonly detected using testing, the process of executing the software and checking if its behaviour complies with the specification. As limitations in time make testing of the entire software behaviour impracticable, testers need to make informed decisions on how to test the software to detect as many bugs as possible. In the realm of real-time systems (RTSs), software testing is made more difficult by non-deterministic factors such as interaction with the surrounding environment, (pseudo)parallelism, and timing requirements. Furthermore, RTS testing suffers from behaviour-altering perturbation from the instrumentation inserted in the system to keep track of test progress (i.e., probe effects). In our work, we analyse the main test criteria used for traditional software testing in order to see which of these scale to, and assist in, system-level testing of multi-tasking RTSs. We focus on one of these criteria, the all definition-use paths coverage criterion, as it highlights a central aspect of non-deterministic task interaction, and investigate what is specifically required for applying this criterion to testing of multi-tasking RTSs. Further, we examine the possibility of using execution replay for probe effect-free test monitoring. We evaluate this approach in real industrial settings by means of case studies. The contributions of this thesis are twofold: First, the use of structural test criteria in RTS system-level testing is facilitated by two different analysis methods. Second, the probe effect is handled by recording non-deterministic events during run-time, and by using this recording to create a monitorable deterministic replica of the first execution. By these contributions, this thesis shows how the non-determinism of multi-tasking RTSs can be handled during system-level testing.

In this thesis we propose a technique to preserve the temporal properties of realtime components during their integration and reuse. We propose a new concept of runnable virtual node which is a coarse-grained real-time component that provides functional and temporal isolation with respect to its environment. A virtual node’s interaction with the environment is bounded by both a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment.   The first major contribution of this thesis is the implementation of a Hierarchical Scheduling Framework (HSF) on an open source real-time operating system (FreeRTOS) with the emphasis of doing minimal changes to the underlying FreeRTOS kernel and keeping its API intact to support the temporal isolation between a numbers of applications, on a single processor. Temporal isolation between the components during runtime prevents failure propagation between different components.   The second contribution of the thesis is with respect to the integration of components, where we first illustrate how the concept of the runnable virtual node can be integrated in several component technologies and, secondly, we perform a proof-of-concept case study for the ProCom component technology where we demonstrate the runnable virtual node’s real-time properties for temporal isolations and reusability.   We have performed experimental evaluations on EVK1100 AVR based 32-bit micro-controller and have checked the system behaviour during heavy-load and over-load situations by visualizing execution traces in both hierarchical scheduling and virtual node contexts. The results for the case study demonstrate temporal error containment within a runnable virtual node as well as reuse of the node in a new environment without altering its temporal behaviour. / PROGRESS

This dissertation presents techniques to achieve predictable execution of coarse-grained software components and for preservation of temporal properties of components during their integration and reuse. The dissertation presents a novel concept runnable virtual node (RVN) which interaction with the environment is bounded both by a functional and a temporal interface, and the validity of its internal temporal behaviour is preserved when integrated with other components or when reused in a new environment. The realization of RVN exploits techniques for hierarchical scheduling to achieve temporal isolation, and the principles from component-based software-engineering to achieve functional isolation. The proof-of-concept case studies executed on a micro-controller demonstrate the preserving of real-time properties within software components for predictable integration and reusability in a new environment, in both hierarchical scheduling and RVN contexts. Further, a multi-resource server (MRS) is proposed and implemented to enable predictable execution when composing multiple real-time components on a COTS multicore platform. MRS uses resource reservation for both CPU-bandwidth and memory-bus bandwidth to bound the interferences between tasks running on the same core, as well as, between tasks running on different cores. The later could, without MRS, interfere with each other due to contention on a shared memory-bus and memory. The results indicated that MRS can be used to "encapsulate" legacy systems and to give them enough resources to fulfill their purpose. In the dissertation, the compositional schedulability analysis for MRS is also provided and an experimental study is performed to bring insight on the correlation between the server budgets. We believe that the proposed approaches enable a faster software integration and support legacy reuse and that this work transcend the boundaries of software engineering and real-time systems. / PPMSched / PROGRESS

Τα τελευταία χρόνια τα ενσωματωμένα συστήματα πραγματικού χρόνου χρησιμοποιούνται σε ολοένα μεγαλύτερη γκάμα εφαρμογών. Κινητά τηλέφωνα, συσκευές αναπαραγωγής ψηφιακών δίσκων, εκτυπωτές, ψηφιακές φωτογραφικές μηχανές, αποτελούν λίγα παραδείγματα συσκευών που χρησιμοποιούν την τεχνολογία των ενσωματωμένων συστημάτων. Στην παρούσα διπλωματική εργασία ερευνήθηκαν οι δυνατότητες αξιοποίησης του Real-Time Linux σε ενσωματωμένα συστήματα. Μελετήθηκε διεξοδικά ο πυρήνας του λειτουργικού συστήματος Linux και ο αλγόριθμος χρονοδρομολόγησης που χρησιμοποιεί. Αναζητήθηκαν τρόποι μετατροπής του Linux σε λειτουργικό σύστημα για συστήματα πραγματικού χρόνου. Για το σκοπό αυτό, μελετήθηκε η έννοια του πραγματικού χρόνου όσον αφορά την κατασκευαστική διάσταση του συστήματος και το πρόγραμμα της εφαρμογής. Μια κατηγορία συστημάτων παραγματικού χρόνου είναι τα λειτουργικά συστήματα με δυνατότητες πραγματικού χρόνου. Αυτά οργανώνουν και καθορίζουν την χρήση των πόρων των συστημάτων ώστε να είναι ιδανική για εφαρμογές πραγματικού χρόνου πέρα από το περιβάλλον για ανάπτυξη και εκτέλεση των προγραμμάτων που παρέχουν. Γίνεται αναφορά στην έννοια της πολυεπεξεργασίας (multiprocessing), της χρήσης δηλαδή δύο ή και παραπάνω κεντρικών μονάδων επεξεργασίας (CPU) σε ένα υπολογιστικό σύστημα. Λόγω της αύξησης της θερμοκρασίας στα ηλεκτρονικά κυκλώματα με την αύξηση των ταχυτήτων ρολογιού στις κεντρικές μονάδες επεξεργασίας και την μείωση του μεγέθους των ηλεκτρονικών, η ταχύτητα του ρολογιού αλλά και η μείωση του μεγέθους περιορίζονται ώστε να υπάρχει αντοχή στις θερμοκρασίες που αναπτύσσονται. Το γεγονός αυτό σε συνδυασμό με την ιδέα του multiprocessing οδήγησε στην ιδέα των πολλαπλών ανεξάρτητων πυρήνων ανά κεντρική μονάδα επεξεργασίας (multicore systems) για βελτίωση της αποδοτικότητας, ακόμα και των συστημάτων ευρείας κατανάλωσης. Η διαφορά των πολυπύρηνων (multicore) συστημάτων με τα multiprocessing συστήματα, έγκειται στην συνύπαρξη των πυρήνων σε ένα ολοκληρωμένο κύκλωμα (chip) αντί για πολλές κεντρικές μονάδες επεξεργασίας και η ομοιότητα τους, στο ότι ουσιαστικά τα multicore συστήματα εξομοιώνουν λειτουργίες πολυεπεξεργασμού. Πλεόν, πολλά ενσωματωμένα συστήματα διαθέτουν πολυπύρηνους επεξεργαστές καθιστώντας απαραίτητη την ανάπτυξη λειτουργικών συστημάτων πραγματικού χρόνου που να αξιοποιούν στο έπακρο τις δυνατότητες τους. Δοκιμάστηκε και αξιολογήθηκε η επέκταση ASMP-Linux που αποτελεί έναν τρόπο μετατροπής του Linux σε λειτουργικό σύστημα πραγματικού χρόνου. Το ASMP-Linux αξιοποιεί τις ικανότητες πολυεπεξεργασίας ενός συστήματος με τη δυνατότητα δημιουργίας διαμερισμάτων πραγματικού χρόνου σε κάθε στοιχείο επεξεργασίας. Αναπτύχθηκε εφαρμογή αξιολόγησης σε γλώσσα προγραμματισμού C. Τα αποτελέσματα μελετήθηκαν διεξοδικά μέσω γραφημάτων και εξαγωγής στατιστικών μέτρων όπως η μέση τιμή και η τυπική απόκλιση. Μελετήθηκε η περίπτωση χρήσης της εφαρμογής ελέγχου του Festo MecLab, που αναπτύχθηκε από τον διδακτορικό φοιτητή Γεώργιο Δούκα. Το Festo MecLab αποτελεί μια προσομοίωση γραμμής παραγωγής με σταθμούς στοίβαξης, μεταφοράς και χειρισμού. Η εφαρμογή ελέγχου εκτελέστηκε επιτυχώς στο λειτουργικό σύστημα πραγματικού χρόνου ASMP-Linux και περιγράφεται στο παράρτημα Α. Στα πλαίσια της διπλωματικής εργασίας εκτελέστηκε στο Τεχνολογικό Πανεπιστήμιο της Βιέννης μέσω του προγράμματος Erasmus project που αφορά την ανίχνευση και χρονοσφράγιση προγραμμάτων ενσωματωμένων συστημάτων. H τεχνική αναφορά του project παρατίθεται στο παράρτημα Β. / In recent years, embedded real time systems are used in an increasingly wider range of applications. Mobile phones, compact discs players, printers, digital cameras, are a few examples of devices using the technology of embedded systems. This thesis investigated the possibilities of Real-Time Linux in embedded systems. The kernel of the Linux operating system and its scheduling algorithm was studied in detail. Ways of making Linux a real time operating system were sought. For this purpose, the essence of real time on the construction aspect of the system and the program application was studied. A class of real time-systems is real time operating systems. They organize and determine the use of resources systems that are ideal for real-time applications over the development environment and implementation of programs. The concept of multiprocessing, ie the use of two or more central processing units (CPU) on a computer system was also studied. Due to the increasing temperatures in electronic circuits and the reducing size of electronics, a limit in the reducing size is set, in order to withstand high temperatures. This, coupled with the idea of multiprocessing led to the idea multiple independent cores per CPU (multicore systems) to improve efficiency, even that of large-scale consumption. The difference between multi-core and multiprocessing systems is the coexistence of cells in an integrated circuit (chip) instead of several CPU's and their similarity is that multicore systems implement multiprocessing functions. Moreover, many embedded systems have multi-core processors making it necessary to develop real-time operating systems to exploit their full capabilities. We tested and evaluated the ASMP-Linux patch, which is a way of converting Linux operating system in a real time operating system. The ASMP-Linux fully exploits the capabilities of a multiprocessing system by adding the ability to partition the operating system in real time partitions on each independent core/CPU. An assesment application was developed in the C programming language. The results have been studied extensively through graphs and statistical measures such as mean and standard deviation. We studied the use of a control application of the Festo MecLab, developed by the doctoral student George Doukas. The Festo MecLab is a production line simulation that implements functions such as stacking, transport and handling. The control application was executed successfully in the real-time operating system ASMP-Linux and is described in Annex A. As part of this thesis a project on the detection and timestamping programs of embedded systems was performed at the Technical University of Vienna via the Erasmus program. A technical report of the project is given in Annex B.

When designing real-time systems, we want to prove that they will satisfy given timing constraints at run time. The main objective of real-time scheduling theory is to analyze properties of mathematical models that capture the temporal behaviors of such systems. These models typically consist of a collection of computational tasks, each of which generates an infinite sequence of task activations. In this thesis we study different classes of models and their corresponding analysis problems. First, we consider models of mixed-criticality systems. The timing constraints of these systems state that all tasks must meet their deadlines for the run-time scenarios fulfilling certain assumptions, for example on execution times. For the other scenarios, only the most important tasks must meet their deadlines. We study both tasks with sporadic activation patterns and tasks with complicated activation patterns described by arbitrary directed graphs. We present sufficient schedulability tests, i.e., methods used to prove that a given collection of tasks will meet their timing constraints under a particular scheduling algorithm. Second, we consider models where tasks can lock mutually exclusive resources and have activation patterns described by directed cycle graphs. We present an optimal scheduling algorithm and an exact schedulability test. Third, we address a pair of longstanding open problems in real-time scheduling theory. These concern the computational complexity of deciding whether a collection of sporadic tasks are schedulable on a uniprocessor. We show that this decision problem is strongly coNP-complete in the general case. In the case where the asymptotic resource utilization of the tasks is bounded by a constant smaller than 1, we show that it is weakly coNP-complete.

Real-time systems require a-priori temporal guarantees. While most of the normal operation in such a system is modeled using time-driven, hard-deadline sporadic tasks, event-driven behavior is modeled using aperiodic jobs with soft or no deadlines. To provide good Quality-of- Service for aperiodic jobs in the presence of sporadic tasks, aperiodic servers were introduced. Aperiodic servers act as a sporadic task and reserve a quota periodically to serve aperiodic jobs. The use of aperiodic servers in systems with caches is unsafe because aperiodic servers do not take into account, the indirect cache-related preemption delays that the execution of aperiodic jobs might impose on the lower-priority sporadic tasks, thus jeopardizing their safety. To solve this problem, we propose an enhancement to the aperiodic server that we call a Cache Delay Server. Here, each lower-priority sporadic task is assigned a delay quota to accommodate the cache-related preemption delay imposed by the execution of aperiodic jobs. Aperiodic jobs are allowed to execute at their assigned server priority only when all the active lower-priority sporadic tasks have a sufficient delay quota to accommodate it. Simulation results demonstrate that a Cache Delay Server ensures the safety of sporadic tasks while providing acceptable Quality-of-Service for aperiodic jobs. We propose a Integer Linear Program based approach to calculate delay quotas for sporadic tasks within a task set where Cache Delay Servers have been pre-assigned. We then propose algorithms to determine Cache Delay Server characteristics for a given sporadic task set. Finally, we extend the Cache Delay Server concept to multi-core architectures and propose approaches to schedule aperiodic jobs on appropriate Cache Delay Servers. Simulation results demonstrate the effectiveness of all our proposed algorithms in improving aperiodic job response times while maintaining the safety of sporadic task execution.

Orientador: Takaaki Ohishi / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-21T06:33:46Z (GMT). No. of bitstreams: 1 LeoneFilho_MarcosdeAlmeida_D.pdf: 4843918 bytes, checksum: 9350da4d7c5f9bb7cb858c5d09a0d150 (MD5) Previous issue date: 2012 / Resumo: A principal contribuição desta tese é a proposta de uma metodologia juntamente com a implementação de um sistema de suporte à decisão para dar subsídio à programação diária de sistemas de potência. Basicamente, a metodologia implementada neste trabalho visa melhorar o perfil das tensões em uma rede de transmissão de energia elétrica através de um ajuste fino dos taps dos transformadores. Este processo de otimização dos taps é feito com a utilização de Algoritmos Genéticos de maneira que, ao final deste processo, seja obtido um conjunto de valores de taps que, se aplicados à rede de transmissão, tornará as tensões mais próximas de um mesmo nível de tensão pré-determinado. Além disto, a abordagem proposta não é somente capaz de analisar uma \fotografia" de carga do sistema, mas também é capaz de realizar uma análise diária (em intervalos horários) para melhorar o perfil de tensão durante um dia completo de operação. A metodologia proposta é avaliada inicialmente com os sistemas IEEE-30 barras e IEEE-118 barras para que, finalmente, fosse aplicada para o sistema interligado nacional (SIN) brasileiro. Além disto, um sistema de suporte à decisão foi implementado durante o desenvolvimento deste trabalho. Tal sistema poderia ser usado para proporcionar ao operador do sistema de transmissão meios de avaliar os fluxos da rede através de uma execução de análises de sensibilidade quanto às possíveis utuações de carga em tempo de operação e também avaliar cenários de contingências / Abstract: The main contribution of this thesis is the proposal of a new methodology together with the implementation of a decision support system for real-time transmission grid operation. Hence, a methodology for improving voltage pro- _le for power transmission systems is described in this thesis. Basically, it consists in tuning the transformers taps in a way that the buses voltages in the same area would stay around a pre-specified level. Genetic Algorithms are applied for this optimization process in a way that, at the end of this process, a set of taps values that can drive the power system's voltage closer to a desired voltage level (if applied to it) is obtained. Furthermore, the proposed approach is not only able to analyze a static \picture" of power load, but also to cope with the issue of programming the hourly daily tap strategy according to the variations of the daily load profile. The proposed methodology is first evaluated with the \IEEE-30-bus" and with the \IEEE-118-bus" test cases so that it could be finally applied to the Brazilian interconnected national power system. Besides, a decision support system was implemented during the progress of the work. Such system was designed in a way that it could be possibly used by a grid operator in order to evaluate load flows and also to develop many different studies by analyzing the system's sensitiveness to the load variations at real time operation and also by evaluating a variety of contingencies scenarios / Doutorado / Energia Eletrica / Doutor em Engenharia Elétrica

Orientador: Janito Vaqueiro Ferreira / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Mecânica / Made available in DSpace on 2018-08-20T09:38:04Z (GMT). No. of bitstreams: 1 GordilloCarrillo_CamiloAndres_M.pdf: 5104981 bytes, checksum: cd95669708a4fb537590b77509d111b9 (MD5) Previous issue date: 2012 / Resumo: O conceito de Hardware In the Loop (HIL) é bastante útil em indústrias automotivas e em indústrias espaciais, já que sistemas complexos são difíceis de se modelar. Este conceito proporciona uma grande confiabilidade aos resultados, diminui o risco de avaria dos equipamentos e dos usuários em seu funcionamento, como também uma diminuição do tempo no desenvolvimento de projetos. Tudo isto sem precisar de um orçamento elevado ou protótipos elaborados para realização de testes. Neste trabalho propõem-se duas estratégias para solucionar o problema do atraso (delay) apresentado pelo sinal de resposta nos sistemas HIL em tempo real, levando-se em conta a sequência de execução real dos processos, bem como também outros aspectos como dos sistemas de aquisição e atuação (inercia, limitações de hardware e software, tempo de amostragem). Os resultados obtidos através das estratégias propostas foram analisados e comparados com resultados numéricos em uma bancada experimental obtendo uma boa concordância eliminando o atraso na resposta / Abstract: The Hardware In the Loop (HIL) concept is useful in automotive and spaceship industries, because of the difficulty of modeling complex systems. This concept provides great reliability at the results, decrease the risk of damage to the equipment and to the user operation, as well as decreasing the time of projects development. All of this without requiring a high budget or developing prototypes for testing. This study propose a strategy to solve the delay problem presented by the response signal in real time HIL systems, considering a real execution sequence of the process, as well as other aspects such as in the acquisition and the actuation systems (inertia, hardware and software limitations, sample time). The results obtained through the proposed strategies was analyzed and compared with numerical results in a testing platform with excellent concordance eliminating the delay in the response / Mestrado / Mecanica dos Sólidos e Projeto Mecanico / Mestre em Engenharia Mecânica

An event monitor is a part of a real-time system that can be used to check if the system follows the specifications posed on its behavior. This dissertation covers an approach to event monitoring where such specifications (represented by time constraints) are represented by graphs. Not much work has previously been done on designing and implementing constraint graph-based event monitors. In this work, we focus on presenting an extensible design for such an event monitor. We also evaluate different data structure types (linked lists, dynamic arrays, and static arrays) that can be used for representing the constraint graphs internally. This is done by creating an event monitor implementation, and conducting a number of benchmarks where the time used by the monitor is measured. The result is presented in the form of a design specification and a summary of the benchmark results. Dynamic arrays are found to be the generally most efficient, but advantages and disadvantages of all the data structure types are discussed.