Jitter is a dominant factor contributing to a high bit error rate (BER) in high speed I/O circuitry, and it aggravates the quality of a clock signal from a phase-locked loop (PLL), subsequently impacting a given timing budget. The recent proliferation of systems-on-a-chip (SoCs) with help of technology scaling makes jitter measurement more challenging as the SoCs integrate more I/O circuitry and PLLs within a chip. Jitter has been, however, one of the most difficult parameters to measure accurately when validating the high speed serial I/O circuitry or PLLs, mostly due to its small value. External instruments with full-fledged high precision measurement hardware, along with comprehensive analysis tools, have been used for jitter measurement, but increased test cost from long test time, signal integrity, and human intervention prevent this approach from being used for high volume manufacturing testing. Built-in self-test (BIST) solutions have recently become attractive to overcome these drawbacks, but complicated analog circuit designs that are sensitive to ever increasing process variations, and associated complex analysis methods impede their adoption in the SoCs. This dissertation studies practical random jitter measurement methods that achieve measurement accuracy by exploiting a differential approach and make the proposed methods tester-friendly solutions for an automatic test equipment (ATE). We first propose a method of measuring the average value of the random jitter, rather than measuring the jitter at every clock cycle, that can be converted to the root-mean-square (RMS) value of the random jitter, which is the key indicator of the quantity of the random jitter. Then, we propose a simple but accurate delay measurement method which uses the proposed jitter measurement method for random jitter measurement when a reference signal, such as a golden PLL output in high speed I/O validation, is not available. The validity of the proposed random jitter measurement method is supported by measurement results from a test chip. The impact of substrate noise on the signal of interest is also shown with measurements using a test chip. To address the random jitter of a clock signal when the clock is operating in its functional mode, we demonstrate a novel method for random jitter measurement that explores the shmoo capability of a low-cost production tester without relying on any BIST circuitry. / text

Jitter is defined as timing uncertainties of digital signals at their intended ideal positions in time. While it undermines valuable clock budget and limits the maximum clock frequency in I/O circuitry, it is one of the most difficult parameters to measure accurately due to the small value and randomness. This thesis proposes a random jitter RMS measurement method using AND and OR operations, which targets BIST applications. This thesis is organized as follows. Chapter 1 introduces the motivation of the proposed work. It includes a comparison between two major approaches to jitter measurement. Chapter 2 explains the proposed random jitter estimation method in detail. Chapter 3 describes circuit implementations with design considerations. Chapter 4 demonstrates estimation results from circuit level simulation runs. Chapter 5 discusses the source of error in the jitter estimation and concludes. / text

<p>Random numbers are required for cryptographic applications such as IT security products, smart cards etc. Hardwarebased random number generators are widely employed. Cryptographic algorithms are implemented on FieldProgrammable Gate Arrays (FPGAs). In this work a True Random Number Generator (TRNG) employed for spaceapplication was designed, investigated and evaluated. Several cryptographic requirements has to be satisfied for therandom numbers. Two different noise sources was designed and implemented on the FPGA. The first design wasbased on ring oscillators as a noise source. The second design was based on astable oscillators developed on a separatehardware board and interfaced with the FPGA as another noise source. The main aim of the project was to analyse theimportant requirement of independent noise source on a physical level. Jitter from the oscillators being the source forthe randomness, was analysed on both the noise sources. The generated random sequences was finally subjected tostatistical tests.</p>

Random numbers are required for cryptographic applications such as IT security products, smart cards etc. Hardwarebased random number generators are widely employed. Cryptographic algorithms are implemented on FieldProgrammable Gate Arrays (FPGAs). In this work a True Random Number Generator (TRNG) employed for spaceapplication was designed, investigated and evaluated. Several cryptographic requirements has to be satisfied for therandom numbers. Two different noise sources was designed and implemented on the FPGA. The first design wasbased on ring oscillators as a noise source. The second design was based on astable oscillators developed on a separatehardware board and interfaced with the FPGA as another noise source. The main aim of the project was to analyse theimportant requirement of independent noise source on a physical level. Jitter from the oscillators being the source forthe randomness, was analysed on both the noise sources. The generated random sequences was finally subjected tostatistical tests.

Mobile cloud gaming (MCG) is an emerging concept which aims to deliver video games on-demand to users with the use of cloud technologies. Cloud technology allows the offloading of computation from a less powerful user device or thin client to more robust cloud servers to minimize power consumption and provide additional cloud services such as storage. MCG is therefore very helpful that can reduce the costs of expensive hardware, but the challenge is that it requires a high Quality of Service (QoS) in order to stream and play the games where the users have a high Quality of Experience (QoE). The goal of the study is to investigate how users' QoE is affected by network conditions while playing MCG and compare the results from a previous study. A testbed was made in order to conduct subjective tests where users are going to play Counter Strike: Global Offensive (CS: GO) on a smartphone using Steam Remote Play. The testbed consists of a router, tablet, smartphone, headset, Xbox controller, USB-C multi-port adapter and four different PC's. Participants on campus, both students and non-students, were invited to participate in the experiment. A total of 24 participants completed the tests; however, results from two participants were excluded due to software issues. There were 23 network conditions that was tested for each user and included factors such as round-trip time (RTT), packet losses, bursty jitter, random jitter or combinations of different factors. A multi-platform tool, ALTRUIST, was used to control the applications and facilitate the data collection from the devices and NetEm changed the network conditions. The results showed that the network condition [bj(rtt200i15)] had the highest mean opinion score (MOS) of the QoE of 4.5 for the users with 200 milliseconds of bursty jitter every 15 seconds. The worst network condition tested with the lowest QoE rating of 1.4 was network condition [rtt25pl12] that had 25 milliseconds of RTT and 12% packet losses. There were differences between the male and female participants where the MOS of the QoE results was significantly higher with up to 1.5 MOS QoE rating differences for the females compared to the males in network conditions with RTT with packet losses. However, the sample size was low with only 5 female participants compared to 18 male participants. The MOS of the QoE results separating play time under 10 hours per week and 10 or more hours per week showed no significant changes, where the largest QoE rating difference was 0.5 points. Network condition [rtt25pl12] and [rtt2pl35] had the largest differences in the MOS QoE ratings compared to the previous study, while both was not compared to the same corresponding network condition. The largest difference comparing the same network condition to the previous study was network condition [bj(rtt200i15)] with a difference of 1.1 points higher in the MOS QoE rating.