Current evidence suggests that thyroid hormones (THs) may impact development of the immune system. However, studies that explore the role of THs in immune development are limited, and the mechanisms leading to alterations in immune function are poorly understood. It is important to elucidate the role of THs in immune development given that many environmental contaminants have been shown to disrupt TH homeostasis and may also have negative impacts on the immune system. As such, the main goal of this study was to determine the long-term consequences of early life stage (ELS) hypothyroidism on immune function. To achieve this goal, it was first necessary to further characterize basic immune function in the selected model species, the fathead minnow (FHM, Pimephales promelas). Preliminary studies were conducted to describe the transcriptomic response to Yersinia ruckeri and adapt assays for the assessment of respiratory burst and phagocytic cell activity. To determine the long-term effects of ELS hypothyroidism, FHMs were exposed to the model thyroid suppressant propylthiouracil (PTU) from <1 to 30 days post hatch and reared under normal conditions. Upon reaching adulthood, ex vivo immune cell function and the in vivo immune response to Y. ruckeri were assessed. Fish exposed to PTU experienced significant alterations in gene networks associated with immune cell function as well as significant decreases in phagocytic cell activity. However, immune-related alterations at the molecular and cellular levels did not manifest themselves at higher levels of organization as ELS hypothyroidism did not affect any other immune-related endpoints, including pathogen resistance. To our knowledge, this is the first study to provide evidence that ELS hypothyroidism causes long-term effects on the immune system in fish.

京都大学 / 0048 / 新制・課程博士 / 博士(医学) / 甲第21014号 / 医博第4360号 / 新制||医||1028(附属図書館) / 京都大学大学院医学研究科医学専攻 / (主査)教授 武藤 学, 教授 木原 正博, 教授 森田 智視 / 学位規則第4条第1項該当 / Doctor of Medical Science / Kyoto University / DFAM

The purpose of this study is to analyze the behavior of a reversible two-cylinder refrigerant compressor manufactured by Bristol Compressor Incorporated. This compressor contains a specialized linkage that causes the compressor to transition from a two-cylinder compressor to a single-cylinder compressor when the direction of rotation of the crankshaft is reversed. The linkage accomplishes this by reducing the throw of one cylinder to zero. Of interest are the conditions to which this linkage is subjected when the direction of rotation is again reversed, causing the compressor to return to its two-cylinder functioning. When this reversal takes place, a collision occurs within the linkage. These repeated collisions are thought to be the cause of fatigue failure of the linkage in many of these compressors. To verify that this collision is the problem, an understanding of the stress state during the collision is needed. This thesis begins the work necessary to determine the dynamic stress state present within the system. A FORTRAN program was developed that modeled the kinematic behavior of the system under operating conditions. The program predicts the accelerations, velocities, positions, and internal forces present within the system during startup conditions. Also, a method has been developed to model rotary sliding contact between two cylindrical surfaces. This method is developed and investigated in hopes that it will facilitate the modeling of the behavior of the compressor linkage in a dynamic finite element analysis. / Master of Science

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This dissertation examines the Split Delivery Vehicle Routing Problem (SDVRP), a relaxed version of classical capacitated vehicle routing problem (CVRP) in which the demand of any client can be split among the vehicles that visit it. We study both scenarios of the SDVRP in this dissertation. For the SDVRP with a fixed number of the vehicles, we provide a Two-Stage algorithm. This approach is a cutting-plane based exact method called Two-Stage algorithm in which the SDVRP is decomposed into two stages of clustering and routing. At the first stage, an assignment problem is solved to obtain some clusters that cover all demand points and get the lower bound for the whole problem; at the second stage, the minimal travel distance of each cluster is calculated as a traditional Traveling Salesman Problem (TSP), and the upper bound is obtained. Adding the information obtained from the second stage as new cuts into the first stage, we solve the first one again. This procedure stops when there are no new cuts to be created from the second stage. Several valid inequalities have been developed for the first stage to increase the computational speed. A valid inequality is developed to completely solve the problem caused by the index of vehicles. Another strong valid inequality is created to provide a valid distance lower bound for each set of demand points. This algorithm can significantly outperform other exact approaches for the SDVRP in the literature. If the number of the vehicles in the SDVRP is a variable, we present a column generation based branch and price algorithm. First, a restricted master problem (RMP) is presented, which is composed of a finite set of feasible routes. Solving the linear relaxation of the RMP, values of dual variables are thus obtained and passed to the sub-problem, the pricing problem, to generate a new column to enter the base of the RMP and solve the new RMP again. This procedure repeats until the objective function value of the pricing problem is greater than or equal to zero (for minimum problem). In order to get the integer feasible (optimal) solution, a branch and bound algorithm is then performed. Since after branching, it is not guaranteed that the possible favorable column will appear in the master problem. Therefore, the column generation is performed again in each node after branching. The computational results indicate this approach is promising in solving the SDVRP in which the number of the vehicles is not fixed.

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It is perceived that Moore's Law will prevail at least for the next decade, with continuous advancements of processing technologies for very-large-scale integrated (VLSI) circuits. Nano technology is driving VLSI circuits in a path of greater transistor integration, faster clock frequency, and lower operation voltage. This has imposed a new challenge for delivering high- quality power to modern processors. Power management technology is critical for transferring the required high current in a highly efficient way, and accurately regulating the sub-1V voltage in very fast dynamic transient response conditions. Furthermore, the VRs are limited in a given area and the power density is important to save the precious real estate of the motherboard. Based on the power delivery path model, the analysis results show that as long as the bandwidth can reach around 350 kHz, the bulk capacitor of the VR can be completely eliminated, which means significant savings in cost and real estate. Analysis also indicates that 650kHz bandwidth can reduce the number of the decoupling capacitor from 230 to 50 for future microprocessor case. Beyond 650kHz, the reduction is not obvious any more due to the parasitic components along the power delivery path. Following the vision of high bandwidth, the VRs need to operate at much higher frequency than today's practice. Unfortunately, the multiphase buck converter cannot benefit from it due to the low efficiency at high switching frequency. The extreme duty is the bottleneck. The extreme duty cycle increases VR switching loss, reverse recovery loss, and conduction loss; therefore makes the 12V-input VR efficiency drop a good deal when compared with 5V-input VR efficiency. Two-stage approach is proposed in this dissertation to solve this issue. The analysis shows that the two-stage conversion has much better high frequency capability than the conventional single stage VRs. Based on today's commercial devices, 2-MHz is realized by the hardware and 350kHz bandwidth is achieved to eliminate the output bulk capacitors. Further improvement based on future devices and several proposed methods of reducing switching loss and body diode loss can push the switching frequency up to 4MHz while maintaining good efficiency. Such a high frequency makes the high bandwidth design (650kHz) feasible. Hence, the output capacitance can be significantly reduced to save cost and real estate. The two-stage concept is also effective in laptop computer and 48V DPS applications. It has been experimentally proved that two-stage VR is able to achieve higher switching frequency than single stage not only at full load condition but also at light load condition by the proposed ABVP and AFP concept based on two-stage configuration. These unique control strategies make the two-stage approach even more attractive. As the two-stage approach is applied to 48V DPS applications, such as telecommunication system and server systems, more efficient and higher power density power supply can be achieved while greatly cut down the cost. Therefore, after the two-stage approach is proposed, it has been widely adopted by the industry. In order to further reduce the output capacitance, the power architecture of computer needs to be modified. Based on two-stage approach, one possible solution is to move the second stage VR up to the OLGA board. Based on this structure, the parasitics can be dramatically reduced and the number of the cavity capacitor is reduced from 50 to 14. By reducing ESL of the capacitor, the output capacitance could be further reduced. After that and based on two-stage approach again, VR+LR structure is discussed, which provides the opportunity to reduce the output capacitance and integrate the power supply with CPU. The feasibility is studied in this dissertation from both power loss reduction and output capacitance reduction perspectives. Experimental results prove that LR can significantly reduce the voltage spike while minimizing the output capacitance. As a conclusion, the two-stage approach is a promising solution for powering future processors. It is widely effective in computer and communication systems. Far beyond that, it provides a feasible platform for new architectures to power the future microprocessors. / Ph. D.

...This handbook will not begin to cover all of the material that applies to stage management. It is intended as an introduction for the novice stage manager who will work primarily on shows with a short run, where the director is available for consultation if the show needs help. Since it is my belief that a stage manager must project a positive attitude at all times, remaining sensitive to the feelings and moods of the artists around him, I will refer to the 11 human factor 11 of stage management throughout this handbook... / Master of Fine Arts