• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 29
  • 22
  • 4
  • 3
  • 2
  • 2
  • 2
  • 1
  • 1
  • 1
  • 1
  • Tagged with
  • 74
  • 74
  • 35
  • 30
  • 30
  • 29
  • 29
  • 23
  • 16
  • 14
  • 12
  • 11
  • 10
  • 9
  • 9
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

An investigation of charge balancing in planar inductors from an electro-magnetic-compatability perspective

26 February 2009 (has links)
M.Ing. / In this investigation charge balancing will be investigated from an Electro-Magnetic- Compatibility perspective. The primary sources of common mode Electro-Magnetic- Interference in switching converters are the switching nodes. This is mainly due to the parasitic capacitance between the switching node and the reference earth. Filtering components that are currently used take up a lot of valuable space resulting in the products overall size and cost to increase. Combating common mode current at the source will drastically reduce the size or the need for these large filters. This investigation will focus on a simple method of reducing common mode noise (produced by the switching node), of a two wire system, at the source by making use of a compensating winding which requires very little or no additional space; a buck converter will be used to illustrate the concept. The investigation will start with an overview of Electro-Magnetic-Interference and its components (common and differential mode noise). This investigation will deal with the measurement of common and differential mode noise as well as general Electro-Magnetic-Interference measurement. A design of the buck converter and its drive circuit will also be presented. Reducing the common mode noise by making use of charge balancing using planar inductors will then be presented. This investigation contains the theoretical analysis as well as experimental results to validate the theory. The experiments show encouraging results in using this technique to minimise common mode noise in switched-mode-power-supplies.
12

Proposta de malha de controle de corrente do capacitor para inversor de tensão senoidal para unidade de alimentação ininterrupta alimentando cargas não lineares. / Capacitive current control loop for an UPS sinusoidal voltage source inverter feeding non linear loads.

Yamada, Ronaldo Hideki 20 August 2010 (has links)
O objetivo deste trabalho é analisar uma topologia de controle para a malha de tensão de um inversor para fontes de alimentação ininterruptas (UPS) com forma de onda senoidal na saída. É proposto um sistema de controle com duas malhas, uma de tensão com controlador ressonante e outra do tipo PI de corrente no qual a variável de controle é a corrente do capacitor de filtro de saída. Mais especificamente pretende-se estudar o problema de rastreamento de tensão nos inversores de UPS monofásicos, apresentando o estado da arte e uma classificação dos controladores que servem de solução para este problema específico. / This work analyses a uninterruptible power supply (UPS) inverter control scheme with sinusoidal output voltage. A two-loop control scheme is proposed; one voltage loop using a resonant controller and a PI current controller with the output capacitor filter current as control variable. A review on voltage tracking control in one-phase voltage source inverter is presented, showing the state of the art and a controller classification for this specific problem.
13

Fixed-frequency multi-mode multiple-output arbitrary-type DC-DC switching-mode power converters with variable-frequency control. / CUHK electronic theses & dissertations collection

January 2010 (has links)
Finally, a four-channel SIMO converter with direct combination but optimal switching sequence for arbitrary converter sequence and converter type is presented. The theoretical optimal 1st-order inductor waveform from this proposed control algorithm is introduced. FCL is involved in this design to realize the algorithm. Moreover, a current-modulated ramp signal, which couples to different controllers, is included to compensate the original deep correlated power stages. By using all of the proposed techniques, Measurement results show that both conduction loss and dynamic loss can be suppressed because of the optimized switching sequence. The load transient response time is around 100mus. The peak efficiency is 89% with a 2.5-V power supply. A maximum output power of 1.66W can be achieved. / Firstly, a pseudo-PWM hysteresis voltage-mode buck converter is proposed. It achieves fast transient speed by the hysteresis control, estimable switching spectrum with a locking frequency and fast mode switching between PWM and PFM depending on the loading change. Measurement results show that the recovery time under the load transient is around 5mus, which is 5 times of the switching period. The boundary of the recovery time is defined by the value of the off-chip inductor. / Switching-mode power converter (SMPC) is an important circuit block in electronic systems. In the modem SMPC system, constant frequency voltage or current-mode control technique is commonly used. However, some limitations are raised due to some preliminary settings in the design. In this thesis, the switching frequency or period is no longer a constant but a design variable. Then, an additional frequency-control loop (FCL) is introduced in order to obtain a fixed frequency operation in the steady state. Three individual designs implemented with different types of FCL are proposed to verify the concept. / Then, a four-channel SIMO converter based on FCL is developed, together with auto-phase allocation technique. This circuit not only solves the problem of imbalance loading of different channels, but it also keeps the idle period of the inductor sufficient short in the full operation region. By combining with all channel controllers, FCL makes fast load transient response without degrading the power efficiency. Moreover, linear auto converter-type adaption technique is also used, which makes the converter surviving from a wide input range and output range. Measurement results show that the proposed converter can achieve a peak efficiency of 89%, a total output power of 1.46W, a load transient response time of less than 70muS, and an idle inductor period of <10%. / Zheng, Yanqi. / Adviser: Leung Ka Nang. / Source: Dissertation Abstracts International, Volume: 73-03, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2010. / Includes bibliographical references. / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [201-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.
14

Proposta de malha de controle de corrente do capacitor para inversor de tensão senoidal para unidade de alimentação ininterrupta alimentando cargas não lineares. / Capacitive current control loop for an UPS sinusoidal voltage source inverter feeding non linear loads.

Ronaldo Hideki Yamada 20 August 2010 (has links)
O objetivo deste trabalho é analisar uma topologia de controle para a malha de tensão de um inversor para fontes de alimentação ininterruptas (UPS) com forma de onda senoidal na saída. É proposto um sistema de controle com duas malhas, uma de tensão com controlador ressonante e outra do tipo PI de corrente no qual a variável de controle é a corrente do capacitor de filtro de saída. Mais especificamente pretende-se estudar o problema de rastreamento de tensão nos inversores de UPS monofásicos, apresentando o estado da arte e uma classificação dos controladores que servem de solução para este problema específico. / This work analyses a uninterruptible power supply (UPS) inverter control scheme with sinusoidal output voltage. A two-loop control scheme is proposed; one voltage loop using a resonant controller and a PI current controller with the output capacitor filter current as control variable. A review on voltage tracking control in one-phase voltage source inverter is presented, showing the state of the art and a controller classification for this specific problem.
15

A study of the relationship between R&D-Marketing integration in the product innovation process and organizational performance for switching power supply firm.

Lee, Sheng-chien 28 July 2003 (has links)
Abstract This study is to investigate the status quo and relationship between R&D-Marketing integration in the product innovation process and organizational performance. Based on the company registered in 2003, a target population composed of 259 Switching Power Supply(SPS¡^companies is formed. Questionnaires were completed by managers responsible for marketing or R&D-Marketing departments. E-mail survey were employed to collect the data and use correlation analysis, one-way ANOVA and hierarchical regression analysis to analysis the data. It is found that the organizational factors variations exist in the integration of department and have positive influence on various activities when perpetual department was established and the manager is responsible for both marketing and R&D-Marketing department. Moreover, the result of research shows organizational factors have positive influence on department integration, and the mutual participation of members is most important. Besides, organizational factors will affect financial performance and program accomplish by integration of R&D-Marketing respectively of organizational category and chief factor. Based on the research findings, the perpetual department for developing new product and co-operated managers are suggested. In addition, mutual participation of members and establishing information network and database to reduce the gap of information between two departments deserve more attention so that the new product¡¦s performance could be improved. Keywords : switching power supply , new product development, department integration, organizational performance
16

Analysis of losses in power inductor for high-frequency switching power converters

Chung, Hok-Yan. January 2001 (has links)
Thesis (M. Phil.)--University of Hong Kong, 2001.
17

Systematic analysis of switching power converters for long operation life

Pang, Hon-man., 彭漢文. January 2010 (has links)
published_or_final_version / Electrical and Electronic Engineering / Master / Master of Philosophy
18

Analysis of losses in power inductor for high-frequency switching power converters

鐘學仁, Chung, Hok-Yan. January 2001 (has links)
published_or_final_version / Electrical and Electronic Engineering / Master / Master of Philosophy
19

Digital control of a series-loaded resonant converter : a thesis submitted in partial fulfilment of the requirements for the degree of Master of Engineering in Electrical and Electronic Engineering at the University of Canterbury, Christchurch, New Zealand /

Chang, Yu-kun. January 1900 (has links)
Thesis (M.E.)--University of Canterbury, 2006. / Typescript (photocopy). "March 2006." Includes bibliographical references (p. [83]-84). Also available via the World Wide Web.
20

Mitigating interference from switch-mode power supplies in sampling receivers

Slamdien, Muammar January 2017 (has links)
Thesis (MTech (Electrical Engineering))--Cape Peninsula University of Technology, 2017. / This thesis reports on the research and development of techniques applied to mitigate interference from switch-mode power supplies in sampling receivers and also more specifically for FMCW radar receiver applications. During the system testing phase of an FMCW Radar at Reutech Radar Systems (RRS), it was found that a large false target was emerging on the Range-Doppler Map (RDM). It was concluded that the problem was originating from interference caused by the switch-mode power supplies (SMPS), which supply DC power to the radar receiver subsystem. This then created the need for a new DC power supply, which is able to minimize the interference, as well as, mitigate the effects of the interference caused by the switching of the power supply. The mitigation techniques and power supply development was divided four main sections, namely, research, simulation, design and evaluation. The research involved obtaining background information on sampling receivers, sampling theory, Range-Doppler Processing, switch-mode power supplies, their effects and mitigation thereof. In the simulation phase, the research was utilised to simulate the various interference mitigation techniques. A power supply PCB was then designed in the design phase to practically illustrate the techniques being utilised. Lastly, during evaluation, this PCB was evaluated against the criteria set out in the research phase. The results demonstrated that the technique of synchronising the PWM clock to the Sampling frequency and SRF yielded a significant reduction in the SMPS noise on the Range-Doppler Map.

Page generated in 0.0151 seconds