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Fleet Sizing and Scheduling Model of Container Carriers between Two PortsElyamak, Alaa Mustapha 01 January 2008 (has links)
Globalization and containerization have changed the shipping industry and carriers are challenged to reshape their operational planning in order to maintain their market share. The objective of this paper is to formulate a model to determine the optimal fleet size and sailing frequency that minimizes total shipping and inventory (wait) costs for a container shipping company. The proposed model assumes an arrival process that follows a Poisson rate. We first consider unlimited ship capacity and propose a solution to determine the required fleet size and the optimal sailing frequency. We then extend the work to consider limited ship capacity. Furthermore, we introduce a cost component associated with outsourcing shipments due to insufficient capacity. The outsourced shipment is utilized when the number of containers at a port exceeds the available capacity. In the general case, a closed form solution could not be derived. Therefore, a simulation study is undertaken to analyze optimal fleet sizing, scheduling, and outsourcing policies under varying paramaters. Our study investigates the trade-off between building capacity and outsourcing in the context of cargo shipment. The model proves to be a reliable tool to determine optimal delay time at ports and optimal fleet size.
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A real-time simulation-based optimisation environment for industrial schedulingFrantze´n, Marcus January 2013 (has links)
In order to cope with the challenges in industry today, such as changes in product diversity and production volume, manufacturing companies are forced to react more flexibly and swiftly. Furthermore, in order for them to survive in an ever-changing market, they also need to be highly competitive by achieving near optimal efficiency in their operations. Production scheduling is vital to the success of manufacturing systems in industry today, because the near optimal allocation of resources is essential in remaining highly competitive. The overall aim of this study is the advancement of research in manufacturing scheduling through the exploration of more effective approaches to address complex, real-world manufacturing flow shop problems. The methodology used in the thesis is in essence a combination of systems engineering, algorithmic design and empirical experiments using real-world scenarios and data. Particularly, it proposes a new, web services-based, industrial scheduling system framework, called OPTIMISE Scheduling System (OSS), for solving real-world complex scheduling problems. OSS, as implemented on top of a generic web services-based simulation-based optimisation (SBO) platform called OPTIMISE, can support near optimal and real-time production scheduling in a distributed and parallel computing environment. Discrete-event simulation (DES) is used to represent and flexibly cope with complex scheduling problems without making unrealistic assumptions which are the major limitations of existing scheduling methods proposed in the literature. At the same time, the research has gone beyond existing studies of simulation-based scheduling applications, because the OSS has been implemented in a real-world industrial environment at an automotive manufacturer, so that qualitative evaluations and quantitative comparisons of scheduling methods and algorithms can be made with the same framework. Furthermore, in order to be able to adapt to and handle many different types of real-world scheduling problems, a new hybrid meta-heuristic scheduling algorithm that combines priority dispatching rules and genetic encoding is proposed. This combination is demonstrated to be able to handle a wider range of problems or a current scheduling problem that may change over time, due to the flexibility requirements in the real-world. The novel hybrid genetic representation has been demonstrated effective through the evaluation in the real-world scheduling problem using real-world data.
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A knowledge-based real-time decision support system for job shop scheduling at the shop floor level /Chang, Feng-Chang January 1985 (has links)
No description available.
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The effect of estimated processing times versus actual (standard) processing times on various performance measures in a pure job shopEmaminezhad, Farzad January 1983 (has links)
A comparative simulation study was performed to investigate the effect of uncertainty or unreliability in job processing times on designing schedules in a pure job shop environment. Five performance measures were employed in an effort to examine the effect of variations between estimated and actual processing times. These variations are common in job shop systems where estimations are used to set processing times. It was hypothesized that a variation has an effect on relative system performance. In addition, three priority rules, namely, FIFO, SOT and EDD, were studied to determine the best rule for controlling the shop in situations of unreliable processing times data.
The percentage variation in processing times was clearly the dominant variable for most of the performance measures. A 60% variation in estimated processing times appeared to be the maximum level under which the mean flowtime, mean tardiness and percent of late jobs performance measures were insensitive.
The simulation results indicated that the makespan and average shop utilization performance measures were insensitive to reliability of input information about processing times for up to a 100%. The performance of FIFO and EDD priority rules suffered drastically while SOT was the least sensitive to the reliability of processing times information. / M.S.
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Development Of A Bidding Algorithm Used In An Agent-based Shop-floor Control SystemUluer, Muhtar Ural 01 January 2007 (has links) (PDF)
In this study a time based bidding framework is developed which is used for dispatching jobs to manufacturing resources in a virtual shop-floor environment. Agent-based shop-floor control approach is implemented with machine and part agents. The Contract-net communication protocol is utilized as the negotiation scheme between these agents. Single step product reservation (SSPR) technique is adopted throughout the study. Primary objective is determined as meeting the due dates and if the lateness is inevitable, avoiding the parts of high priority from being late. A balanced machine utilization rate is set as the secondary objective.
During bid construction step, the SSPR technique is augmented with W(SPT+CR) sequencing rule in order to obtain weighted tardiness results. Bids containing Earliest Finishing Time (EFT) and machine loading values of the corresponding machine are evaluated with considering the priority of the part. An elimination algorithm which discards the highly deviated bids having obvious differences is implemented at the initial stage of the bid evaluation step. A basic algorithm to control the maximum tardiness value is applied, as well.
A simulation test bed is developed in order to implement the time concept into the presented bidding framework. The test bed is mainly based on the Computer Integrated Manufacturing Laboratory (CIMLAB) located in Middle East Technical University, Department of Mechanical Engineering.
The developed bidding algorithm is tested under several cases. Results revealed that the proposed bidding framework was quite successful in meeting the objectives. The study is concluded with some specific future work, outlined in the light of the results obtained.
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Cache memory aware priority assignment and scheduling simulation of real-time embedded systems / Affectation de priorité et simulation d’ordonnancement de systèmes temps réel embarqués avec prise en compte de l'effet des mémoires cacheTran, Hai Nam 23 January 2017 (has links)
Les systèmes embarqués en temps réel (RTES) sont soumis à des contraintes temporelles. Dans ces systèmes, l'exactitude du résultat ne dépend pas seulement de l'exactitude logique du calcul, mais aussi de l'instant où ce résultat est produit (Stankovic, 1988). Les systèmes doivent être hautement prévisibles dans le sens où le temps d'exécution pire-cas de chaque tâche doit être déterminé. Une analyse d’ordonnancement est effectuée sur le système pour s'assurer qu'il y a suffisamment de ressources pour ordonnancer toutes les tâches. La mémoire cache est un composant matériel utilisé pour réduire l'écart de performances entre le processeur et la mémoire principale. L'intégration de la mémoire cache dans un RTES améliore généralement la performance en terme de temps d'exécution, mais malheureusement, elle peut entraîner une augmentation du coût de préemption et de la variabilité du temps d'exécution. Dans les systèmes avec mémoire cache, plusieurs tâches partagent cette ressource matérielle, ce qui conduit à l'introduction d'un délai de préemption lié au cache (CRPD). Par définition, le CRPD est le délai ajouté au temps d'exécution de la tâche préempté car il doit recharger les blocs de cache évincés par la préemption. Il est donc important de pouvoir prendre en compte le CRPD lors de l'analyse d’ordonnancement. Cette thèse se concentre sur l'étude des effets du CRPD dans les systèmes uni-processeurs, et étend en conséquence des méthodes classiques d'analyse d’ordonnancement. Nous proposons plusieurs algorithmes d’affectation de priorités qui tiennent compte du CRPD. De plus, nous étudions les problèmes liés à la simulation d'ordonnancement intégrant le CRPD et nous établissons deux résultats théoriques qui permettent son utilisation en tant que méthode de vérification. Le travail de cette thèse a permis l'extension de l'outil Cheddar - un analyseur d'ordonnancement open-source. Plusieurs méthodes d'analyse de CRPD ont été également mises en oeuvre dans Cheddar en complément des travaux présentés dans cette thèse. / Real-time embedded systems (RTES) are subject to timing constraints. In these systems, the total correctness depends not only on the logical correctness of the computation but also on the time in which the result is produced (Stankovic, 1988). The systems must be highly predictable in the sense that the worst case execution time of each task must be determined. Then, scheduling analysis is performed on the system to ensure that there are enough resources to schedule all of the tasks.Cache memory is a crucial hardware component used to reduce the performance gap between processor and main memory. Integrating cache memory in a RTES generally enhances the whole performance in term of execution time, but unfortunately, it can lead to an increase in preemption cost and execution time variability. In systems with cache memory, multiple tasks can share this hardware resource which can lead to cache related preemption delay (CRPD) being introduced. By definition, CRPD is the delay added to the execution time of the preempted task because it has to reload cache blocks evicted by the preemption. It is important to be able to account for CRPD when performing schedulability analysis.This thesis focuses on studying the effects of CRPD on uniprocessor systems and employs the understanding to extend classical scheduling analysis methods. We propose several priority assignment algorithms that take into account CRPD while assigning priorities to tasks. We investigate problems related to scheduling simulation with CRPD and establish two results that allows the use of scheduling simulation as a verification method. The work in this thesis is made available in Cheddar - an open-source scheduling analyzer. Several CRPD analysis features are also implemented in Cheddar besides the work presented in this thesis.
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Utilizing Scenario Based Simulation Modeling to Optimize Aircraft Fleet SchedulingIslam, Md Rubayat Ul 29 August 2019 (has links)
No description available.
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