This study examines the public relations practices of the Public Relations Department and the Human Relations Department at National Semiconductor Corporation. Source material included interviews with twelve company employees, company publications, and other publications. Five chapters deal with particular problems with which the semiconductor industry in the 'United States is confronted; background and development of National Semiconductor Corporation; organization and practices of the Public Relations Department; and public relations practices of the Human Relations Department. The study finds much strength in each of the two departments but concludes that the public relations function would be strengthened by consolidation into one department. It recommends further scholarly research of public relations practices at other electronics companies.

by Chu Kwok-Fai. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1999. / Includes bibliographical references (leaves 91-93). / Abstracts in English and Chinese. / List of Figures --- p.vii / List of Tables --- p.viii / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation --- p.1 / Chapter 1.2 --- Literature Review --- p.4 / Chapter 1.2.1 --- Ordinary Dispatching Policies --- p.5 / Chapter 1.2.2 --- Setup-oriented Dispatching Policies --- p.7 / Chapter 1.3 --- Organization of Thesis --- p.10 / Chapter 2 --- Slack Based Policies --- p.11 / Chapter 2.1 --- Definition of Slack --- p.12 / Chapter 2.2 --- Least Slack Policy (LS) --- p.13 / Chapter 2.3 --- Least Weighted Slack Policy (LWS) --- p.15 / Chapter 2.3.1 --- Definition of Weighted Slack --- p.15 / Chapter 2.3.2 --- Policy Mechanism and Discussion --- p.15 / Chapter 2.4 --- Least Mean Slack Policy (LMS) --- p.16 / Chapter 2.4.1 --- Batch Size and Its Lower Bound --- p.16 / Chapter 2.4.2 --- Policy Mechanism and Discussion --- p.17 / Chapter 2.5 --- Least Weighted Mean Slack Policy (LWMS) --- p.18 / Chapter 2.5.1 --- Definition of Weighted Mean Slack --- p.18 / Chapter 2.5.2 --- Policy Mechanism and Discussion --- p.18 / Chapter 2.6 --- Illustrative Example --- p.21 / Chapter 2.7 --- Due-date Window Expansion --- p.24 / Chapter 2.7.1 --- Due-date Window --- p.24 / Chapter 2.7.2 --- LWMS Policy: Due Date Window Expansion --- p.25 / Chapter 3 --- Simulation Study --- p.27 / Chapter 3.1 --- Models Description --- p.27 / Chapter 3.1.1 --- Two-Machines-Two-Products Model --- p.27 / Chapter 3.1.2 --- Assembly Lines Model --- p.29 / Chapter 3.1.3 --- Micro-Chips Testing Model --- p.31 / Chapter 3.2 --- Simulation Experiment Description --- p.32 / Chapter 4 --- Simulation Result and Analysis --- p.38 / Chapter 4.1 --- Simulation Result --- p.39 / Chapter 4.1.1 --- Two-Machines-Two-Products Model --- p.39 / Chapter 4.1.2 --- Assembly Lines Model --- p.39 / Chapter 4.1.3 --- Micro-Chips Testing Model --- p.43 / Chapter 4.2 --- Statistical Analysis --- p.44 / Chapter 4.2.1 --- Significance of Weighted Factor and Batch Size --- p.44 / Chapter 4.2.2 --- Comparison Among Different Policies --- p.46 / Chapter 4.3 --- Discussion of Results --- p.50 / Chapter 5 --- An Experimental Implementation and Conclusion Remarks --- p.51 / Chapter A --- Reducing MCT and SDCT by LS policy --- p.55 / Chapter A.1 --- Reducing Variance of Lateness --- p.55 / Chapter A.2 --- Reducing Variance of Cycle Time --- p.56 / Chapter A.3 --- Reducing Mean Cycle Time --- p.56 / Chapter B --- Complete Simulation Result --- p.58 / Chapter B.1 --- Two-Machines-Two-Products Model --- p.58 / Chapter B.1.1 --- "Wip, Batch Size and Throughput" --- p.58 / Chapter B.1.2 --- MCT and SDCT --- p.62 / Chapter B.1.3 --- Machine Utilization --- p.66 / Chapter B.2 --- Assembly Lines Model --- p.68 / Chapter B.2.1 --- "WIP, Batch Size and Throughput" --- p.68 / Chapter B.2.2 --- MCT and SDCT --- p.70 / Chapter B.2.3 --- Machine Utilization --- p.73 / Chapter B.3 --- Micro-Chips Testing Model --- p.82 / Chapter B.3.1 --- "WIP, Throughput, MCT and SDCT" --- p.82 / Chapter B.3.2 --- Machine Utilization --- p.84 / Chapter C --- MANOVA studies on Weighted Factor and Batch Size --- p.86 / Chapter C.1 --- Two-Machines-Two-Products Model --- p.86 / Chapter C.1.1 --- Least Weighted Slack Policy --- p.86 / Chapter C.1.2 --- Least Mean Slack Policy --- p.87 / Chapter C.1.3 --- Least Weighted Mean Slack Policy --- p.87 / Chapter C.2 --- Assembly Lines Model --- p.88 / Chapter C.2.1 --- Least Weighted Slack Policy --- p.88 / Chapter C.2.2 --- Least Mean Slack Policy --- p.88 / Chapter C.2.3 --- Least Weighted Mean Slack Policy --- p.89 / Chapter C.3 --- Micro-Chips Testing Model --- p.89 / Chapter C.3.1 --- Least Weighted Slack Policy --- p.89 / Chapter C.3.2 --- Least Mean Slack Policy --- p.90 / Chapter C.3.3 --- Least Weighted Mean Slack Policy --- p.90 / Bibliography --- p.91

In the semiconductor industry, numerous potential occupational exposures exist as a result of the diversity of chemical and physical hazards unique to integrated circuit manufacturing. The hazards associated with maintenance tasks are challenging because the sporadic nature of the tasks make exposure monitoring difficult. In particular, vacuum pump maintenance is hazardous due to the close contact with chemical waste by-products. The purpose of this study was to characterize the chemical and physical occupational exposures associated with vacuum pump maintenance (VPM) in a semiconductor manufacturing environment. The study population consisted of 9 VPM technicians at a semiconductor manufacturing plant in Oregon. VPM tasks were observed and prioritized according to potential risk of exposure. For each task studied, an exposure monitoring strategy was developed to quantify both chemical and noise exposures. Personal and area air samples of potential waste gases were conducted during maintenance tasks. All air samples were below established governmental standards. Detectable levels were found for three tasks: 0.040 milligrams per cubic meter (mg/m��) of hydrochloric acid, 0.014 mg/m�� of chlorine, and 0.08 mg/m�� of fluoride containing gases during tasks associated with the metal etch tool, polynitride etch tool, and tungsten deposition tool, respectively. Several bulk samples of waste residues collected during the tasks where corrosive having low pH levels. Representative noise sampling was conducted during a 12 hour shift to characterize noise exposures. Noise samples revealed that 43% of the samples were above the 80 dBA action limit thus requiring the VPM technicians to be involved in a hearing conservation program. Field observations revealed that there were many chemical hazards associated with waste gases and residues, therefore it is likely that occupational exposures occur even though they were not detected at significant levels in this study. In addition, there were several ergonomic risk factors associated with dismantling the pump during the maintenance activities. Specific improvements in personal protective equipment, general work practices, ergonomics, and engineering controls will help to reduce the potential for occupational exposures unique to VPM. Results from this study indicate the need to conduct in depth hazard evaluations of high risk populations such as the VPM technicians. / Graduation date: 1997

This thesis proposes a computationally effective analytical approach to automated material handling system (AMHS) performance modeling for a simple closed loop AMHS, such as is typical in supporting a 300mm wafer fab bay. Discrete-event simulation can produce accurate assessments of the production performance, including the contribution by the AMHS. However, the corresponding simulation models are both expensive and time-consuming to construct, and require long execution times to produce statistically valid estimates. These attributes render simulation ineffective as a decision support tool in the early phase of system design, where requirements and configurations are likely to change often. We propose an alternative model that estimates the AMHS performance considering the possibility of vehicle-blocking. A probabilistic model is developed, based on a detailed description of AMHS operations, and the system is analyzed as an extended Markov chain. The model tracks the operations of all the vehicles on the closed-loop considering the possibility of vehicle-blocking. The resulting large-scale model provided reasonably accurate performance estimates; however, it presented some computational challenges. These computational challenges motivated the development of a second model that also analyzes the system as an extended Markov chain but with a much reduced state space because the model tracks the movement of a single vehicle in the system with additional assumptions on vehicle-blocking. Neither model is a conventional Markov Chain because they combine the conventional Markov Chain analysis of the AMHS operations with additional constraints on AMHS stability and vehicle-blocking that are necessary to provide a unique solution to the steady-state behavior of the AMHS. Based on the throughput capacity model, an approach is developed to approximate the expected response time of the AMHS to move requests. The expected response times are important to measure the performance of the AMHS and for estimating the required queue capacity at each pick-up station. The derivation is not straightforward and especially complicated for multi-vehicle systems. The approximation relies on the assumption that the response time is a function of the distribution of the vehicles along the tracks and the expected length of the path from every possible location to the move request location.

The topic of National Innovation System (NIS) is gradually emphasized. The NIS includes four compositions. They are government, industry, university and public research organization. The knowledge flow is transmitted among the four compositions through innovation policy. Thus, many countries have begun to develop NIS. The NIS will raise the economic growth rate, and promote the competitiveness of industry. Consequently, the study of NIS becomes very popular. OECD (Organization for Economic Cooperation and Development) build particular NIS structures to explain the difference between members, and try to find the key successful way to achieve national innovative goals. In the Asia, the Taiwan, China, Japan and South Korea show high relationship in the politics and economics. Japan and South are high-developing countries, and their innovation activities are very successful in the world, especially in those of technology industry. Additionally, China has abundant natural resources to help them develop technology industries. For above reasons, we elect these countries to be studied, and we try to find the essential factors of successful NIS. This study includes two research issues. We first collect the secondary data to explain different NIS structure among four countries. Then, we use Stepwise Regression Analysis to evaluate the performance of innovation. Finally we use the Pearson Correlation Analysis to analyze relationship between NIS performance and semiconductor industry development. The results of this study include: (1) R&D expenditure is the most important factor to influence the performance of national innovation; (2) Expenditure on basic research is an important factor to influence the output of innovation; (3) national innovation and industry development shows high relationship; and (4) the ranking of national innovation performance is not totally the same as that of industry development. Based on these findings, we will provide some important policy suggestions for innovation activities in Taiwan.

The catching-up economies are unable to obtain the same power and financial status as that of the developed countries are primarily due to the less technological advancement. The research integrates the related facts and models on the development on high-tech of those of catching-up economies. A feasible strategic analysis structure is proposed serving as recommended guideline for the high-tech industries in those catching-up economies. Utilizing the CD/DVDs, semi-conductors and biological technology industries, all from Taiwan, as examples, to illustrate how the catching-up economies may structure the high-tech industries as well as how to develop strategies for the development of those three types of industries in Taiwan. The developed countries have accumulated the ability and resources from the past centuries to build the ability of R&D innovation, processing innovation, and assembly innovation in sequence. The catching-up economies must initially proceed with the method of reverse engineering. The step initiates with creating the assembly innovation and ends with research pertinent to the utilization of intensive brain-power. The research studies categorizes and divides the internal development of industry into four periods: the emerging period, the growing period, the expanding period, and the maturing period. The catching-up economies must overcome the various difficulties in order to reach the maturing period; and ultimately be able to obtain the same status as those industries of developed countries.

A Study on the Development and the Analysis of Competitive Advantages of Semiconductor Industries across Taiwan Straits Abstract Semiconductor Industry, as frequently referred to as ¡§sangyo no kome¡¨ or ¡§the rice of industries¡¨, plays a critical role in providing most value-added components to all sorts of digital electronic products, and thus, is also the ideal and priority industry to many countries. Taiwan has achieved an important position in the wave of disintegration in global semiconductor industry after its development for tens of years. And it will continue to be substantial to Taiwan¡¦s economic growth and nation¡¦s competitiveness in the foreseeable future. Lately, two noteworthy incidents brought about our attention to the issue of their impacts on the pace of continuous evolution of Taiwan¡¦s semiconductor industry; the former being the WTO accession of both Taiwan and China, and the latter China¡¦s endeavor fostering its semiconductor industry. This paper first studies the characteristics and status quo of global semiconductor industry, as well as that in Taiwan and China. It then explores the impact of WTO accession and three related international agreements on the semiconductor industries on both shores of Taiwan Straits. This study continues to analyze the difference in the intensity of industry competitiveness between Taiwan¡¦s semiconductor industry and that of China, making use of five kinds of analysis models. The author found that the combinational use of Value-Chain Analysis and Diamond Analysis (plus the concept of Clusters) is most suitable and complete for this purpose; the former can be used to judge the relative competitiveness between two industries (with properly defined indices), and the later can be complementarily used to understand the sources of competitiveness, and competitive position, of an industry at certain location. This article also predicts the changes in terms of industry competitiveness, and the scenario of connections and interaction, between Taiwan¡¦s semiconductor industry and that of China in the 5-year future. Within every analysis attempt, suggestions are also made as references to authorities and industry leaders for policy making and strategy formulation.

The research object of this paper is the Economic Daily Paper that is a newspaper specialized in economic topics. The purpose is to find out the relation between the IC semiconductor industry and the media's report by using the content analysis of dissemination as a research method. It studies and analyzes the industrial development and investor behaviors based on the front and second pages of Economic Daily in the past ten years, separated a year into four different industrial seasons starting January, April, July and October. The conclusions are as follows: 1.After the analysis, the circulation appears to be the information on the semiconductor industry and it disseminates mostly in the form of ¡§News¡¨. Because the semiconductor industry accounts for the large volume in the Economic Daily Paper, I chose this newspaper to be the reference of my paper. 2.¡§Security¡¨, as an important index to the readers, is the most valued topic because the profitability of a company affects the management efficiency of the company. Followed by ¡§security¡¨ is the ¡§management strategy¡¨. The companies of the semiconductor want to fully utilize the management skill, so they would have to focus on the business management strategies. 3.As we look at the industry development from the reports, we can easily find that the industry development obviously push forward the report of the development. 4.Semiconductor is a high technological industry, and its development can be divided into six stages: research and development, establishment, growth, maturity, expansion, and success. The sources of capital can be divided into foundation fund, development fund and expansion fund. After a high-tech company succeeds, it should make the stock listed and disperse the stocks as quickly as possible to raise the fund.

Semiconductor manufacturing is characterized by a dynamic, varying environment and the technology to produce integrated circuits is always shifting in response to the demand for faster and new products, and the time between the development of a new profitable method of manufacturing and its transfer to tangible production is very short. The semiconductor industry has adopted the use of advanced process control (APC), namely a set of automated methodologies to reach desired process goals in operating individual process steps. That is because the ultimate motivation for APC is improved device yield and a typical semiconductor manufacturing process can have several hundred unit processes, any of which could be a yield limiter if a given unit procedure is out of control. APC uses information about the materials to be processed, metrology data, and the desired output results to choose which model and control plan to employ. The current focus of APC for semiconductor manufacturers is run-to-run control. Many metrology applications have become key enablers for the conventionally labeled “value-added” processing steps in lithography and etch and are now integral parts of these processes. The economic advantage of effective metrology applications increases with the difficulty of the manufacturing process. Frequent measurement facilitates products reaching its target but it increases the cost and cycle time. If lots of measurements are skipped, the product quality does not be guaranteed due to process error from uncompensated drift and step disturbance. Thus, it is necessary to optimize the sampling plan in order to quickly identify the sources of prediction errors and decrease the metrology cost and cycle time. The goal of this research intend to understand the relationship between metrology and advanced process control (APC) in semiconductor manufacturing and develop an enhanced sampling strategy in order to maximize the value of metrology and control for critical wafer features. / text

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