<p>Gallium nitride (GaN) nanowires are high-performance materials with wide, direct bandgaps and superior electronic properties. Although their properties make them of great interest for next-generation technologies, widespread adoption has been limited by expensive production processes. Here, the results of growing GaN nanowires via DC magnetron sputtering at different temperatures and using different metal catalysts are reported.</p> <p>A new substrate heater was designed to minimize contamination from the heater filament and increase the substrate temperature window to in excess of 800°C. Sixteen-mm² (111) silicon samples had one-to-four nm of a metal catalyst deposited on them using evaporation. This metal catalyst layer (gold, platinum, or nickel) was employed to induce catalyst-assisted vapor-liquid-solid nanowire growth. GaN was deposited via a reactive nitrogen DC magnetron sputtering system. Surface morphology and composition were analyzed using both scanning and transmission electron microscopy. Energy-dispersive x-ray spectroscopy (EDS) and electron energy loss spectroscopy were used to measure the presence of gallium and nitrogen in the resulting nanowires, respectively.</p> <p>This furnace significantly reduced tungsten contamination to below the detectable levels of EDS. GaN nanowires were present on gold-catalyzed samples only in the gold-covered region of the silicon substrate exposed to a gallium flux. Nanowire morphology improved as temperature was elevated, but it did so at the cost of lower areal density. Conversely, platinum-coated samples yielded fewer nanowires than their gold-coated counterparts. Samples that had nickel deposited on them displayed the best GaN nanowire growths. They had the best surface morphologies, had negligible oxygen concentrations, and were single crystalline.</p> / Master of Applied Science (MASc)

The United States manufacturing employment decreased 33% from 1985 to 2014. During the same period, the United States semiconductor manufacturing, accounting for 1.7% of the total of the United States manufacturing workforce, lost 35% of its employees. The decline in semiconductor manufacturing jobs began in 1985 when semiconductor firms began offshoring product manufacturing overseas because of low cost of qualified labor force and facilities. This qualitative case study explored the analytical approaches and strategies business leaders of semiconductor firms that offshore manufacturing use in making informed strategic outsourcing and offshoring decisions conducive to sustainability and profitability of operations. The location theory provided the conceptual framework for this research study. Semistructured interviews were conducted using video conferencing with 5 midlevel managers who conducted offshoring or were currently offshoring semiconductor manufacturing. There were 10 themes identified and analyzed from transcription software. The themes were manufacturing cost, onshore manufacturing, offshoring site selection, competitive cost analysis, offshoring advantages, offshoring disadvantages, national manufacturing program, offshoring, reshoring, and social Impact. The findings showed that offshoring of the semiconductor product manufacturing will continue because of lower cost of operation. Social change could ensue if the leader of firms, together with the educational institutions and lawmakers, establish a national program for the industrial type of knowledge to build skills in the United States.

This thesis presents the modeling of tool data produced during ion implantation for the prediction of wafer sheet resistance. In this work, we will use various statistical techniques to address challenges due to the nature of equipment data: high dimensionality, colinearity, parameter interactions, and non-linearities. The emphasis will be data integrity, variable selection, and model building methods. Different variable selection and modeling techniques will be evaluated using an industrial data set. Ion implant processes are fast and depending on the monitoring frequency of the equipment, late detection of a process shift could lead to the loss of a significant amount of product. The main objective of the research presented in this thesis is to identify any ion implant parameters that can be used to formulate a virtual metrology model. The virtual metrology model would then be used for process monitoring to ensure stable processing conditions and consequent yield guarantees. / text

OPTICAL CHARACTERIZATION OF INGAN HETEROSTRUCTURES FOR BLUE LIGHT EMITTERS AND VERTICAL CAVITY LASERS: EFFICIENCY AND RECOMBINATION DYNAMICS By Serdal Okur, Ph.D. A thesis submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy at Virginia Commonwealth University. Virginia Commonwealth University, 2014. Major Director: Ümit Özgür, Associate Professor, Electrical and Computer Engineering This thesis explores radiative efficiencies and recombination dynamics in InGaN-based heterostructures and their applications as active regions in blue light emitters and particularly vertical cavities. The investigations focus on understanding the mechanism of efficiency loss at high injection as well as developing designs to mitigate it, exploring nonpolar and semipolar crystal orientations to improve radiative efficiency, integration of optimized active regions with high reflectivity dielectric mirrors in vertical cavity structures, and achieving strong exciton-photon coupling regime in these microcavities for potential polariton lasing. In regard to active regions, multiple double heterostructure (DH) designs with sufficiently thick staircase electron injection (SEI) layers, which act as electron coolers to reduce the overflow of hot electrons injected into the active region, were found to be more viable to achieve high efficiencies and to mitigate the efficiency loss at high injection. Such active regions were embedded in novel vertical cavity structure designs with full dielectric distributed Bragg reflectors (DBRs) through epitaxial lateral overgrowth (ELO), eliminating the problems associated with semiconductor bottom DBRs having narrow stopbands and the cumbersome substrate removal process. Moreover, the ELO technique allowed the injection of carriers only through the high quality regions with substantially reduced threading dislocation densities compared to regular GaN templates grown on sapphire. Reduced electron-hole wavefunction overlap in polar heterostructures was shown to hamper the efficiency of particularly thick active regions (thicker than 3 nm) possessing three-dimensional density of states needed for higher optical output. In addition, excitation density-dependent photoluminescence (PL) measurements showed superior optical quality of double heterostructure (3 nm InGaN wells) active regions compared to quantum wells (2 nm InGaN wells) suggesting a minimum limit for the active region thickness. Therefore, multiple relatively thin but still three dimensional InGaN active regions separated by thin and low barriers were found to be more efficient for InGaN light emitters. Investigations of electroluminescence from light emitting diodes (LEDs) incorporating multi DH InGaN active regions (e.g. quad 3 nm DH) and thick SEIs (two 20 nm-thick InGaN layers with step increase in In content) revealed higher emission intensities compared to LEDs with thinner or no SEI. This indicated that injected electrons were cooled sufficiently with thicker SEI layers and their overflow was greatly reduced resulting in efficient recombination in the active region. Among the structures considered to enhance the quantum efficiency, the multi-DH design with a sufficiently thick SEI layer constitutes a viable approach to achieve high efficiency also in blue lasers. Owing to its high exciton binding energy, GaN is one of the ideal candidates for microcavities exploiting the strong exciton-photon coupling to realize the mixed quasiparticles called polaritons and achieve ideally thresholdless polariton lasing at room temperature. Angle-resolved PL and cathodoluminescence measurements revealed large Rabi splitting values up to 75 meV indicative of the strong exciton-photon coupling regime in InGaN-based microcavities with bottom semiconductor AlN/GaN and a top dielectric SiO2/SiNxDBRs, which exhibited quality factors as high as 1300. Vertical cavity structures with all dielectric DBRs were also achieved by employing a novel ELO method that allowed integration of a high quality InGaN cavity active region with a dielectric bottom DBR without removal of the substrate while forming a current aperture through the ideally defect-free active region. The full-cavity structures formed as such were shown to exhibit clear cavity modes near 400 and 412 nm in the reflectivity spectrum and quality factors of 500. Although the polar c-plane orientation has been the main platform for the development of nitride optoelectronics, significant improvement of the electron and hole wavefunction overlap in nonpolar and semipolar InGaN heterostructures makes them highly promising candidates for light emitting devices provided that they can be produced with good crystal quality. To evaluate their true potential and shed light on the limitations put forth by the structural defects, optical processes in several nonpolar and semipolar orientations of GaN and InGaN heterostructures were investigated. Particularly, stacking faults were found to affect significantly the optical properties, substantially influencing the carrier dynamics in nonpolar (1-100), and semipolar (1-101) and (11-22)GaN layers. Carrier trapping/detrapping by stacking faults and carrier transfer between stacking faults and donors were revealed by monitoring the carrier recombination dynamics at different temperatures, while nonradiative recombination was the dominant process at room temperature. Although it is evident that nonpolar (1-100)GaN and semipolar (11-22)GaN require further improvement of material quality, steady-state and time-resolved PL measurements support that (1-101)-oriented GaN templates and InGaN active regions exhibit optical performance comparable to their highly optimized polar c-plane counterparts, and therefore, are promising for vertical cavities and light emitting device applications.

This thesis explores the improvement of quantum efficiencies for InGaN/GaN heterostructures and their applications in light-emitting diodes (LEDs) and vertical cavity surface-emitting lasers (VCSELs). Different growth approaches and structural designs were investigated to identify and address the major factors limiting the efficiency. (1) Hot electron overflow and asymmetrical electron/hole injection were found to be the dominant reasons for efficiency degradation in nitride LEDs at high injection; (2) delta p-doped InGaN quantum barriers were employed to improve hole concentration inside the active region and therefore improve hole injection without sacrificing the layer quality; (3) InGaN active regions based on InGaN multiple double-heterostructures (DHs) were developed to understand the electron and hole recombination mechanisms and achieve high quantum efficiency and minimal efficiency droop at high injection; (4) the effect of stair-case electron injectors (SEIs) has been investigated with different active region designs and SEIs with optimized thickness greatly mitigated electron overflow without sacrificing material quality of the active regions. The active regions showing promising performance in LEDs were incorporated into VCSEL designs. Hybrid VCSEL structures with bottom semiconductor AlN/GaN and a top dielectric SiO2/SiNx DBRs have been investigated, and quality factors as high as 1300 have been demonstrated. Finally, VCSEL structures with all dielectric DBRs have been realized by employing a novel ELO-GaN growth method that allowed integration of a high quality InGaN cavity active region with a dielectric bottom DBR without removal of the substrate while forming a current aperture through the ideally dislocation-free region. The full-cavity structures formed as such exhibited quality factors 500 across the wafer.

In this paper a review on scheduling of batch processors (SBP) in semiconductor manufacturing (SM) is presented. It classifies SBP in SM into 12 groups. The suggested classification scheme organizes the SBP in SM literature, summarizes the current research results for different problem types. The classification results are presented based on various distributions and various methodologies applied for SBP in SM are briefly highlighted. A comprehensive list of references is presented. It is hoped that, this review will provide a source for other researchers/readers interested in SBP in SM research and help simulate further interest. / Singapore-MIT Alliance (SMA)

The Chemical Mechanical polishing (CMP) process is now widely employed in the Integrated Circuit Fabrication. However, due to the complexity of process parameters on the material removal rate (MRR), mechanism of material removal and pattern effect are not well understood. In this paper, three contact regimes between the wafer surface and the polishing pad were proposed: direct contact, mixed or partial contact, and hydroplaning. The interfacial friction force has been employed to characterize these contact conditions. Several polishing models are reviewed with emphasis on the mechanical aspects of CMP. Experiments have been conducted to verify the mechanical polishing models and to identify the dominant mechanism of material removal under typical CMP conditions. / Singapore-MIT Alliance (SMA)

The semiconductor manufacturing process is a complex process that can consist of hundreds if not thousands of steps. During this process an enormous amount of data is generated and collected by several different systems. Analyzing this data can be complicated and time consuming. But, in order to optimize the manufacturing process, it is important to be able to process data quickly and provide data consumers an easy, meaningful way to view the data. Data consumers at a management level need to view data differently than someone who works in the semiconductor fabrication plant (FAB) operating the manufacturing equipment or a maintenance technician who fixes and maintains the equipment. So, it is important to provide these different data views to the users in a logical, organized way. This paper will discuss what a dashboard is, an overview of the semiconductor manufacturing process, and one implementation of a dashboard for the semiconductor industry, the Semiconductor Manufacturing Dashboard (SMD). An explanation of the systems involved in collecting and loading the data, the database structures, and the web servers used for development and production will also be discussed. / text

abstract: Ramping up a semiconductor wafer fabrication facility is a challenging endeavor. One of the key components of this process is to schedule a large number of activities in installing and qualifying (Install/Qual) the capital intensive and sophisticated manufacturing equipment. Activities in the Install/Qual process share multiple types of expensive and scare resources and each activity might potentially have multiple processing options. In this dissertation, the semiconductor capital equipment Install/Qual scheduling problem is modeled as a multi-mode resource-constrained project scheduling problem (MRCPSP) with multiple special extensions. Three phases of research are carried out: the first phase studies the special problem characteristics of the Install/Qual process, including multiple activity processing options, time-varying resource availability levels, resource vacations, and activity splitting that does not allow preemption. A modified precedence tree-based branch-and-bound algorithm is proposed to solve small size academic problem instances to optimality. Heuristic-based methodologies are the main focus of phase 2. Modified priority rule-based simple heuristics and a modified random key-based genetic algorithm (RKGA) are proposed to search for Install/Qual schedules with short makespans but subject to resource constraints. Methodologies are tested on both small and large random academic problem instances and instances that are similar to the actual Install/Qual process of a major semiconductor manufacturer. In phase 3, a decision making framework is proposed to strategically plan the Install/Qual capacity ramp. Product market demand, product market price, resource consumption cost, as well as the payment of capital equipment, are considered. A modified simulated annealing (SA) algorithm-based optimization module is integrated with a Monte Carlo simulation-based simulation module to search for good capacity ramping strategies under uncertain market information. The decision making framework can be used during the Install/Qual schedule planning phase as well as the Install/Qual schedule execution phase when there is a portion of equipment that has already been installed or qualified. Computational experiments demonstrate the effectiveness of the decision making framework. / Dissertation/Thesis / Doctoral Dissertation Industrial Engineering 2015

With the increasing interest in wide-band gap devices, their potential benefits in power applications have been studied and explored with numerous studies conducted for both SiC and GaN devices. This thesis investigates the use of wide-band gap devices as the switching element in a semiconductor DC breaker. It involves the design of an efficient semiconductor DC breaker, its simulation in SPICE, construction of a hardware prototype and the comparative study of SiC and Si versions of the aforementioned breaker. The results obtained from the experiments conducted in the process of concluding this thesis show that the SiC version of the breaker is a superior option for a semiconductor DC breaker.