No description available.

A sequence of electrical tests was developed to provide a viable alternative to the performance of high magnification visual inspection for high reliability integrated circuits in a large volume production environment. The primary approach was based on: close monitoring of the Substrate-N epi I-V characteristics, voltage overstress exposure and subsequent verification of the devices' low level leakage and thermal response. This method was implemented and evaluated for the specific case of a 16K Bipolar Schottky PROM. Reliability tests indicated that devices processed using the proposed alternate screen sequence achieved failure rates as low as those obtained using high magnification visual inspection.

by Kwan Wai Wing Eric. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1996. / Includes bibliographical references. / ABSTRACT / ACKNOWLEDGMENT / LIST OF FIGURES / LIST OF TABLES / Chapter Chapter 1 --- Introduction / Chapter 1.1 --- Background --- p.1-1 / Chapter 1.2 --- E-Beam testing and test generation algorithm --- p.1-2 / Chapter 1.3 --- Motivation of this research --- p.1-4 / Chapter 1.4 --- Out-of-kilter Algorithm --- p.1-6 / Chapter 1.5 --- Outline of the remaining chapter --- p.1-7 / Chapter Chapter 2 --- Electron Beam Testing / Chapter 2.1 --- Background and Theory --- p.2-1 / Chapter 2.2 --- Principles and Instrumentation --- p.2-4 / Chapter 2.3 --- Implication of internal IC testing --- p.2-6 / Chapter 2.4 --- Advantage of Electron Beam Testing --- p.2-7 / Chapter Chapter 3 --- An exhaustive method to minimize test sets / Chapter 3.1 --- Basic Principles --- p.3-1 / Chapter 3.1.1 --- Controllability and Observability --- p.3-1 / Chapter 3.1.2 --- Single Stuck at Fault Model --- p.3-2 / Chapter 3.2 --- Fault Dictionary --- p.3-4 / Chapter 3.2.1 --- Input Format --- p.3-4 / Chapter 3.2.2 --- Critical Path Generation --- p.3-6 / Chapter 3.2.3 --- Probe point insertion --- p.3-8 / Chapter 3.2.4 --- Formation of Fault Dictionary --- p.3-9 / Chapter Chapter 4 --- Mathematical Model - Out-of-kilter algorithm / Chapter 4.1 --- Network Model --- p.4-1 / Chapter 4.2 --- Linear programming model --- p.4-3 / Chapter 4.3 --- Kilter states --- p.4-5 / Chapter 4.4 --- Flow change --- p.4-7 / Chapter 4.5 --- Potential change --- p.4-9 / Chapter 4.6 --- Summary and Conclusion --- p.4-10 / Chapter Chapter 5 --- Apply Mathematical Method to minimize test sets / Chapter 5.1 --- Implementation of OKA to the Fault Dictionary --- p.5-1 / Chapter 5.2 --- Minimize test set and optimize internal probings / probe points --- p.5-5 / Chapter 5.2.1 --- Minimize the number of test vectors --- p.5-5 / Chapter 5.2.2 --- Find the optimum number of internal probings --- p.5-8 / Chapter 5.2.3 --- Find the optimum number of internal probe points --- p.5-11 / Chapter 5.3 --- Fixed number of internal probings/probe points --- p.5-12 / Chapter 5.4 --- True minimum test set and optimum probing/ probe point --- p.5-14 / Chapter Chapter 6 --- Implementation and work examples / Chapter 6.1 --- Generation of Fault Dictionary --- p.6-1 / Chapter 6.2 --- Finding the minimum test set without internal probe point --- p.6-5 / Chapter 6.3.1 --- Finding the minimum test set with optimum internal probing --- p.6-10 / Chapter 6.3.2 --- Finding the minimum test set with optimum internal probe point --- p.6-24 / Chapter 6.4 --- Finding the minimum test set by fixing the number of internal probings at 2 --- p.6-26 / Chapter 6.5 --- Program Description --- p.6-35 / Chapter Chapter 7 --- Realistic approach to find the minimum solution / Chapter 7.1 --- Problem arising in exhaustive method --- p.7-1 / Chapter 7.2 --- Improvement work on existing test generation algorithm --- p.7-2 / Chapter 7.3 --- Reduce the search set --- p.7-5 / Chapter 7.3.1 --- Making the Fault Dictionary from existing test generation algorithm --- p.7-5 / Chapter 7.3.2 --- Making the Fault Dictionary by random generation --- p.7-9 / Chapter Chapter 8 --- Conclusions / Chapter 8.1 --- Summary of Results --- p.8-1 / Chapter 8.2 --- Further Research --- p.8-5 / REFERENCES --- p.R-1 / Chapter Appendix A --- Fault Dictionary of circuit SC1 --- p.A-1 / Chapter Appendix B --- Fault Dictionary of circuit SC7 --- p.B-1 / Chapter Appendix C --- Simple Circuits Layout --- p.C-1

by Kwong-hon Lee. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1993. / Includes bibliographical references (leaves [112-115]). / Chapter CHAPTER 1. --- INTRODUCTION / Chapter CHAPTER 2. --- PRINCIPLE OF ELLIPSOMETER / Chapter CHAPTER 3. --- MATHEMATICAL REPRESENTATION OF ELLIPSOMETRY / Chapter Section 3.1 --- Ambient Substrate / Chapter Section 3.2 --- Single Layer (Ambient-film substrate) / Chapter Section 3.3 --- Multilayer system (Isotropic Stratified planar structure) / Chapter CHAPTER 4. --- CLASSIFICATION OF ELLIPSOMETER / Chapter Section 4.1 --- Null-type Ellipsometer / Chapter Section 4.2 --- Photometric Ellipsometer / Chapter Section 4.3 --- Spectroscopic Ellipsometer / Chapter CHAPTER 5. --- CONSTRUCTION AND CALIBRATION OF THE SPECTROSCOPIC ELLIPSOMETER / Chapter Section 5.1 --- Design and construction / Chapter 5.1.1 --- Optical Assembly / Chapter 5.1.2 --- Electronic Circuit / Chapter 5.1.3 --- Micro-computer (Software) / Chapter 5.1.4 --- Modification of configuration / Chapter Section 5.2 --- Alignment and Calibration / Chapter 5.2.1 --- Alignment of Optical units / Chapter 5.2.2 --- Calibration of the system / Chapter 5.2.3 --- Measurements on standard samples / Chapter CHAPTER 6. --- ANALYSIS OF ELLIPSOMETRIC PARAMETERS / Chapter Section 6.1 --- Ambient-substrate model / Chapter Section 6.2 --- Ambient-layers model / Chapter 6.2.1 --- Parameter generator / Chapter 6.2.2 --- Least square fitting / Chapter 6.2.3 --- Choice of error function / Chapter CHAPTER 7. --- EXPERIMENTAL RESULT / Chapter Section 7.1 --- Spectra of Refractive index / Chapter 7.1.1 --- Low temperature MBE growth GaAs / Chapter 7.1.2 --- Amorphous Carbon / Chapter 7.1.3 --- High order x AlxGa1-xAs with different cooling rate / Chapter Section 7.2 --- Comparison of ellipsometric spectrum of SOI samples / Chapter 7.2.1 --- Difficulty in the analysis of multi-layer structure / Chapter 7.2.2 --- Silicon on insulator (SOI) / Chapter 7.2.2.1 --- The beam current effects / Chapter 7.2.2.2 --- Annealing after implantation / Chapter CHAPTER 8. --- CONCLUSION / Chapter Section8.1 --- Summary of the results / Chapter Section8.2 --- Suggestions for future work / REFERENCE / APPENDIX(A)MARQUART ALGORITHM / Chapter (B) --- CIRCUIT DIAGRAM

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published_or_final_version / Physics / Master / Master of Philosophy

No description available.

published_or_final_version / abstract / Physics / Doctoral / Doctor of Philosophy

A primarily software based Fourier Deep Level Transient Spectroscope (FDLTS) is built. The raw capacitance transient is acquired and digitized using capacitance meter HP4280A whereas the signal analysis is done using a customized software module. The software module calculates both the conventional DLTS spectrum and the Fourier DLTS spectrum. This home-made FDLTS set up was compared to a commercial conventional box-car DLTS system (Sula Technology's DLTS) as well as to a commercial Fourier DLTS system (Bio-rad) and it was found to be either equivalent to the commercial systems or even better in some respects. In one case, Fourier analysis using the home-made setup, led to the detection of a trap completely undetected by the commercial conventional DLTS. The FDLTS system together with the commercial conventional DLTS were used to study possible gold contamination in an industrial process. The study was accomplished by comparing conventional and Fourier DLTS spectra and corresponding calculated trap properties using Schottky barrier diodes fabricated on the suspect wafers and an intentionally gold diffused reference sample wafer. During the investigation minority carrier emission in DLTS using Schottky barrier diodes was observed. The study revealed the presence of some possible gold-like contamination which trapped minority carriers (i.e. electrons) in p type silicon. / Graduation date: 2003