Internet is growing every day and this is leading to an address depletion of the current IPv4 addresses. A new version of IPv4, called IPv6, is the protocol for addressing computers that will deal with this problem. IPv4 and IPv6 are unfortunately not compatible with each other. IPv4 and IPv6 have to co-exist for a long time until IPv6 will be the dominant protocol. The purpose of this thesis is to examine how a transition could be done or more correctly, how to deploy IPv6 in an already existing IPv4 network. After that part of the report a case study at the local Internet service provider Junet AB will be conducted. This case study will investigate an IPv6 deployment scenario for Junet AB. A theoretical background has been written that describes some steps an Internet service provider has to go through to deploy IPv6. The case study was conducted after the theoretical background was written. The result of this report shows that a deployment of IPv6 in an IPv4 network is technically achievable. All the main components to maintain and use IPv6 in a commercial network exist. The case study indicates that it is possible to deploy IPv6 in Junet AB´s network. IPv4 and IPv6 could be used in their network without any major effort. IPv6 have been around for many years now but have not had that break through many early adopters have hoped for. A lack of documentation and experience is an obstacle for a deployment of IPv6.One thing that remains now is to prove that there is a need for IPv6, but that is out of scope for this thesis.

Des méthodes efficaces s'appuyant sur des outils statistiques pour réaliser dela reconnaissance de mouvement ont été développé. Ces méthodes reposent surl'apprentissage de primitives situé dans des espaces approprié, par exemplel'espace latent de l'espace articulaire et/ou d'espace de tâches adéquat. Lesprimitives apprises sont souvent séquentielle: un mouvement est segmenté selonl'axe des temps. Dans le cas d'un robot humanoïde, le mouvement peut êtredécomposé en plusieurs sous-tâches simultanées. Par exemple dans un scénario deserveur, le robot doit placer une assiette sur la table avec une main tout enmaintenant son plateau horizontal avec son autre main. La reconnaissance nepeut donc pas se limiter à une seule et unique tâche par segment de tempsconsécutif. La méthode présenté dans ces travaux utilise la connaissance destâches que le robot est capable d'accomplir, ainsi que des contrôleurs quigénèreront les mouvements pour réaliser une rétro ingénierie sur un mouvementobservé. Cette analyse est destinée à reconnaître des tâches qui ont été exécutéde manière simultanées. La méthode repose sur la fonction de tâche et lesprojections dans l'espace nul des tâches afin de découpler les contrôleurs.L'approche a été appliqué avec succès sur un vrai robot pour distinguer desmouvements visuellement très proches, mais sémantiquement différents / Efficient methods to perform motion recognition have been developed usingstatistical tools. Those methods rely on primitives learning in a suitablespace, for example the latent space of the joint angle and/or adequate taskspaces. The learned primitives are often sequential : a motion is segmentedaccording to the time axis. When working with a humanoid robot, a motion can bedecomposed into simultaneous sub-tasks. For example in a waiter scenario, therobot has to keep some plates horizontal with one of his arms, while placing aplate on the table with its free hand. Recognition can thus not be limited toone task per consecutive segment of time. The method presented in this worktakes advantage of the knowledge of what tasks the robot is able to do and howthe motion is generated from this set of known controllers to perform a reverseengineering of an observed motion. This analysis is intended to recognizesimultaneous tasks that have been used to generate a motion. The method relieson the task-function formalism and the projection operation into the null spaceof a task to decouple the controllers. The approach is successfully applied ona real robot to disambiguate motion in different scenarios where two motionslook similar but have different purposes

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As the functionality that current computer network can provide is becoming complicated, a traditional router with application-specific integrated circuit (ASIC) implementation can't satisfy the flexibility requirements. Instead, a programmable packet forward system based on a general-purpose processor could provide the flexibility. While this system provides flexibility, a new potential security issue arises. Usually, software is involved as the packet forward system is programmable. The software's potential vulnerability, especially as to the remote exploits, becomes an issue of network security. In this thesis work, we proposed a software stack overflow vulnerability on click modular router and show how a disastrous denial-of-service attack on click modular router could be triggered by a single packet. In our research work, click modular router runs on Linux operating system based on general-purpose hardware. We actually showed that even a software router run within a modern operating system's protection is vulnerable by elaborate attack. And we checked the possible stack protection mechanisms on modern OS based on general-purpose hardware and proposed a possible stack protection mechanism for embedded OS.

FPGA-CF is an open-source, portable, extensible communications framework that consists of a small hardware core (less than 600 slices) and a software library/API (Java and C++). It enables a host PC to transmit data at 120 Mb/s to Xilinx-based FPGA boards via Ethernet using standard inter-networking protocols (UDP/IP). A custom lightweight connection-oriented protocol guarantees reliability. The hardware core is directly connected to the Xilinx internal configuration port (ICAP) and supports all ICAP functionality. The core also provides an extensible user-channel interface and provides up to 15, 8-bit user-data channels that can be connected to user circuitry (configurable by the user). The host software API supports both Java and C++ and provides high-level functionality for making connections and transmitting data. The utility of the system is demonstrated by implementing an on-chip test/debug system using FPGA-CF.

This thesis explores the critical role of usability in software development and uses usability heuristics as a cost-effective and efficient method for evaluating various software functions and interfaces. With the proliferation of software development in the modern digital age, developing user-friendly interfaces that meet the needs and preferences of users has become a complex process. Usability heuristics, a set of guidelines based on principles of human-computer interaction, provide a starting point for designers to create intuitive, efficient, and easy-to-use interfaces that provide a seamless user experience. The study uses Jakob Nieson's ten usability heuristics to evaluate the usability of Stack Overflow posts, a popular Q\&A website for developers. Through the analysis of 894 posts related to usability, the study identifies common usability problems faced by users and developers, providing valuable insights into the effectiveness of usability guidelines in software development practice. The research findings emphasize the need for ongoing evaluation and improvement of software interfaces to ensure a seamless user experience. The thesis concludes by highlighting the potential of usability heuristics in guiding the design of user-friendly software interfaces and improving the overall user experience in software development.

The primary research objective of this dissertation is to demonstrate that the effects of communication protocol stack offload (CPSO) on application execution time can be attributed to the following two complementary sources. First, the application-specific computation may be executed concurrently with the asynchronous communication performed by the communication protocol stack offload engine. Second, the protocol stack processing can be accelerated or decelerated by the offload engine. These two types of performance effects can be quantified with the use of the degree of overlapping Do and degree of acceleration Daccs. The composite communication speedup metrics S_comm(Do, Daccs) can be used in order to quantify the combined effects of the protocol stack offload. This dissertation thesis is validated empirically. The degree of overlapping Do, the degree of acceleration Daccs, and the communication speedup Scomm characteristic of the system configurations under test are derived in the course of experiments performed for the system configurations of interest. It is shown that the proposed metrics adequately describe the effects of the protocol stack offload on the application execution time. Additionally, a set of analytical models of the networking subsystem of a PC-based cluster node is developed. As a result of the modeling, the metrics Do, Daccs, and Scomm are obtained. The models are evaluated as to their complexity and precision by comparing the modeling results with the measured values of Do, Daccs, and Scomm. The primary contributions of this dissertation research are as follows. First, the metric Daccs and Scomm are introduced in order to complement the Do metric in its use for evaluation of the effects of optimizations in the networking subsystem on parallel performance in clusters. The metrics are shown to adequately describe CPSO performance effects. Second, a method for assessing performance effects of CPSO scenarios on application performance is developed and presented. Third, a set of analytical models of cluster node networking subsystems with CPSO capability is developed and characterised as to their complexity and precision of the prediction of the Do and Daccs metrics.

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