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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Programming & Implementation of Streaming Applications

Johnsson, Ola, Stenemo, Magnus, Zain-ul-Abdin, January 2005 (has links)
Streaming applications like multimedia and radar signal processing applications are becoming increasingly compute-intensive. To overcome the computational demands new parallel architectures are emerging.   The programming tools provided with these architectures require low-level programming, which creates a need for a common high-level architecture independent language that can exploit parallelism efficiently. One such language is StreamIt, designed around the notions of streams and stream transformers, which allows efficient mapping to a variety of architectures.   The overall goal of this master’s thesis is to evaluate the StreamIt language from a programmability and portability point of view. An MPD-application has been developed in StreamIt, which is executed on the RAW simulator. Furthermore, a code generator is designed to compile and execute the application on the XPP simulator.   The conclusions drawn are that StreamIt is easy to learn, but hard to use because of its programming paradigm as compared to conventional languages. StreamIt programming involves thinking in terms of streams instead of globally accessed memory. The structure of StreamIt makes it easy to reuse components and modify the application. The construction of the compiler makes it possible to port StreamIt application to various architectures.
2

Programming & Implementation of Streaming Applications

Johnsson, Ola, Stenemo, Magnus, ul-Abdin, Zain January 2005 (has links)
<p>Streaming applications like multimedia and radar signal processing applications are becoming </p><p>increasingly compute-intensive. To overcome the computational demands new parallel </p><p>architectures are emerging. </p><p> </p><p>The programming tools provided with these architectures require low-level programming, which </p><p>creates a need for a common high-level architecture independent language that can exploit </p><p>parallelism efficiently. One such language is StreamIt, designed around the notions of streams </p><p>and stream transformers, which allows efficient mapping to a variety of architectures. </p><p> </p><p>The overall goal of this master’s thesis is to evaluate the StreamIt language from a </p><p>programmability and portability point of view. An MPD-application has been developed in </p><p>StreamIt, which is executed on the RAW simulator. Furthermore, a code generator is designed to </p><p>compile and execute the application on the XPP simulator. </p><p> </p><p>The conclusions drawn are that StreamIt is easy to learn, but hard to use because of its </p><p>programming paradigm as compared to conventional languages. StreamIt programming involves </p><p>thinking in terms of streams instead of globally accessed memory. The structure of StreamIt </p><p>makes it easy to reuse components and modify the application. The construction of the compiler </p><p>makes it possible to port StreamIt application to various architectures.</p>
3

Bit-Packing Optimization for StreamIt

Agrawal, Kunal, Amarasinghe, Saman P., Wong, Weng Fai 01 1900 (has links)
StreamIt is a language specifically designed for modern streaming applications. A certain important class of these applications operates on streams of bits. This paper presents the motivation for a bit-packing optimization to be implemented in the StreamIt compiler for the RAW Architecture. This technique aims to pack bits into integers so that operations can be performed on multiple bits at once thus increasing the performance of these applications considerably. This paper gives some simple example applications to illustrate the various conditions where this technique can be applied and also analyses some of its limitations. / Singapore-MIT Alliance (SMA)
4

Design methodologies for pipelined MPSoCs targeting multimedia applications

Javaid, Haris , Computer Science & Engineering, Faculty of Engineering, UNSW January 2009 (has links)
The semiconductor industry has seen a paradigm shift from Application Specific Integrated Circuits to Multiprocessor System on Chip systems over the last decade, primarily due to the miniaturization of the transistor. However, billion of transistors available on a single chip need to be used efficiently to provide more functionalities in portable devices, yet minimize power and chip area, which increases the design complexity of multiprocessor systems. Tighter time to market deadlines further pressurizes the designer, requiring a comprehensive automation of the design process of such complex multiprocessor systems. This thesis presents a design automation methodology for the design of Multiprocessor System on Chip (MPSoC) systems for multimedia applications. This thesis introduces a heterogeneous multiprocessor system where processing elements are connected in a pipelined fashion. A multimedia application is executed very efficiently on a pipelined system due to the stream oriented data flow nature of such applications. Application Specific Instruction set Processors (ASIPs) are used as the elementary processing elements in the multiprocessor system as they can be customized according to the application tasks assigned to them. The problem of selecting a processor configuration for each of the ASIPs in the pipelined system is formalized. We present three different techniques to select processor configurations by exploring the design space of an ASIP based pipelined system, and integrating them into a flexible and designer driven design flow for efficient exploration of large design spaces in order of 10^16 design points. The first two techniques are based on Integer Linear Programming (ILP), named Exact ILP formulation (EIF) and Reduced ILP formulation (RIF), while the third technique is based on a novel heuristic. We also developed a design space pruning algorithm that can enable the use of EIF and RIF to obtain optimal or near optimal design points from large design spaces. For four multimedia applications, we show that RIF and the heuristic can explore the design space and reveal the Pareto front in several hours, while EIF took several days to obtain the Pareto front. The quick availability of the Pareto front of a design space will help the designer to make early changes in the design. Furthermore, it is shown that, on average, the error incurred by RIF and the heuristic is within 1.25% and 2.25% of the optimal design points obtained via EIF for all the four multimedia applications. In the worst case, RIF introduced an error of 17.08% while the heuristic had an error of 11.39%.
5

Parallelize streaming applications on Microgrid CPUs: A novel application on a scalable, multicore architecture.

Mishra, Abhishek 29 September 2014 (has links)
No description available.
6

Performance Analysis and Implementationof Predictable Streaming Applications onMultiprocessor Systems-on-Chip

Zhu, Jun January 2010 (has links)
Driven by the increasing capacity of integrated circuits, multiprocessorsystems-on-chip (MPSoCs) are widely used in modern consumer electron-ics devices. In this thesis, the performance analysis and implementationmethodologies are explored to design predictable streaming applications onMPSoCs computing platforms. The application functionality and concur-rency are described in synchronous data flow (SDF) computational models,and two state-of-the-art architecture templates are adopted as multiproces-sor architectures, i.e., network-on-chip (NoC) based MPSoC and hybrid re-configurable CPU/FPGA platforms. Based on the author’s contributions onsimulation and formal analytical methods, performance analysis and designspace exploration for embedded MPSoCs architectures have been addressed. An energy efficient design space exploration flow is proposed for stream-ing applications with guaranteed throughput on NoC based MPSoCs, in whichboth application throughput analysis and system energy calculation are car-ried out by simulation on a multi-clocked synchronous modelling frame-work. On the other hand, based on event models of data streams, a formalanalytical scheduling framework for real-time streaming applications withminimal buffer requirement on hybrid CPU/FPGA architectures is exploited.The scheduling problem has been formalized declaratively by constraint basetechniques, and solved by a public domain constraint solver. Consecutively,the constraint based method has been extended to solve problems rangingfrom global computation/communication scheduling and reconfiguration anal-ysis to Pareto efficient design. Finally, a prototype of stream processing sys-tem on FPGA based MPSoC is built to substantiate the results from theoreti-cal studies in this thesis. / QC 20101207 / SysModel / Andres
7

SPLITS Stream Handlers: Deploying Application-level Services to Attached Network Processor

Gavrilovska, Ada 12 July 2004 (has links)
Modern distributed applications utilize a rich variety of distributed services. Due to the computation-centric notions of modern machines, application-level implementations of these services are problematic for applications requiring high data transfer rates, for reasons that include the inability of modern architectures to efficiently execute computations with communication. Conversely,network-level implementations of services are limited due to the network's inability to interpret application-level data or execute application-level operations on such data. The emergence of programmable network processors capable of high-rate data transfers, with flexible interfaces for external reconfiguration, has created new possibilities for movement of processing into the network infrastructure. This thesis explores the extent to which programmable network processors can be used in conjunction with standard host nodes, to form enhanced computational host-ANP (Attached Network Processor) platforms that can deliver increased efficiency for variety of applications and services. The main contributions of this research are the creation of SPLITS, a Software architecture for Programmable LIghtweighT Stream handling, and its key abstraction stream handlers. SPLITS enables the dynamic configuration of data paths through the host-ANP nodes, and the dynamic creation, deployment and reconfiguration of application-level processing applied along these paths. With SPLITS, application-specific services can be dynamically mapped to the host, ANP, or both, to best exploit their joint capabilities. The basic abstraction used by SPLITS to represent instances of application-specific activities are stream handlers - parameterizable, lightweight, computation units that operate on data headers as well as application-level content. Experimental results demonstrate performance gains of executing various application-level services on ANPs, and demonstrate the importance of the SPLITS host-ANP nodes to support dynamically reconfigurable services, and to deal with the resource limitations on the ANPs.
8

Utilizing Heterogeneity in Manycore Architectures for Streaming Applications

Savas, Süleyman January 2017 (has links)
In the last decade, we have seen a transition from single-core to manycore in computer architectures due to performance requirements and limitations in power consumption and heat dissipation. The first manycores had homogeneous architectures consisting of a few identical cores. However, the applications, which are executed on these architectures, usually consist of several tasks requiring different hardware resources to be executed efficiently. Therefore, we believe that utilizing heterogeneity in manycores will increase the efficiency of the architectures in terms of performance and power consumption. However, development of heterogeneous architectures is more challenging and the transition from homogeneous to heterogeneous architectures will increase the difficulty of efficient software development due to the increased complexity of the architecture. In order to increase the efficiency of hardware and software development, new hardware design methods and software development tools are required. Additionally, there is a lack of knowledge on the performance of applications when executed on manycore architectures. The transition began with a shift from single-core architectures to homogeneous multicore architectures consisting of a few identical cores. It now continues with a shift from homogeneous architectures with identical cores to heterogeneous architectures with different types of cores specialized for different purposes. However, this transition has increased the complexity of architectures and hence the complexity of software development and execution. In order to decrease the complexity of software development, new software tools are required. Additionally, there is a lack of knowledge on what kind of heterogeneous manycore design is most efficient for different applications and what are the performances of these applications when executed on current commercial manycores. This thesis studies manycore architectures in order to reveal possible uses of heterogeneity in manycores and facilitate choice of architecture for software and hardware developers. It defines a taxonomy for manycore architectures that is based on the levels of heterogeneity they contain and discusses benefits and drawbacks of these levels. Additionally, it evaluates several applications, a dataflow language (CAL), a source-to-source compilation framework (Cal2Many), and a commercial manycore architecture (Epiphany). The compilation framework takes implementations written in the dataflow language as input and generates code targetting different manycore platforms. Based on these evaluations, the thesis identifies the bottlenecks of the architecture. It finally presents a methodology for developing heterogeneoeus manycore architectures which target specific application domains. Our studies show that using different types of cores in manycore architectures has the potential to increase the performance of streaming applications. If we add specialized hardware blocks to a core, the performance easily increases by 15x for the target application while the core size increases by 40-50% which can be optimized further. Other results prove that dataflow languages, together with software development tools, decrease software development efforts significantly (25-50%) while having a small impact (2-17%) on the performance. / HiPEC (High Performance Embedded Computing) / NGES (Towards Next Generation Embedded Systems: Utilizing Parallelism and Reconfigurability)
9

A Framework for Providing Automatic Resource and Accuracy Management in a Cloud Environment

Vijayakumar, Smita 30 July 2010 (has links)
No description available.
10

Deployment and Integrity Verification of Streaming IoT Applications on Edge Computing

Lou, Shuangsheng 09 August 2022 (has links)
No description available.

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