• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 359
  • 127
  • 95
  • 46
  • 45
  • 37
  • 27
  • 17
  • 16
  • 10
  • 7
  • 7
  • 6
  • 6
  • 4
  • Tagged with
  • 873
  • 490
  • 290
  • 278
  • 233
  • 146
  • 113
  • 111
  • 104
  • 101
  • 97
  • 93
  • 90
  • 80
  • 73
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Desenvolvimento de uma arquitetura parametrizável para processamento da pilha TCP/IP em hardware / Development of a customizable architecture to TCP/IP stack processing in hardware

Hamerski, Jean Carlo January 2008 (has links)
O aumento da popularidade da Internet e a criação de novos meios de transmissão estimulam um explosivo crescimento da taxa de transmissão de dados sobre a Internet. Assim, o processamento TCP/IP baseado em software torna-se um gargalo por não processar os pacotes na velocidade das linhas de transmissão, em especial os pacotes da camada de transporte. Conseqüentemente, surge a necessidade de implementação em hardware do processamento TCP/IP, o que traria vantagens como aceleração do processamento do fluxo de dados. Neste sentido, este trabalho apresenta a arquitetura do iNetCore, descrita em VHDL, para processamento dos protocolos das camadas de rede e transporte em hardware. Duas implementações desta arquitetura foram elaboradas, buscando explorar o espaço de projeto e analisar os resultados obtidos na síntese para a tecnologia ASIC e FPGA, e o desempenho no processamento de pacotes. Uma arquitetura HW/SW contendo o iNetCore foi prototipada sobre a placa Virtex- II Pro Development System. Em conjunto com essa arquitetura, foi implementada uma interface de comunicação com o barramento OPB, tornando possível a implementação de softwares da camada de aplicação que queiram usar a pilha TCP/IP desenvolvida em hardware. Por fim, foram efetuados experimentos para avaliar o desempenho da arquitetura HW/SW no processamento de segmentos TCP. A arquitetura HW/SW em conjunto com o iNetCore alcançou um throughput de até 1,45 Gbps, possibilitando o uso da arquitetura para processamento de pacotes TCP/IP na plenitude de banda disponíveis em redes gigabit. / The advent of new transmission lines stimulates an explosive increase of the Internet data-transmission rate. Thus, the TCP/IP processing based on software became a bottleneck, because it cannot reach the transmission line speed required, specially in the transmission of transport layer packets. This limitation brings the necessity of implementation of the TCP/IP processing in hardware, what it would bring advantages in the acceleration of data flow processing. In this way, this work presents the iNetCore architecture, described in VHDL, able to process the transport and network layers protocols in hardware. Two implementations of this architecture were implemented. The objective is to explore the design space and to analyze the results in ASIC and FPGA technology synthesis. Also, a simulation environment was built to analyze the performance in the packets computation. A HW/SW architecture containing the iNetcore was prototyped on Virtex-II Pro Development System board. In conjunction with this architecture, it was implemented a communication interface with OPB bus, which makes possible the development of application layer softwares that may use the hardware TCP/IP stack developed. Finally, experiments were realized in order to evaluate the HW/SW architecture performance in the TCP segments processing. The HW/SW architecture together with the iNetCore reached a throughput of about 1.45 Gbps in the TCP/IP packets processing. It proves its potential to use available bandwidth in gigabit networks.
32

Desenvolvimento de uma arquitetura parametrizável para processamento da pilha TCP/IP em hardware / Development of a customizable architecture to TCP/IP stack processing in hardware

Hamerski, Jean Carlo January 2008 (has links)
O aumento da popularidade da Internet e a criação de novos meios de transmissão estimulam um explosivo crescimento da taxa de transmissão de dados sobre a Internet. Assim, o processamento TCP/IP baseado em software torna-se um gargalo por não processar os pacotes na velocidade das linhas de transmissão, em especial os pacotes da camada de transporte. Conseqüentemente, surge a necessidade de implementação em hardware do processamento TCP/IP, o que traria vantagens como aceleração do processamento do fluxo de dados. Neste sentido, este trabalho apresenta a arquitetura do iNetCore, descrita em VHDL, para processamento dos protocolos das camadas de rede e transporte em hardware. Duas implementações desta arquitetura foram elaboradas, buscando explorar o espaço de projeto e analisar os resultados obtidos na síntese para a tecnologia ASIC e FPGA, e o desempenho no processamento de pacotes. Uma arquitetura HW/SW contendo o iNetCore foi prototipada sobre a placa Virtex- II Pro Development System. Em conjunto com essa arquitetura, foi implementada uma interface de comunicação com o barramento OPB, tornando possível a implementação de softwares da camada de aplicação que queiram usar a pilha TCP/IP desenvolvida em hardware. Por fim, foram efetuados experimentos para avaliar o desempenho da arquitetura HW/SW no processamento de segmentos TCP. A arquitetura HW/SW em conjunto com o iNetCore alcançou um throughput de até 1,45 Gbps, possibilitando o uso da arquitetura para processamento de pacotes TCP/IP na plenitude de banda disponíveis em redes gigabit. / The advent of new transmission lines stimulates an explosive increase of the Internet data-transmission rate. Thus, the TCP/IP processing based on software became a bottleneck, because it cannot reach the transmission line speed required, specially in the transmission of transport layer packets. This limitation brings the necessity of implementation of the TCP/IP processing in hardware, what it would bring advantages in the acceleration of data flow processing. In this way, this work presents the iNetCore architecture, described in VHDL, able to process the transport and network layers protocols in hardware. Two implementations of this architecture were implemented. The objective is to explore the design space and to analyze the results in ASIC and FPGA technology synthesis. Also, a simulation environment was built to analyze the performance in the packets computation. A HW/SW architecture containing the iNetcore was prototyped on Virtex-II Pro Development System board. In conjunction with this architecture, it was implemented a communication interface with OPB bus, which makes possible the development of application layer softwares that may use the hardware TCP/IP stack developed. Finally, experiments were realized in order to evaluate the HW/SW architecture performance in the TCP segments processing. The HW/SW architecture together with the iNetCore reached a throughput of about 1.45 Gbps in the TCP/IP packets processing. It proves its potential to use available bandwidth in gigabit networks.
33

MULTIPATH TCP IN WIRELESS NETWORKS

Palash, Mijanur R 01 May 2018 (has links)
Multipath TCP (MPTCP) is a new modification of TCP protocol which enables a client to transfer data over multiple paths simultaneously under a single TCP connection, for improved throughput and fault resilience. However, MPTCP is susceptible to some major drawbacks when applied in a wireless network. We found several cases where, despite improving individual MPTCP clients throughput, MPTCP reduces the capacity of the overall wireless network due to the mac level fairness and contention-based access schemes. Additionally, even if the bandwidth improves, employing Multipath TCP (MPTCP) in wireless networks can be energy inecient due to additional energy consumption by multiple interfaces. This creates a dilemma between bandwidth improvement and energy efficiency. This thesis research aims to solve these important issues for MPTCP in the wireless environment. We analyzed the root cause of these drawbacks and identified instances where they can arise. Two novel schemes denoted MPWiFi and kMPTCP, are developed to solve the bandwidth degradation and energy efficiency issues respectively, while maintaining the promised benefitts of MPTCP. The MPWiFi assigns dierent priorities to the subflows and aggressively suppresses some of them based on some design logic. Similarly, kMPTCP adds an additional multipath subflow only if the bandwidth requirement can't be fulllled by single path and the new subflow meets the data rate and signal strength condition. Moreover, kMPTCP keeps additional subflows as long as the signal strength remains in good range and this subflow remain mandatory to provide the necessary bandwidth to the application. These two schemes have been implemented along with Linux Kernel MPTCP implementation. Extensive real-world deployment and NS3 simulation show that the proposed schemes can eectively alleviate the adverse impacts of the MPTCP based multipath access in Wireless networks.
34

Optimisation de bout-en-bout du démarrage des connexions TCP / TCP startup end-to-end optimisation

Sallantin, Renaud 29 September 2014 (has links)
Dans cette thèse, nous proposons un mécanisme appelé Initial Spreading qui permet une optimisation remarquable des performances de TCP pour les connexions de petites tailles, représentant plus de 90% des connexions échangées dans l’Internet. Cette solution est d’autant plus intéressante que pour certaines technologies telles qu’un lien satellite, le temps d’aller-retour particulièrement long est très pénalisant, et des solutions spécifiques ont dû être implantées qui empêchent l’intégration du satellite dans un système de communication plus large. Nous montrons que l’Initial Spreading est non seulement plus performant, mais surtout plus général car pertinent dans toutes les situations. De plus, peu intrusif, il ne compromet aucune des évolutions de TCP passées ou à venir. / In this Ph.D. Thesis, we propose a mechanism called Initial Spreading that significantly improves the TCP short-lived connexions performance, and so more than 90% of the Internet connections. Indeed, if regular TCP without our mechanism can be considered as efficient for terrestrial networks, its behavior is strongly damaged by the long delay of a satellite communication. Satellite community developed then some satellite specific solutions that provide good performance, but prevent the joint use of satellite and other technologies. We show therefore that Initial Spreading is not only more efficient than regular solutions but enables also the use of an unique protocol whatever the context. Moreover, being non-intrusive, it is suitable for past and future TCP evolutions.
35

An Evaluation of Realistic TCP Traffic on Satellite Networks

Narasimhan, Priya 02 August 2002 (has links)
No description available.
36

Packet loss models of the Transmission Control Protocol

Zhou, Kaiyu., 周開宇. January 2006 (has links)
published_or_final_version / abstract / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy
37

A simulation and architectural study of TCP/IP

Becker, Bridget A. 01 December 1999 (has links)
This paper discusses current network technologies and protocols and presents a simulation study of the most common networking protocol used today, TCP/IP. The TCP/IP protocol stack has many inherent problems that will be shown through this simulation study. Using the SimpleScalar Toolset, the significance of the data copying and checksumming performed in TCP/IP will be shown along with the architecture needed to support the processing of TCP/IP. Solutions for these TCP/IP pitfalls including a zero-copy protocol and a design for an intelligent network interface card will also be presented. / Graduation date: 2000
38

Packet loss models of the Transmission Control Protocol

Zhou, Kaiyu. January 2006 (has links)
Thesis (Ph. D.)--University of Hong Kong, 2006. / Title proper from title frame. Also available in printed format.
39

Utveckling och analys av en PIC-mikrokontrollers möjligheter att kommunicera via TCP/IP

Snel, Daniel, Mattsson, Stefan January 2006 (has links)
Sterners Specialfabrik AB tillverkar bland annat mynt- och biljettautomater. För att underlätta felsökning, underhåll, avläsning av statistik med mera på en automat är det lämpligt att detta utförs på en PC över Internet. Det innebär att automaten inte behöver besökas då dessa uppgifter skall utföras. Examensarbetet går ut på att få en PIC mikrokontroller att kommunicera med en användare vid en PC över internet. För detta krävs att en TCP/IP stack implementeras på PICmikrokontrollern. Arbetet ledde till en fungerande demoapplikation som klarar av att kommunicera över TCP/IP. Demoapplikationen innehåller diverse olika funktioner för att demonstrera hur en automat skulle kunna styras och övervakas.
40

Microstructure analysis and failure mechanism of Cu wire bond and Inner Lead Bond

Chan, Chi-Ming 26 October 2010 (has links)
In this paper, there are two major investments consisted of ¡§Failure Mechanism of Inner Lead Au-Sn Bonds in Tape Automated Bonding (TCP) Packages¡¨ and ¡§Cu Wire bond microstructure analysis and failure mechanism¡¨. In view of the advantages of low cost, simple manufacturing process and significant miniaturization in size, TCP technology is widely applied in consumer electronic products. Inner lead bonding (ILB) process is especially crucial for the production of high quality TCP packages and components. The ILB process is extremely dynamic since the bonding time is around 0.2 second to complete the thermo-compress and soldering processes. The composition of liquid pool varied with the bond temperature and pressure and is crucial to exhibit different structure. One type of unusual failure bond happened during the process parameters optimization. ILB joints microstructure was examined by electron microprobe (EPMA) for detail phase analysis. The phase formation sequence of normal and failure bonds can be explained from the Au-Sn-Cu ternary phase diagram and thermo-chemistry data of Au-Sn binary. According to Part I study, the hypo-eutectic composition (<30 at% Sn) liquid pool could maintain the normal ILB bonds. And the hyper-eutectic composition (>30 at% Sn) has the potential risk to form this unusual failure bond. In the Part II study, copper wire bonding samples were aged at 205¢XC in air from 0 h to 2000 h. It was found that the bonding of a Cu wire and an Al pad formed Cu9Al4, CuAl, and CuAl2 intermetallic compounds, and an initial crack was formed by the ultrasonic squeeze effect during thermosonic wire bonding. The cracks grew towards the ball bond center with an increase in the aging time, and the Cl ions diffused through the crack into the ball center. This diffusion caused a corrosion reaction between the Cl ions and the Cu-Al intermetallic phases, which in turn caused copper wire bonding damage.

Page generated in 0.0263 seconds