Cell detection using image sensors is a novel and promising technique that can be used for diagnostic applications in medicine. For this purpose, cell detection studies with shadowing method are performed with yeast cells (Saccharomyces cerevisiae) using an 32&times / 32 complementary metal oxide semiconductor (CMOS) image sensor that is sensitive to optical illumination. Cells that are placed zero distance from the sensor surface are detected using the image sensor which is illuminated with four fixed leds to maintain fixed illumination levels in each test. Cells are transferred to the sensor surface with drying the medium they are in, which is phosphate buffered saline (PBS) solution. Yeast cells that are zero distance from the surface are detected with a detection rate of 72%. Then, MCF-7 (breast cancer) cells are detected with the same sensor when the PBS solution is about to dry. To investigate the detection capability of the sensor while the cells are in the PBS solution, the sensor surface is coated with gold in order to immobilize the surface with antibodies. With immobilizing antibodies, cells are thought to be bound to the surface achieving zero distance to the sensor surface. After coating gold, antibodies are immobilized, and same tests are done with MCF-7 cells. In the PBS solution, no sufficient results are obtained with the shadowing technique, but sufficient results are obtained when the solution is about to dry. After achieving cell detection with the image sensor, a similar but large format image sensor is designed. The designed CMOS image sensor has 160&times / 128 pixel array with 15&micro / m pitch. The pixel readout allows capacitive and optical detection. Thus, both DNA and cell detection are possible with this image sensor. The rolling line shutter mode is added for reducing further leakage at pixel readout. Addressing can be done which means specific array points can be investigated, and also array format can be changed for different size cells. The frame rate of the sensor can be adjusted allowing the detection of the fast moving cell samples. All the digital inputs of the sensor can be adjusted manually for the sake of flexibility. A large number of cells can be detected with using this image sensor due to its large format.

Understanding heart&rsquo / s electrical activity is very important because coronary problems -such as heart attacks, arrhythmia and stroke- are the leading cause of death in the world. Forward and inverse problems of electrocardiography (ECG) are methods that provide detailed information about the electrical activity of the heart. Forward problem of electrocardiography is the estimation of body surface potentials from equivalent cardiac sources. Inverse problem of electrocardiography can be described as estimation of the electrical sources in the heart using the potential measurements obtained from the body surface. Due to spatial smoothing and attenuation that occur within the thorax, inverse ECG problem is ill-posed and the transfer matrix is ill-conditioned. Thus, regularization is needed to find a stable and accurate solution. In this thesis, epicardial potentials used as equivalent cardiac sources to represent electrical activity of the heart and performances of five different regularization methods are compared. These regularization methods are Tikhonov regularization, truncated singular value decomposition, least squares QR factorization, truncated total least squares, and Lanczos truncated total least squares. Results are assessed qualitatively using correlation coefficient (CC) and relative difference measurement star (RDMS) measures. In addition, real and reconstructed surface potential distributions are compared qualitatively. Body surface potential measurements are simulated with different levels of measurement noise. Geometric errors are also included by changing the size and the location of the heart in the mathematical torso model. According to our test results, the performances of the regularization methods in solving the inverse ECG problem depend on the form and amount of the noise.

Quantum well infrared photodetectors (QWIP) utilize quantum wells of large bandgap materials to detect infrared radiation. When compared to conventional low bandgap LWIR photodetectors, the QWIP technology offers largest format thermal imagers with much better uniformity. The theoretical part of this study includes the development of a QWIP ensemble Monte-Carlo simulator. Capture paths of electrons to quantum wells are simulated in detail. For standard AlGaAs/GaAs QWIPs, at medium and high E-fields L valley quantum well (QW) is a trap for electrons which causes higher capture probability when compared with InP/InGaAs and GaAs/InGaAs QWIPs. The results suggest that high photoconductive gain observed in InP/InGaAs and GaAs/InGaAs QWIPs is not due to good transport properties of binary barrier material but due to higher &amp / #61511 / -L valley energy separation. The experimental part of the study includes the fabrication and characterization of InP/InGaAs and InP/InGaAsP QWIPs and 640x512 FPAs with the main objective of investigating the feasibility of these material systems for QWIPs. The InP/InGaAs and InP/InGaAsP QWIP detectors showed specific detectivity values above 1010 cm.Hz1/2/W (70K, f/2, background limited). The devices offer higher allowable system noise floor when compared with the standard AlGaAs/GaAs QWIP technology. It is also experimentally shown that for strategic applications LWIR InP based QWIPs have advantages over the standard QWIP technology. The InP/InGaAs 640x512 QWIP FPA reached 36 mK average NETD value at 70 K with f/1.5 optics and 10 ms integration time. The InP/InGaAsP QWIP on the other hand yielded 38 mK NETD histogram peak at 70 K with f/1.5 optics and 5 ms integration time on 320x256 window of the 640x512 FPA.

For millimeter wave applications, MMIC is the best contemporary technology. Considering the requirements of the commercial and military applications on amplitude and phase linearity, it is necessary to reduce the nonlinearity of the amplifiers. There are several linearization techniques that are used to reduce the nonlinearity effects. In the context of the thesis, a special analog predistortion technique that is called &ldquo / self cancellation scheme&rdquo / is used to linearize a 35GHz MMIC amplifier. The amplifier to be linearized is used in the design of the predistorter, that is why it is called self cancellation. This thesis contain the design of the amplifier, lumped element power divider and combiner circuits, and the complete analog predistortion linearizer. Layouts of linearizer system and its components are prepared and layout effects are taken into account.

In this thesis, an FPGA based hash processor is designed and implemented using a hardware description language / VHDL. Hash functions are among the most important cryptographic primitives and used in the several fields of communication integrity and signature authentication. These functions are used to obtain a fixed-size fingerprint or hash value of an arbitrary long message. The hash functions SHA-1 and SHA2-256 are examined in order to find the common instructions to implement them using same hardware blocks on the FPGA. As a result of this study, a hash processor supporting SHA-1 and SHA2-256 hashing and having a standard UART serial interface is proposed. The proposed hash processor has 14 instructions. Among these instructions, 6 of them are special instructions developed for SHA-1 and SHA-256 hash functions. The address length of the instructions is six bits. The data length is 32 bits. The proposed instruction set can be extended for other hash algorithms and they can be implemented over the same architecture. The hardware is described in VHDL and verified on Xilinx FPGAs. The advantages and open issues of implementing hash functions using a processor structure are also discussed.

Quantum Well Infrared Photodetector (QWIP) technology is promising for the development of large format low cost single and dual/multi color infrared sensor arrays. Thanks to the mature III-V semiconductor technology, QWIP focal plane arrays (FPAs) provide high uniformity and excellent noise equivalent temperature difference (NETD) in both long wavelength infrared (LWIR 8-12 &amp / #61549 / m) and mid wavelength infrared (MWIR 3-5 &amp / #61549 / m) bands. This thesis work focuses on the development of large format single and dual color MWIR QWIP FPAs. For single band MWIR detection, we report QWIP FPAs on InP substrate as an alternative to the GaAs based MWIR QWIPs suffering from the degrading effects of lattice mismatched epitaxy. In the course of this work, epitaxial growth conditions of the device structure were optimized and 640&times / 512 AlInAs/InGaAs QWIP FPAs on InP substrate have been fabricated yielding NETD of 22 mK (f/1.5) and background limited performance (BLIP) temperature as high as 115 K In the second part, we report the first voltage tunable 640&times / 512 dual color MWIR QWIP FPA. After optimizing epitaxial growth of AlGaAs/InGaAs material system, we have designed and implemented the device structure to yield voltage tunable spectral response in two different windows in the MWIR band. The FPA provides NETDs of 60 and 30 mK (f/1.5) in colors 1 and 2. The results are very encouraging for the development of low cost dual/multi color FPAs since our approach utilizes one In bump per pixel allowing fabrication of dual color FPAs with the same process steps for single color FPAs.

Unmanned Aerial Vehicles (UAVs) are remotely piloted or self-piloted aircrafts that can carry cameras, sensors, communications equipment or other payloads. Tiltrotor UAVs provide a unique platform that fulfills the needs for ever-changing mission requirements by combining the desired features / hovering like a helicopter and reaching high forward speeds like an airplane. In this work, the conceptual design and aerodynamical model of a realizable small-sized Tiltrotor UAV is constructed, the linearized state-space models are obtained around the trim points for airplane, helicopter and conversion modes, controllers are designed using Linear Quadratic Regulator (LQR) methods and gain-scheduling is employed to obtain a simulation for the whole flight envelope. The ideas for making a real flying model are established according to simulation results.

Considering the requirements of the commercial and military applications on amplitude and phase linearity, it is necessary to reduce nonlinearity of the amplifiers. There are several linearization techniques that are used to reduce nonlinearity effects. Feedforward linearization technique is known as one of the best linearization methods due to its superior linearization performance and broadband operation. Vector modulators which allows amplitude and phase modulation simultaneously, is the most important component of a feedforward system. In this thesis, first of all a broadband V/UHF vector modulator designed and implemented. Then a feedforward system is investigated and implemented using the designed vector modulator for V/UHF band.

This thesis aims to design a Network-on-Chip (NoC) that performs wormhole flow control method and source routing and aims to describe the design in VHDL language and implement it on an FPGA platform. In order to satisfy the diverse needs of different network traffic, the thesis aims to design the NoC in such a way that it can be modified via a user interface, which changes the descriptions in the VHDL source code. Network topology, number of router ports, number of virtual channels, buffer size and flit size are the features of the designed NoC that can be modified. In this thesis, interfaces and operations of the blocks in the NoC are defined through block diagrams and algorithmic state machines. Verification of these blocks is performed not only on computer environment via simulations tools, but also in real world. To achieve this, source nodes generating dummy flits are also designed which communicate with our user interface via RS-232 generating flits according to the information provided by the user and monitoring the received flits from other source nodes in real-time.

With the developments in space technology, the capabilities of spacecrafts have been increased considerably which in turn have entailed the development of more efficient spacecrafts in terms of cost, mass, size and power. One way to achieve such a development is the replacement of body mounted appendages with the deployable ones, which greatly reduces the size, mass and cost of the spacecraft especially when large appendages are considered. In order to obtain these deployable structures, deployment mechanisms and deployment mechanism drivers are used. A deployment mechanism is a combination of electrical and/or mechanical structures which hold the appendages in the stowed position before launch and deploys them after the launch with the power and commands supplied by the deployment mechanism driver. This necessary power of the deployment mechanism driver is produced by the Power Stage of the deployment mechanism driver and the necessary commands required by the deployment mechanism are supplied by the Control Stage of the deployment mechanism driver. In this thesis, the power stage of a deployment mechanism driver will be designed and implemented taking into account of the requirements for Low Earth Orbit Satellites such as temperature tolerance, reliability and radiation limits. In order to acquire a cost, mass and size efficient Power Stage, different deployment mechanism topologies will be studied and the most convenient one among these topologies will be chosen as the deployment mechanism driver load and the design will be performed accordingly.