In this thesis, an 8-bit microcontroller, 8051 core, is implemented using SystemC programming language. SystemC is a new generation co-design language which is capable of both programming software and describing hardware parts of a complete system. The benefit of this design environment appears while developing a System-on-Chip (SoC), that is a system consisting both custom hardware parts and embedded software parts. SystemC is not a completely new language, but based on C++ with some additional class libraries and extensions to handle hardware related concepts such as signals, multi-valued logic, clock and delay elements. 8051 is an 8 bit microcontroller which is widely used in industry for many years. The 8051 core is still being used as the main controller in today&rsquo / s highly complex chips, such as communication and bus controllers. During the development cycles of a System-on-Chip, instead of using separate design environments for hardware and software parts, the usage of a unified co-design environment provides a better design and simulation methodology which also decreases the number of iterations at hardware software integration. In this work, an 8-bit 8051 microcontroller core and external memory modules are developed using SystemC that can be re-used in future designs to achieve more complex System-on-Chip&rsquo / s. During the development of the 8051 core, simulation results are analyzed at each step to verify the design from the very beginning of the work, which makes the design processes more structured and controlled and faster as a result.

CMOS is the favorite candidate process for the high integration of the wireless communication IC blocks, RF frontend and digital baseband circuitry. Also the design of the RF power amplifier stage is the one of the most important part of the RF CMOS circuit design. Since high frequency and high power simultaneously exists on this stage, devices works on the limits of the process. Therefore standard device models may not be valid enough for a successful design. In the thesis high frequency passive device and MOS transistor models for the CMOS process searched though the literature and presented. Besides, different structures of the inductors are investigated for the best quality factor for the chosen process. Class E power amplifiers can reach very high efficiencies and they are very suitable for the low power applications. After the derivation of the classical Class E equations is presented, a new Class E circuit model including MOS transistor&rsquo / s channel resistance is developed and new sets of equations are obtained for the model. Circuit parameters are determined using numerical methods. Class E circuit simulations with these new parameters and earlier parameters are compared. Finally, a 100mW 2.4GHz Class E power amplifier is designed and simulated targeting Bluetooth applications. In this design, Class E circuit parameters are determined for AMS CMOS 0.35um process MOS transistor including the channel resistance. Simulations are performed using Cadence/BSIM3v3 and OrCad PSPICE.

ABSTRACT DESIGN AND IMPLEMENTATION OF A MICROPROCESSOR BASED DATA COLLECTION AND INTERPRATATION SYSTEM WITH ONBOARD GRAPHICAL INTERFACE G&ouml / ks&uuml / g&uuml / r, G&ouml / khan M.S., Department of Electric and Electronics Engineering Supervisor : Prof. Dr. Hasan Cengiz G&uuml / ran December 2004, 103 pages This thesis reports the design and implementation of a microprocessor based interface unit of a navigation system. The interface unit is composed of a TFT display screen for graphical interface, a Controller Circuit for system control, a keypad interface for external data entrance to the system and a power interface circuit to provide interface between the battery of the navigation system and the Controller Circuit. This thesis reports high speed design of the Controller Circuit and generation of system functions. Main functions of the interface unit are communicating with navigation computer and providing a graphical interface to the driver of the vehicle containing the navigation system. Communication and graphical data preparation functions are implemented through the use of a microprocessor. Driver function of TFT display is implemented through the use of a Field Programmable Gate Array, which is programmed using the Very High Speed IC Description Language (VHDL). Keywords: Navigation System, Interface Unit, Controller Circuit, Image Generation

In this thesis the design of a MMIC vector modulator operating in 9GHz-10GHz band is investigated and performed. Sub-sections of the vector modulator are 4-port (4.8dB) 1200 phase shift relative to the dedicated port power splitter, digitally controlled variable gain amplifier and the in phase power combiner. Alternative methods are searched in order to implement the structure properly in the given frequency band. The final design is appropriate for MMIC structure. 4-port (4.8dB) 1200 phase shift relative to the dedicated port power splitter is studied. The performance is simulated and optimized first on Microwave Office, then on Advanced Design System (ADS) tools. Various methods to design a digitally controlled variable gain amplifier are studied. The final topology is simulated and optimized on ADS tool. An in phase power combiner is designed. The performance of the combiner is simulated and optimized on ADS tool. Lumped element models are replaced with CASWELL H-40 models to achieve a MMIC structure and a layout is drawn. The finalized vector modulator is simulated and optimized on ADS tool. Key words: MMIC, Vector Modulator, Digitally Controlled Variable Gain Amplifier, Layout

A method for real time tracking of non-rigid arbitrary objects is proposed in this study. The approach builds on and extends work on multidimensional color histogram based target representation, which is enhanced by spatial masking with a monotonically decreasing kernel profile prior to back-projection. The masking suppresses the influence of the background pixels and induces a spatially smooth target model representation suitable for gradient-based optimization. The main idea behind this approach is that an increase in the number of quantized feature spaces used to generate the target probability distribuition function during histogram back-projection can lead to improved target localization. Target localization is performed using the recursive Mean shift procedure, which climbs the underlying density graidients of the discrete data to find the mode (peak) of the distribution. Finally, the real time test cases, such as occlusion, target scale and orientation changes, varying illumination and background clutter, are demonstrated.

The Multimode Interference (MMI) mechanism is a powerful toool used in the analysis and design of a certain class of optical, microwave and millimeter wave devices. The principles of the MMI method and the self-imaging principle is described. Using this method, NXM MMI couplers, MMI splitter/combiners are analyzed. Computer simulations for illustrating the &quot / Multimode Interference Mechanism&quot / are carried out. The MMI approach is used to analyze overmoded &#039 / rectangular metallic&#039 / and &#039 / dielectric slab&#039 / type of waveguides and devices. The application of the MMI technique is investigated experimentally by using a metallic waveguide structure operating in the X-band. The construction of the related structure and the related experimental work are reported.

This thesis reports the development of high-performance symmetric and decoupled micromachined gyroscopes for tactical-grade inertial measurement applications. The symmetric structure allows easy matching of the resonance frequencies of the drive and sense modes of the gyroscopes for achieving high angular rate sensitivity / while the decoupled drive and sense modes minimizes mechanical cross-coupling for low-noise and stable operation. Three different and new symmetric and decoupled gyroscope structures with unique features are presented. These structures are fabricated in four different micromachining processes: nickel electroforming (NE), dissolved-wafer silicon micromachining (DWSM), silicon-on-insulator (SOI) micromachining, and silicon-on-glass (SOG) micromachining. The fabricated gyroscopes have capacitive gaps from 1.5&micro / m to 5.5&micro / m and structural layer thicknesses from 12&micro / m to 100&micro / m, yielding aspect ratios up to 20 depending on the fabrication process. The size of fabricated gyroscope chips varies from 1x1mm2 up to 4.2x4.6mm2. Fabricated gyroscopes are hybrid-connected to a designed capacitive interface circuit, fabricated in a standard 0.6&micro / m CMOS process. They have resonance frequencies as small as 2kHz and as large as 40kHz / sense-mode resonance frequencies can be electrostatically tuned to the drive-mode frequency by DC voltages less than 16V. The quality factors reach to 500 at atmospheric pressure and exceed 10,000 for the silicon gyroscopes at vacuum. The parasitic capacitance of the gyroscopes on glass substrates is measured to be as small as 120fF. The gyroscope and interface assemblies are then combined with electronic control and feedback circuits constructed with off-the-shelf IC components to perform angular rate measurements. Measured angular rate sensitivities are in the range from 12&micro / V/(deg/sec) to 180&micro / V/(deg/sec), at atmospheric pressure. The SOI gyroscope demonstrates the best performance at atmospheric pressure, with noise equivalent rate (NER) of 0.025(deg/sec)/Hz1/2, whereas the remaining gyroscopes has an NER better than 0.1(deg/sec)/Hz1/2, limited by either the small sensor size or by small quality factors. Gyroscopes have scale-factor nonlinearities better than 1.1% with the best value of 0.06%, and their bias drifts are dominated by the phase errors in the demodulation electronics and are over 1deg/sec. The characterization of the SOI and SOG gyroscopes at below 50mTorr vacuum ambient yield angular rate sensitivities as high as 1.6mV/(deg/sec) and 0.9mV/(deg/sec), respectively. The NER values of these gyroscopes at vacuum are smaller than 50(deg/hr)/Hz1/2 and 36(deg/hr)/Hz1/2, respectively, being close to the tactical-grade application limits. Gyroscope structures are expected to provide a performance better than 10 deg/hr in a practical measurement bandwidth such as 50Hz, provided that capacitive gaps are minimized while preserving the aspect ratio, and the demodulation electronics are improved.

In this study, novel Ray Based finite difference method for Time Domain electromagnetics(RBTD) has been developed. Instead of solving Maxwell&rsquo / s hyperbolic partial differential equations directly, Geometrical Optics tools (wavefronts, rays) and Taylor series have been utilized. Discontinuities of electromagnetic fields lie on wavefronts and propagate along rays. They are transported in the computational domain by transport equations which are ordinary differential equations. Then time dependent field solutions at a point are constructed by using Taylor series expansion in time whose coefficients are these transported distincontinuties. RBTD utilizes grid structure conforming to wave fronts and rays and treats all electromagnetic problems, regardless of their dimensions, as one dimensional problem along the rays. Hence CFL stability condition is implemented always at one dimensional eqaulity case on the ray. Accuracy of RBTD depends on the accuracy of grid generation and numerical solution of transport equations. Simulations for isotropic medium (homogeneous/inhomogeneous) have been conducted. Basic electromagnetic phenomena such as propagation, reflection and refraction have been implemented. Simulation results prove that RBTD eliminates numerical dispersion inherent to FDTD and is promising to be a novel method for computational electromagnetics.

In this thesis a microcontroller core is developed in an FPGA. Its instruction set is compatible with the microcontroller PIC16XX series by Microchip Technology. The microcontroller employs a RISC architecture with separate busses for instructions and data. Our goal in this research is to implement and evaluate the design in the FPGA. Increasing performance and gate capacity of recent FPGA devices permits complex logic systems to be implemented on a single programmable device. Such a growing complexity demands design approaches, which can lead to designs containing millions of logic gates, memories, high-speed interfaces, and other high-performance components. In recent years, the continuous development in the area of highly integrated circuits has lead to a change in the design methods used, making it possible to economically utilize FPGAs in many designs. A test demo board from the Digilent Inc is used to fit our testing requirements of the RISC microcontroller. The test demo board also had the capability of communicating with a personal computer (PC) so that we can load the program from PC. Based on the modern design methods the microcontroller core is developed using the Verilog hardware description language. Xilinx ISE Foundation 6.3i software is used for its synthesis and implementation. An embedded test program code using MPLAB is also developed, and then loaded into the designed microcontroller residing in the FPGA. In order to perform a functional test of the microcontroller core a special test program downloader application is designed by using Borland C++ Builder. First, the specification from the PIC16XX datasheet is transferred into an abstract behavioral description. Based on that, the next step is to develop a description of the microcontroller core with some minor modifications which can be synthesizable into a FPGA. Finally, the resulting gate level netlist is evaluated and tested using a demo board.

Variable digital filters (VDF) find many application areas in communication, audio, speech and image processing. This thesis analyzes design and implementation of FIR digital filters with variable frequency characteristics and introduces two design methods. The design and implementation of the proposed methods are realized on Matlab software program. Various filter design examples and comparisons are also outlilned. One of the major application areas of VDFs is software defined radio (SDR). The interpolation problem on sample rate converter (SRC) unit of the SDR is solved by using these filters. Realizations of VDFs on SRC are outlined and described. Simulations on Simulink and a specific hardware are examined.