Good failure analysis is the ability to determine the site of a circuit defect quickly and accurately. We propose a method for defect site prediction that is based on a site's probability of excitation, making no assumptions about the type of defect being analyzed. We do this by analyzing fault signatures and comparing them to the defect signature. We use this information to construct an ordered list of sites that are likely to be the site of the defect.

In recent years there has been increased interest in the development of sensorless switched reluctance machine drives. The proper operation of a switched reluctance machine (SRM) requires knowledge of the position of the rotor of the machine. The inclusion of a physical position sensor compromises the inherent robustness of this type of machine. Thus, there has been a need to develop techniques to estimate the position of the rotor in SRM drives. Switched reluctance machines are able to operate over a large range in speed. A fully loaded SRM is typically designed to saturate the ferromagnetic material that comprises the stator and rotor of the machine whereas a lightly loaded machine does not. Therefore, the model of the machine should be able to handle both a large range in frequency and input excitation levels of the magnetic material in the machine. The development of a new dynamic circuit-based ferromagnetic model is described in this thesis. The investigation of the behaviour of 24 gauge M19 silicon steel led to the conclusion that, for this material, a circuit model that has static parameters is unable to accurately reproduce the behaviour of the actual material over a large range of input frequencies and excitation levels without resorting to retuning the parameters of the model. This thesis provides two new mechanisms that dynamically adjust the resistance values of the flux tubes of the model. Comparisons using a normalized vertical least-squares metric between the newly proposed dynamic model and a model that has static resistance values clearly show the improvement that is gained by using these mechanisms. A practical implementation of the new model is also given. Timing using a general purpose CPU shows that this implementation of the model will most likely be able to be used as part of a multi-phase lumped parameter model for a SRM in realtime.

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This thesis presents two experimental microelectronic prototypes for neurophysiological applications. Both systems target diagnostics and treatment of neurological disorders, and they are experimentally validated in vivo by online intracranial EEG recording in freely moving rats. The first prototype is a 56-channel chopper-stabilized low-noise neural recording interface IC with programmable mixed-signal DC cancellation feedback, fabricated in a 0.13μm CMOS process. Each recording channel has a low-noise fully-differential amplifier, and a digital integrator and a delta-sigma DAC in the feedback to cancel DC offsets of up to ±50mV. Chopper stabilization technique is used to reduce the amplifier flicker noise. The recorded signals are digitized by 7 column-parallel SAR ADCs. The second prototype is a compact headset for multi-site neuromonitoring and neurostimulation in rodent brain. A stack of 2 mini-PCBs was designed and experimentally validated. It includes a previously fabricated 0.35μm CMOS recording and stimulation IC, a low-power FPGA, and the IC peripherals.

This thesis presents two experimental microelectronic prototypes for neurophysiological applications. Both systems target diagnostics and treatment of neurological disorders, and they are experimentally validated in vivo by online intracranial EEG recording in freely moving rats. The first prototype is a 56-channel chopper-stabilized low-noise neural recording interface IC with programmable mixed-signal DC cancellation feedback, fabricated in a 0.13μm CMOS process. Each recording channel has a low-noise fully-differential amplifier, and a digital integrator and a delta-sigma DAC in the feedback to cancel DC offsets of up to ±50mV. Chopper stabilization technique is used to reduce the amplifier flicker noise. The recorded signals are digitized by 7 column-parallel SAR ADCs. The second prototype is a compact headset for multi-site neuromonitoring and neurostimulation in rodent brain. A stack of 2 mini-PCBs was designed and experimentally validated. It includes a previously fabricated 0.35μm CMOS recording and stimulation IC, a low-power FPGA, and the IC peripherals.

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