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Reliability and Degradation Mechanism of Polysilicon Thin-Film TransistorLin, Chia-Sheng 28 July 2007 (has links)
In this thesis, we will investigate the degradation of the Low-Temperature-Polycrystalline-Silicon TFTs(LTPS TFTS) under the electrical stress. The devices are offer by Chi Mei Optoelectronics. The two mechanisms of the electrical stress are ac and dc stress. On the dc stress, we can separate the two degradation mechanisms from fixed drain voltage and various the gate voltage. The first mechanism is hot carrier effect, and second is self-heating effect. We were study the degradation mechanisms cause by above-mentioned phenomenon. On the other hand, we were confirmed the position and type of the defects by measured capacitance.
In the ac stress, device degradation depends on the emission rate and energy of the hot carrier. We will study the degradation mechanism which fixed the drain voltage and various the Vg_low and falling time under different temperature. Another way of the ac stress condition will be used here. The drain and source are directly connected to ground. The gate is directly connected to the pulse. At this stress condition, carrier will push to the junction near the drain and source when gate pulse is switch from high to low. This degradation mechanism is the function of the temperature. We are going to employ a C-V measurement to examination of the defect cause by stress.
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Fabrication and Characterization of Polycrystallin Silicon Thin-Film Transistor and Nonvolatile Memory with Block Oxide and Body-tieTseng, Hung-Jen 25 July 2009 (has links)
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Investigation on Reliability & Electrical Analysis of a-Si:H Thin Film Transistor used in Flexible DisplayTsao, Shu-wei 25 July 2005 (has links)
Based on the convenience of the use, the traditional display will be replace by the flexible display. According to this reason, it is very important to study on the reliability of the amorphous silicon (a-Si:H) thin-film transistor (TFT) used in LCD under different mechanical strain. In this research, besides of the above-mentioned we also applied AC stress, to understand the influence of AC stress on an a-Si:H TFT under different mechanical strain.
The influence of mechanical strain on the performance of an hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) with different channel length and width on metal foil substrate under uniaxial compressive or tensile strain was studied, where the strain is parallel to the TFT source-drain current path. The process of TFT with the maximum temperature 190¢XC exhibited a field-effect mobility of 0.1 cm2/Vs and a threshold voltage of 1.95 V and the leakage current of less than 10-13 A. The TFTs were strained by inward (compression) or outward (tension) cylindrical bending. The mobility had a slightly change under the mechanical strain, which was due to the change in the disorder under bending strain.
We also researched on the influence of uniaxial compressive (tensile) strain on the performance of a-Si:H TFTs under different AC stress conditions. When the a-Si:H TFTs were strained and applied AC stress, we found the performance of a-Si:H TFTs were affected more then the flat ones.
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Study on fabrication of high performance thin film transistorChang, Yu-chuan 18 July 2006 (has links)
In recently yesrs,Thin-film transistors (TFTs) including an active layer of amorphous silicon or polycrystalline silicon have been widely employed as the pixel-driving elements of a liquid crystal display (LCD). Particularly, a-Si:H TFT is advantageous to the production of large screen displays and facilitates mass-production.
a-Si:H has high photoconductivity which results in high off-state leakage currents of a-Si:H TFT under light illumination . Particularly, the off-state leakage current under light illumination is a serious problem in the projection and/or video displays which require high intensity backlight illumination.As the resolutions is higher , the TFT¡¦s performance must be higher to achieve the short charge time each line can charge. The performance includes mobility ,on current, off current, photo leakage current, threshold voltage ,and subthrehold swing.
Furthermore, the to improve the mobility of thin-film transistors (TFT) to enable total integration of peripheral electronics in flat panel displays and imagers has led to recrystallized polycrystalline silicon (poly-Si) as the material of choice.
However, laser recrystallized polycrystalline silicon suffers from high cost , complex processing, and significant nonuniformity over a large area. Indeed, the direct deposition of good-quality low-temperature poly films is highly desirable and constitutes a promising alternative.
In this thesis, we use HDPCVD to fabricate direct deposition poly-TFT successfully.Through plasma passivation, we improve the characteristic of device. The photo-Leakage current have been reduced obviously to our device under light illumination, and is benefit to higher intensity light of large screen display. And our TFT device exhibits stable characteristics with voltage and current stress , and it¡¦s also confirmed that the device is reliable. On the characteristic of device, the direct-deposited poly TFT device exhibits higher effective carrier mobility than that of conventional one. For that reason, the high performance provides the potential of the direct-deposited poly TFT to apply for AMLCD and AMOLED technology.
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Investigation on Photo Leakage Current and Electrical Mechanism of a-Si Thin Film TransistorYang, Po-Cheng 01 August 2006 (has links)
The hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) have been widely used as switching device for large-area electronics such as active matrix liquid crystal displays (AM-LCDs). a-Si TFT is particularly advantageous to the production of large screen displays and facilitates mass production.
When employing an a-Si:H layer, the main objectives are to enhance the field effect mobility and to reduce the off-state current under light illumination. The increase of field effect mobility results in wide application of a-Si:H TFTs in high resolution LCDs. On the other hand, a-Si:H has high photoconductivity which results in high off-state current of a-Si:H TFT under light illumination. The off-state leakage current under light illumination is, in particular, a serious problem in the projection and/or multimedia displays that require high intensity backlight illumination.
Minimizing the off-current increase by a-Si photosensitivity is an important design consideration for achieving highimage-quality LCDs. TFT off-current increase by photoillumination of a-Si decreases the charge stored on the pixel during the TFT off-time, and results in gray-scale shading, flicker, crosstalk and other display nonuniformity in the LCD.
The fluorine incorporated amorphous silicon [a-Si:H(:F)] and amorphous silicon (a-Si:H) were illuminated with backlight to investigate electrical characteristics. The effect of different [SiF4] / [ SiH4] ratio on the performance of a-Si:H(:F) TFTs was also studied. We found the density of states in the gap of a-Si:H(:F) will be modified by the introduction of F into a-Si:H and resulting the shift of the Fermi level toward the valence band edge. The density-of-states increasing cause more recombination centers for electrons and holes to increase the carrier recombination rate. The shift in the Fermi level leads to a reduction of the photoconductivity of a-Si:H(:F). Due to these two important factor, the photo leakage current decreases.
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Electrical Analysis and Physics Mechanism of Dual-gate Amorphous Silicon Thin Film TransistorChen, Min-chen 09 July 2007 (has links)
The traditional displayer ¡V CRT has already been substituted by liquid crystal displayer (LCD).The a-Si TFT is used to be a switch, while the size of the displayer increases, the require of the performance and quality of TFTs is more and more better. Therefore, it is very important subject to study the stability and to improve the performance of a-Si TFTs.
In this thesis, we fabricate another new structure (asymmetry dual-gate TFTs).For asymmetry dual-gate TFTs, the ITO back gate is extended to the middle of the channel and only covered on the drain contact. The new structure has the advantages of dual-gate TFTs. With dual-channel conduction, it exhibit higher Ion and lower photo leakage current performance than the conventional inverted staggered TFTs.
In addition, we use the asymmetry dual-gate structure to investigate how the parasitic capacitance influences the feed-through voltage by C-V measurement. We also to investigate the influences of electrical characteristics with the ITO back gate whether or not overlap the source contact. The asymmetry in on current with source-drain swapping can be attributed to the difference in the ITO back gate whether overlaps the source contact. Finally, it simulated the process of the degradation on the TFTs to find the stability mechanism of the TFTs.
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Improved Overlay Alignment of Thin-film Transistors and their Electrical Behaviour for Flexible Display TechnologyPathirane, Minoli 06 November 2014 (has links)
The integration of hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with plastic substrates enables emerging technologies such as flexible organic light emitting diode (OLED) displays. Current a-Si fabrication processes, however, create residual thin film stress that affects the underlying flexible substrate due to its high mismatch in the coefficient of thermal expansion resulting in a dimensional instability for fabricating TFTs on large area flexible substrates. The motivation of this thesis is to reduce this non-uniformity and improve fabrication throughput of bottom-gated inverted-staggered a-Si:H TFTs on flexible substrates. This thesis therefore encompasses the study of overlay misalignment on TFTs over 3 inch flexible substrates and investigates the electrical characteristics of the TFTs fabricated on plastic platforms.
To reduce overlay misalignment of TFTs fabricated on flexible substrates, a plastic-on-carrier lamination process has been developed. The technique comprises of a polyimide tape to attach a 125 um-thick poly-ethylene-napthalate (PEN) flexible substrate to a rigid carrier. This process has been used to minimize stress induced strain of the PEN substrate during the fabrication process; strain, which has been observed after processing a-Si:H TFTs on free-standing substrates. This technique would in turn assist in fabricating uniform stacked-layers as required for a-Si:H TFT fabrication on the PEN substrates. Overlay misalignment is measured after each of the 5 consecutive lithographic steps at 4 corner-most edges of the PEN substrates using a standard optical microscope. Results have shown an overlay misalignment reduction from 21 um to 2 um on average based on the TFTs fabricated on free-standing flexible substrates while ensuring a centre alignment accuracy of +/- 0.5 um. Post fabrication adhesive removal to separate the PEN substrate from the rigid carrier has been accomplished by sample immersion in acetone. The results present a significant increase in fabrication throughput by reducing lithographic overlay misalignment such that the resolution of large-area flexible electronics would be enhanced. Electrical characteristics show the average performance of a-Si:H TFTs with an ON/OFF current ratio of 10^8, field effect mobility of ~0.8 cm^2/Vs, and gate leakage current of 10^-13 A.
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Development of New Building Blocks for Constructing Novel Polymer Semiconductors for Organic Thin Film TransistorsYan, Zhuangqing 06 November 2014 (has links)
Organic semiconductors are envisioned to have widespread applications in flexible displays, radio-frequency identification (RFID) tags, bio- and chem-sensors, as well as organic solar cells. Polymer semiconductors are particularly suitable for the low-cost manufacture of organic electronics using printing techniques due to their excellent solution processability and mechanical properties. This work focuses on the development of two novel building blocks, IBDF and DTA, which can be used for the construction of high performance organic thin film transistors (OTFTs) and organic photovoltaics (OPVs). Two copolymers, P6-IBDF-T and P5-IBDF-T, and a homopolymer P6-IBDF were prepared using the IBDF building block. Copolymer P6-IBDF-T has been prepared via the Stille-coupling polymerization. This polymer exhibits a small band gap of 1.36 eV with HOMO/LUMO energy level of -5.69 eV/-4.43 eV. P6-IBDF-T showed stable electron transport performance in encapsulated thin film transistors and ambipolar transport performance in non-encapsulated TFTs. Balanced hole/electron mobilities of up to 8.2 ??10-3/1.0 ??10-2 cm2V-1s-1 was achieved in bottom-contact, bottom-gate organic thin film transistors. In addition, the broad absorption of the polymer over the UV-Vis range suggested that this polymer is suitable for applications in solar cells. The effect of conjugation on mobility and UV-vis spectra of the polymer was studied by comparing P5-IBDF-T with P6-IBDF-T. The ideal of indirect electron transition was proposed to explain the difference between UV-Vis light absorption spectra for these two polymers.
DTA building block was used to construct four D-A copolymers, namely PDTA-T, PDTA-BT, PDAT-BTV, and PDTA-TT. These polymers were characterized by UV-Vis, CV, DSC, TGA, AFM and XRD. Device performance was also investigated on OTFTs. The device performance of DTA based polymer increased as the area of electron donor increase from T in PDTA-T to BTV in PDTA-BTV. PDTA-BTV exhibits hole mobility of 1.3??10-3 cm2 V-1 s-1 with Ion/Ioff value of ~103-4 in bottom-contact, bottom-gate organic thin film transistors. All DTA based copolymers exhibited small optical bandgaps (1.18 ??? 1.27 eV) and required none or moderate thermal treatment during fabrication process. These make them promising candidates for cost-effective OPV applications.
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TFTs circuit simulation models and analogue building block designsCheng, Xiang January 2018 (has links)
Building functional thin-film-transistor (TFT) circuits is crucial for applications such as wearable, implantable and transparent electronics. Therefore, developing a compact model of an emerging semiconductor material for accurate circuit simulation is the most fundamental requirement for circuit design. Further, unique analogue building blocks are needed due to the specific properties and non-idealities of TFTs. This dissertation reviews the major developments in thin-film transistor (TFT) modelling for the computer-aided design (CAD) and simulation of circuits and systems. Following the progress in recent years on oxide TFTs, we have successfully developed a Verilog-AMS model called the CAMCAS model, which supports computer-aided circuit simulation of oxide-TFTs, with the potential to be extended to other types of TFT technology families. For analogue applications, an accurate small signal model for thin film transistors (TFTs) is presented taking into account non-idealities such as contact resistance, parasitic capacitance, and threshold voltage shift to exhibit higher accuracy in comparison with the adapted CMOS model. The model is used to extract the zeros and poles of the frequency response in analogue circuits. In particular, we consider the importance of device-circuit interactions (DCI) when designing thin film transistor circuits and systems and subsequently examine temperature- and process-induced variations and propose a way to evaluate the maximum achievable intrinsic performance of the TFT. This is aimed at determining when DCI becomes crucial for a specific application. Compensation methods are reviewed to show examples of how DCI is considered in the design of AMOLED displays. Based on these design considerations, analogue building blocks including voltage and current references and differential amplifier stages have been designed to expand the analogue library specifically for TFT circuit design. The $V_T$ shift problem has been compensated based on unique circuit structures. For a future generation of application, where ultra low power consumption is a critical requirement, we investigate the TFT’s subthreshold operation through examining several figures of merit including intrinsic gain ($A_i$), transconductance efficiency ($g_m/I_{DS}$) and cut-off frequency ($f_T$). Here, we consider design sensitivity for biasing circuitry and the impact of device variations on low power circuit behaviour.
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Investigation on Electrical Characteristics at Low Temperature and Photo Leakage Current of a-Si Thin Film TransistorHuang, Chinh-mei 22 January 2008 (has links)
Since the traditional CRT(Cathode Ray Tube) replaced by FPD(Flat Panel Display), e.g. LCD¡BOLED¡BPDP, FPD industry is regarded as the important one of global industry following Semi-conductor industry. The main stream of Large-Area Displays is TFT-LCD(Thin Film Transistor-Liquid Crystal Display) and it¡¦s applied a-Si:H TFT (the hydrogenated Amorphous Silicon Thin Film Transistor) as pixel-switch device on LCD.
In a-Si:H TFT Cell process, the active region material(a-Si:H) with higher Photoconductivity results into higher off-state current under light illumination and that causes color performance discrepancy as incomplete On/Off operation of pixel-switch devices. As long as the introduction of F into a-Si:H modify the density of states in the gap of a-Si:H(:F), that may result the shift of the Fermi level toward the valence band edge and The density-of-states increasing. It¡¦s effective to decrease the photo leakage current.
Due to electro-optical properties of liquid crystal(LC), to drive Pixel-switch device in TFT-LCD shall force On/Off voltage to change Twist Angle of LC is corresponding to have Stress on TFT device. According to DC Stress experiment results, it¡¦s found TFT device with SiF4 dopant can reach better reliability.
This issue is aimed to research the photo leakage current variation of a-Si:H TFT at low temperature and ON/Off state effect by stress on TFT device.
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