The emergence of a multitude of bandwidth hungry multimedia applications has ex- acerbated the need for multi-gigabit wireless solutions and made it out of the reach of conventional WLAN technology (802.11a, b and g). This thesis presents a system on chip which demonstrates the potential of 60GHz transceivers. This system is based on an FPGA board on which a GNU/Linux kernel has been run. This document will give some insight on the design process as well as on the finished product. Both the hardware and the software parts of the design are presented. This document is organized as follow. Chapter I presents an overview of the problem to be solved and some insight on the motivation to work at 60GHz. Chapter II gives a high level view of the multimedia processor that has been designed and implemented. Chapters III and IV respectively give more detail on the hardware parts and on the software components of the pro ject. Finally, Chapter V draws the conclusion of this work and presents the future of the work that has been started to enhance this multimedia processor.