The goal of this research was to devise a new analytical technique, using Accelerator Mass Spectrometry (AMS), to measure Platinum Group Element (PGE) concentrations to the sup-ppb levels in natural, insulating, samples. The challenges were threefold. First, a method of sputtering an insulating sample to successfully produce a stable beam of anions needed to be devised. Second, a suitable standard of known PGE concentrations had to be found and third, spectral analysis of the beam had to verify any claims of PGE abundance. The first challenge was met by employing a modified high intensity negative ion source flooded with neutral caesium that successfully sputtered insulators to produce a beam of negative ions. The second challenge, that of finding a suitable standard, was fraught with difficulties, as no synthesized standards available were found to be appropriate for this work. As a result, direction is provided for future production of standards by ion implantation. The third challenge, successful spectral analysis, was accomplished using a newly designed gas ionization detector which allowed for resolution of the interfering molecular fragment from the PGE ions. Coupled with the use of the SRIM computer programme, positive identification of all peaks in the spectra of the analyzed samples was accomplished. The success of the first and third challenges lead to the qualitative analyses of geological samples for sub-ppb levels of PGE by AMS. Quantitative analyses await only for the appropriate standards and with those will come a whole new range of research possibilities for measuring sub-ppb levels of PGE in insulating samples by AMS.

Thesis (M.A.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 116-123). Also available on the World Wide Web.

Les accélérateurs sont des adjuvants couramment employés dans les matériaux cimentaires afin d’accélérer leur prise et/ou leur durcissement. Leur ajout permet d’accélérer les cadences de production de béton préfabriqué ou encore de compenser le retard d’hydratation induit par l’emploi d’ajouts minéraux cimentaires ou par des conditions hivernales. De nombreuses espèces chimiques, molécules ou ions, connues pour leur pouvoir accélérateur ont été étudiées dans la littérature. Néanmoins, souvent leur mode d’action est associé à une simple activation chimique, se caractérisant par l’accélération de l’hydratation de certaines phases cimentaires. Or au sein de la pâte cimentaire, ces adjuvants peuvent aussi avoir une action physique et modifier l’état de dispersion des grains de ciment, ce qui pourrait indirectement influencer la réactivité chimique.L’objectif de ce travail est donc d’étudier les modes d’action de différents systèmes accélérateurs en combinant l’analyse de la réactivité chimique du ciment et de l’organisation mésostructurale. Plusieurs amines de structures moléculaires différentes et plusieurs sels sodiques ont été employés seuls ou de manière combinée dans des pâtes cimentaires et des mortiers normalisés. Ces matériaux ont alors été étudiés de l’échelle nano/microscopique, puis mésoscopique à macroscopique, sur une période de temps s’étalant des premières minutes d’hydratation jusqu’à 28 jours. L’analyse du liquide interstitiel des pâtes cimentaires a permis d’évaluer les capacités de sorption et de complexation des adjuvants. Via des suivis d’hydratation par calorimétrie isotherme, diffraction des rayons X et analyse thermogravimétrique, l’impact des accélérateurs sur la dissolution des phases cimentaires anhydres et la précipitation d’hydrates a été déterminé. En parallèle, l’organisation mésostructurale des suspensions cimentaires adjuvantées a été analysée de manière directe par microscopies et granulométrie laser. Le comportement rhéologique et le suivi de sédimentation ont aussi permis d’appréhender indirectement l’état de dispersion des pâtes cimentaires. Pour finir, à l’échelle du mortier, des mesures de résistance à la compression ont été réalisées et la microstructure des échantillons a été étudiée par porosimétrie mercure et surface spécifique BET.La combinaison de ces caractérisations chimiques, physico-chimiques et granulaires a permis de mettre en évidence les principaux modes d’action des différentes familles d’accélérateurs. En particulier l’influence sur l’accélération de la structure moléculaire des amines et des espèces ioniques présentes dans le sel a été appréhendée. Enfin, l’emploi de combinaisons d’accélérateurs a permis de moduler l’accélération d’hydratation du matériau cimentaire et d’obtenir des effets synergiques. / Accelerators are common cement additives used in order to accelerate setting and/or hardening. Their addition allows accelerating production rates of precast concrete or compensating hydration retardation induced by the use of supplementary cementitious materials or by winter conditions. Several chemical species, molecules or ions, known for their accelerator power have been studied in the literature. However, their mode of action is often simply associated to chemical activation, which is characterized by hydration acceleration of particular cement phases. Yet, inside the cement paste, these additives can also have a physical action and modify the dispersion state of cement grains, which might indirectly influence chemical reactivity.Therefore the objective of this work is to study the modes of action of different accelerator systems by combining the analysis of cement chemical reactivity and mesostructural organization. Some amines with different molecular structures and some sodic salts were used individually or in a combined way in cement pastes and normalized mortars. These materials were then studied from nano/microscopic to mesoscopic and macroscopic scale over a period of time ranging from the first minutes of hydration till 28 days. The analysis of the pore solution allowed evaluating the additive sorption and complexation ability. Cement hydration was followed by isothermal calorimetry, X-ray diffraction and thermogravimetric analysis in order to determine the impact of accelerators on anhydrous cement phase dissolution and hydrate precipitation. In parallel, mesostructural organization of admixtured cement suspensions was analyzed indirectly by microscopy and laser granulometry. Rheological and sedimentation behavior also allowed apprehending indirectly the dispersion state of cement paste. Lastly, at mortar scale, compressive strength measurements were performed and sample microstructure was studied by mercury intrusion porosimetry and BET specific surface.The combination of these chemical, physicochemical and granular characterizations allowed highlighting the main modes of action of the different accelerator systems. In particular, the influence on acceleration of amine molecular structure and salt ionic species was apprehended. Finally, the use of combinations of accelerators allowed modulating the hydration acceleration of cementitious materials and obtaining synergetic effects.

A demanda por vídeos de resolução ultra-alta (além de 1920x1080 pontos) levou à necessidade de desenvolvimento de padrões de codificação de vídeo novos e mais eficientes para prover alta eficiência de compressão. O novo padrão High Efficiency Video Coding (HEVC), publicado em 2013, atinge o dobro da eficiência de compressão (ou 50% de redução no tamanho do vídeo codificado) comparado com o padrão mais eficiente até então, e mais utilizado no mercado, o padrão H.264/AVC (Advanced Video Coding). O HEVC atinge este resultado ao custo de uma elevação da complexidade computacional das ferramentas inseridas no codificador e decodificador. O aumento do esforço computacional do padrão HEVC e as limitações de potência das tecnologias de fabricação em silício atuais tornam essencial o desenvolvimento de aceleradores de hardware para partes importantes da aplicação do HEVC. Aceleradores de hardware fornecem maior desempenho e eficiência energética para aplicações específicas que os processadores de propósito geral. Uma análise da aplicação do HEVC realizada neste trabalho identificou as partes mais importantes do HEVC do ponto de vista do esforço computacional, a saber, o Filtro de Interpolação de Ponto Fracionário, o Filtro de Deblocagem e o cálculo da Soma das Diferenças Absolutas. Uma análise de tempo de execução do Filtro de Interpolação indica um grande potencial de economia de potência/energia pela adaptação do acelerador de hardware à carga de trabalho variável. Esta tese introduz novas contribuições no tema de aceleradores dedicados e reconfiguráveis para o padrão HEVC. Aceleradores de hardware dedicados para o Filtro de Interpolação de Pixel Fracionário, para o Filtro de Deblocagem, e para o cálculo da Soma das Diferenças Absolutas, são propostos, projetados e avaliados nesta tese. A arquitetura de hardware proposta para o filtro de interpolação atinge taxa de processamento similar ao estado da arte, enquanto reduz a área do hardware para este bloco em 50%. A arquitetura de hardware proposta para o filtro de deblocagem também atinge taxa de processamento similar ao estado da arte com uma redução de 5X a 6X na contagem de gates e uma redução de 3X na dissipação de potência. A nova análise comparativa proposta para os elementos de processamento do cálculo da Soma das Diferenças Absolutas introduz diversas alternativas de projeto de arquitetura com diferentes resultados de área, desempenho e potência. A nova arquitetura reconfigurável para o filtro de interpolação do padrão HEVC fornece 57% de redução de área em tempo de projeto e adaptação da potência/energia em tempo-real a cada imagem processada, o que ainda não é suportado pelas arquiteturas do estado da arte para o filtro de interpolação. Adicionalmente, a tese propõe um novo esquema de alocação de aceleradores em tempo-real para arquiteturas reconfiguráveis baseadas em tiles de processamento e de grão-misto, o que reduz em 44% (23% em média) o “overhead” de comunicação comparado com uma estratégia first-fit com reuso de datapaths, para números diferentes de tiles e organizações internas de tile. Este esquema de alocação leva em conta a arquitetura interna para alocar aceleradores de uma maneira mais eficiente, evitando e minimizando a comunicação entre tiles. Os aceleradores e técnicas dedicadas e reconfiguráveis propostos nesta tese proporcionam implementações de codificadores de vídeo de nova geração, além do HEVC, com melhor área, desempenho e eficiência em potência. / The demand for ultra-high resolution video (beyond 1920x1080 pixels) led to the need of developing new and more efficient video coding standards to provide high compression efficiency. The High Efficiency Video Coding (HEVC) standard, published in 2013, reaches double compression efficiency (or 50% reduction in size of coded video) compared to the most efficient video coding standard at that time, and most used in the market, the H.264/AVC (Advanced Video Coding) standard. HEVC reaches this result at the cost of high computational effort of the tools included in the encoder and decoder. The increased computational effort of HEVC standard and the power limitations of current silicon fabrication technologies makes it essential to develop hardware accelerators for compute-intensive computational kernels of HEVC application. Hardware accelerators provide higher performance and energy efficiency than general purpose processors for specific applications. An HEVC application analysis conducted in this work identified the most compute-intensive kernels of HEVC, namely the Fractional-pixel Interpolation Filter, the Deblocking Filter and the Sum of Absolute Differences calculation. A run-time analysis on Interpolation Filter indicates a great potential of power/energy saving by adapting the hardware accelerator to the varying workload. This thesis introduces new contributions in the field of dedicated and reconfigurable hardware accelerators for HEVC standard. Dedicated hardware accelerators for the Fractional Pixel Interpolation Filter, the Deblocking Filter and the Sum of Absolute Differences calculation are herein proposed, designed and evaluated. The interpolation filter hardware architecture achieves throughput similar to the state of the art, while reducing hardware area by 50%. Our deblocking filter hardware architecture also achieves similar throughput compared to state of the art with a 5X to 6X reduction in gate count and 3X reduction in power dissipation. The thesis also does a new comparative analysis of Sum of Absolute Differences processing elements, in which various architecture design alternatives with different area, performance and power results were introduced. A novel reconfigurable interpolation filter hardware architecture for HEVC standard was developed, and it provides 57% design-time area reduction and run-time power/energy adaptation in a picture-by-picture basis, compared to the state-of-the-art. Additionally a run-time accelerator binding scheme is proposed for tile-based mixed-grained reconfigurable architectures, which reduces the communication overhead, compared to first-fit strategy with datapath reusing scheme, by up to 44% (23% on average) for different number of tiles and internal tile organizations. This run-time accelerator binding scheme is aware of the underlying architecture to bind datapaths in an efficient way, to avoid and minimize inter-tile communications. The new dedicated and reconfigurable hardware accelerators and techniques proposed in this thesis enable next-generation video coding standard implementations beyond HEVC with improved area, performance, and power efficiency.

In this dissertation I incorporate high dimensional data vectors in estimated Dynamic Stochastic General Equilibrium (DSGE) models, evaluating the labor market dynamics incorporated inside such data vectors, out-of-sample forecasting performance of many models estimated with such data vectors and analytically examining the reduction of macroeconomic volatility that can occur when such data vectors are used in the formation of expectations about the future. The second chapter investigates the extent to which modern DSGE models can produce labor market dynamics in response to a financial crisis that are consistent with the experience of the Great Recession. I estimate two New-Keynesian models, one with and one without financial frictions, in a data-rich environment. I find that negative financial shocks are associated with longer recoveries in real investment, capital-intensive sectors of the labor market and average unemployment duration. I also find the model with a financial accelerator is equipped with better tools to identify the dynamics associated with the Great Recession and its recovery in regard to many labor and financial metrics. The third chapter compares the out-of-sample forecasting performance of the two DSGE models of Chapter II when they are estimated both out of and in a data-rich environment. This chapter finds that many financial time series variance decomposition are significantly better explained using the structural set-up of the New-Keynesian model with financial frictions. DSGE models estimated with high dimensional data vectors significantly out forecast their regularly estimated counterpart in regard to output, investment and consumption growth. Lastly, the use of real-time optimal pool model weighting significantly out-forecasts traditional macroeconomic models as well as an equally weighted weighting scheme in terms of many macroeconomic variables. The fourth chapter examines the role forecasts derived by high dimensional data vectors can have on lowering macroeconomic volatility. Bounded rational agents are introduced into the Chapter II DSGE model with financial frictions and are given the option to use or ignore professionally generated forecasts from a dynamic factor model in their perceived forecasting model. In simulations, I find that professionally generated forecasts can significantly lower the volatility of many macroeconomic variables including inflation and hours worked.

A utilização da técnica de teleterapia para tratamento de câncer tem sido usada por anos com bons resultados clínicos. Em meados da década de 90, a remoção do filtro aplainador, item que compõe o cabeçote de um acelerador linear de uso clínico, tem sido objeto de estudos por demonstrar bons resultados no tratamento de alguns tipos de câncer. Técnicas utilizadas como Radioterapia de Intensidade Modulada (IMRT) e Radioterapia Estereotáxica (SRT), mostram-se mais eficazes quando não se utiliza o filtro aplainador. A empresa Varian Oncology lançou em 2012 um acelerador linear de uso clínico capaz de operar com o filtro aplainador (FF) e sem o filtro aplainador (FFF), o TrueBeam. Os objetivos desse trabalho são avaliar a homogeneidade de dois importantes parâmetros utilizados para o cálculo de dose nos pacientes submetidos ao tratamento com esse modelo de acelerador linear, a porcentagem de dose profunda (PDP) e índice de qualidade do feixe (TPR20/10). Os dados fornecidos para a análise foram cedidos pelo Hospital Israelita Albert Einstein (HIAE), Real Hospital Português (RHP) e 3 instituições norte-americanas. Através de uma análise estatística dos dados das instituições citadas pode-se observar melhor o comportamento desses parâmetro que demonstraram-se muito homogêneos e com erros menores que 1% na maioria dos casos, confirmando desse modo que os aceleradores lineares do modelo TrueBeam mantém na maioria das vezes uma boa concordância dos parâmetros analisados. / Teletherapy, radiation therapy with linear accelerators, for cancer treatment has being used for years with good clinical results.Since the 90\'s the removal of the flattening filter, item placed at the gantry of the machine, has shown better results for the treatment of some cancers thus being extensively studied. Treatments with Intensity Modulated RadioTherapy (IMRT) and Sthereotaxic RadioTherapy (SRT) were more efficient without the flattening filter. Varian Oncology released the TrueBeam in 2012, a accelerator capable of operating with or without the flattening filter. The aim of this work is to access homogeneity of the percentage depth dose (PDP) and beam quality index (TPR20/10), two important parameters used in patient dose calculations. The data used for analysis were obtained with the Israelita Albert Einstein Hospital (HIAE), Real Português Hospital (RHP) and 3 more institutions located in the United States. The statistical data analysis allowed to observe the parameters behaviors. In general, they were very homogeneous, with errors smaller than 1% confirming the conformance of the TrueBeam accelerators.

Made available in DSpace on 2014-10-09T12:33:19Z (GMT). No. of bitstreams: 0 / Made available in DSpace on 2014-10-09T14:06:27Z (GMT). No. of bitstreams: 0 / Tese (Doutoramento) / IPEN/T / Instituto de Pesquisas Energeticas e Nucleares - IPEN-CNEN/SP

A demanda por vídeos de resolução ultra-alta (além de 1920x1080 pontos) levou à necessidade de desenvolvimento de padrões de codificação de vídeo novos e mais eficientes para prover alta eficiência de compressão. O novo padrão High Efficiency Video Coding (HEVC), publicado em 2013, atinge o dobro da eficiência de compressão (ou 50% de redução no tamanho do vídeo codificado) comparado com o padrão mais eficiente até então, e mais utilizado no mercado, o padrão H.264/AVC (Advanced Video Coding). O HEVC atinge este resultado ao custo de uma elevação da complexidade computacional das ferramentas inseridas no codificador e decodificador. O aumento do esforço computacional do padrão HEVC e as limitações de potência das tecnologias de fabricação em silício atuais tornam essencial o desenvolvimento de aceleradores de hardware para partes importantes da aplicação do HEVC. Aceleradores de hardware fornecem maior desempenho e eficiência energética para aplicações específicas que os processadores de propósito geral. Uma análise da aplicação do HEVC realizada neste trabalho identificou as partes mais importantes do HEVC do ponto de vista do esforço computacional, a saber, o Filtro de Interpolação de Ponto Fracionário, o Filtro de Deblocagem e o cálculo da Soma das Diferenças Absolutas. Uma análise de tempo de execução do Filtro de Interpolação indica um grande potencial de economia de potência/energia pela adaptação do acelerador de hardware à carga de trabalho variável. Esta tese introduz novas contribuições no tema de aceleradores dedicados e reconfiguráveis para o padrão HEVC. Aceleradores de hardware dedicados para o Filtro de Interpolação de Pixel Fracionário, para o Filtro de Deblocagem, e para o cálculo da Soma das Diferenças Absolutas, são propostos, projetados e avaliados nesta tese. A arquitetura de hardware proposta para o filtro de interpolação atinge taxa de processamento similar ao estado da arte, enquanto reduz a área do hardware para este bloco em 50%. A arquitetura de hardware proposta para o filtro de deblocagem também atinge taxa de processamento similar ao estado da arte com uma redução de 5X a 6X na contagem de gates e uma redução de 3X na dissipação de potência. A nova análise comparativa proposta para os elementos de processamento do cálculo da Soma das Diferenças Absolutas introduz diversas alternativas de projeto de arquitetura com diferentes resultados de área, desempenho e potência. A nova arquitetura reconfigurável para o filtro de interpolação do padrão HEVC fornece 57% de redução de área em tempo de projeto e adaptação da potência/energia em tempo-real a cada imagem processada, o que ainda não é suportado pelas arquiteturas do estado da arte para o filtro de interpolação. Adicionalmente, a tese propõe um novo esquema de alocação de aceleradores em tempo-real para arquiteturas reconfiguráveis baseadas em tiles de processamento e de grão-misto, o que reduz em 44% (23% em média) o “overhead” de comunicação comparado com uma estratégia first-fit com reuso de datapaths, para números diferentes de tiles e organizações internas de tile. Este esquema de alocação leva em conta a arquitetura interna para alocar aceleradores de uma maneira mais eficiente, evitando e minimizando a comunicação entre tiles. Os aceleradores e técnicas dedicadas e reconfiguráveis propostos nesta tese proporcionam implementações de codificadores de vídeo de nova geração, além do HEVC, com melhor área, desempenho e eficiência em potência. / The demand for ultra-high resolution video (beyond 1920x1080 pixels) led to the need of developing new and more efficient video coding standards to provide high compression efficiency. The High Efficiency Video Coding (HEVC) standard, published in 2013, reaches double compression efficiency (or 50% reduction in size of coded video) compared to the most efficient video coding standard at that time, and most used in the market, the H.264/AVC (Advanced Video Coding) standard. HEVC reaches this result at the cost of high computational effort of the tools included in the encoder and decoder. The increased computational effort of HEVC standard and the power limitations of current silicon fabrication technologies makes it essential to develop hardware accelerators for compute-intensive computational kernels of HEVC application. Hardware accelerators provide higher performance and energy efficiency than general purpose processors for specific applications. An HEVC application analysis conducted in this work identified the most compute-intensive kernels of HEVC, namely the Fractional-pixel Interpolation Filter, the Deblocking Filter and the Sum of Absolute Differences calculation. A run-time analysis on Interpolation Filter indicates a great potential of power/energy saving by adapting the hardware accelerator to the varying workload. This thesis introduces new contributions in the field of dedicated and reconfigurable hardware accelerators for HEVC standard. Dedicated hardware accelerators for the Fractional Pixel Interpolation Filter, the Deblocking Filter and the Sum of Absolute Differences calculation are herein proposed, designed and evaluated. The interpolation filter hardware architecture achieves throughput similar to the state of the art, while reducing hardware area by 50%. Our deblocking filter hardware architecture also achieves similar throughput compared to state of the art with a 5X to 6X reduction in gate count and 3X reduction in power dissipation. The thesis also does a new comparative analysis of Sum of Absolute Differences processing elements, in which various architecture design alternatives with different area, performance and power results were introduced. A novel reconfigurable interpolation filter hardware architecture for HEVC standard was developed, and it provides 57% design-time area reduction and run-time power/energy adaptation in a picture-by-picture basis, compared to the state-of-the-art. Additionally a run-time accelerator binding scheme is proposed for tile-based mixed-grained reconfigurable architectures, which reduces the communication overhead, compared to first-fit strategy with datapath reusing scheme, by up to 44% (23% on average) for different number of tiles and internal tile organizations. This run-time accelerator binding scheme is aware of the underlying architecture to bind datapaths in an efficient way, to avoid and minimize inter-tile communications. The new dedicated and reconfigurable hardware accelerators and techniques proposed in this thesis enable next-generation video coding standard implementations beyond HEVC with improved area, performance, and power efficiency.

Esse trabalho consistiu na medida e análise de distribuições angulares do espalhamento elástico e inelástico para núcleos de massa A=10 em alvos de 58Ni e no desenvolvimento de novos feixes secundários radioativos para o sistema RIBRAS. As distribuições angulares do sistema 10B+58Ni foram medidas nas energias E(lab)= 19, 20, 21, 23, 24, 25 e 35 MeV, no laboratório Tandar na Argentina, enquanto a distribuição angular do sistema 10C+58Ni foi medida na energia E(lab)= 35.3 MeV, utilizando o sistema TWINSOL, da Universidade de Notre Dame, Estados Unidos. O formalismo de canais acoplados foi utilizado para estudar a influência da estrutura deformada do núcleo 10B e da estrutura Bruniana do núcleo 10C. Os resultados indicaram a importância desses efeitos, bem como a possível influência dos canais de transferências e breakup. / This work consisted in the analysis and measurement of angular distributions for elastic and inelastic scattering of mass A=10 projectiles in 58Ni target, as well as in the development of new secondaries radioactive ion beams for the RIBRAS system. Angular distributions for the 10B+58Ni system were measured at E(lab)= 19, 20, 21, 23, 24, 25 and 35 MeV, at Tandar Laboratory in Argentina, while an angular distribution at E(lab)= 35.3 MeV for the 10C+58Ni was measured at the University of Notre Dame, USA, using the Twinsol system. The coupled channel formalism was used to investigate the influence deformed structure of the 10B and Brunian structure for 10C nucleus. The results indicated the importance of these effect as well as the possible influence of transfer and breakup channels. In this work the development of 10C, 14C and 12B beams were investigated for future use in the RIBRAS system.

Neste trabalho apresentamos o projeto do microtron principal do IFUSP. Inicialmente são apresentados os fundamentos teóricos relativos à estabilidade do feixe em um microtron, bem como discussões sobre a ótica do feixe. No trabalho são feitas basicamente 3 tipos de simulações distintas: simulação da dinâmica longitudinal e transversal da etapa síncrona, simulação da dinâmica transversal das linhas de transferência (inserção e extração) e a simulação relativa à otimização do projeto dos eletroímãs principais. As simulações longitudinais mostraram que é possível reduzir a energia de entrada do microtron principal de 4,9 para 2,5 MeV, o que permitira a eliminação do primeiro estágio síncrono (microtron booster). A energia final do microtron principal passa a ser 38 MeV. Foram realizados os projetos de duas linhas de inserção no principal para essas as duas energias (2,5 e 4,9 MeV) e foi feita uma análise comparativa desses dois projetos. O projeto da linha de extração também foi analisado levando em consideração duas energias de extração (5,8 e 38 MeV) para se mostrar a viabilidade dessa etapa. / In this work we present the design of the IFUSP main microtron. Initially, the theoretical foundations for the beam stability in the microton are presented as well as the beam optics is discussed. Three different kinds of simulations were done: Longitudinal and transversal beam dynamics in the synchronous part of the machine, transversal beam dynamics concerning the transfer lines and simulations related to the design of the main magnets. The longitudinal simulations sugested that it is possible to reduce the initial energy of the main microtron from 4.9 to 2.5 MeV, this would permit the elimination of the first synchronous stage (booster microtron). The final energy of the main microtron will be 38 MeV. The design of two insertion lines in the main microtron for the two different energies (2.5 and 4.9 MeV) was done and a comparative analysis between these two designes is presented. The design of the extraction line also takes into account two different extraction energies (5.8 and 38 MeV) in order to show de viability of this part.