The profile of the poloidal velocity in the edge region of tokamak plasmas has been identified as playing a major role in the confinement of particles and energy. It has been suggested that a strongly sheared poloidal flow can reduce particle and energy losses by the stabilization of unstable modes and decorrelation of turbulence the edge region of the plasma. A Gundestrup probe, a Mach probe array, is used to measure both the parallel and perpendicular flow velocities in the Saskatchewan Torus-Modified (STOR-M) tokamak during several discharge conditions. It is observed that during Ohmic discharges there is no velocity shear and the direction of the parallel flow is independent of the direction of the toroidal magnetic field. During H-mode induced by a turbulent heating current pulse, a region of strong velocity shear develops in the plasma edge and an edge transport barrier develops. This results in a short period of improved particle and energy confinement with reduced fluctuation amplitudes. During electrode biasing experiments, a stainless steel biasing electrode is inserted into the plasma up to r = 82 mm and biased to +500 V relative to the vacuum chamber. It is observed that the particle confinement improves during the biasing phase while the energy confinement is degraded. A region of weak shear in the poloidal flow is observed in the plasma scrapeoff layer (SOL). The results from STOR-M are compared with results from data taken in the Czech Academy of Sciences Torus (CASTOR) tokamak during both Ohmic discharges and discharges with electrode biasing.

This thesis reports the development and analysis of high performance CMOS readout electronics for increasing the performance of MEMS gyroscopes developed at Middle East Technical University (METU). These readout electronics are based on unity gain buffers implemented with source followers. High impedance node biasing problem present in capacitive interfaces is solved with the implementation of a transistor operating in the subthreshold region. A generalized fully differential gyroscope model with force feedback electrodes has been developed in order to simulate the capacitive interfaces with the model of the gyroscope. This model is simplified for the single ended gyroscopes fabricated at METU, and simulations of resonance characteristics are done. Three gyroscope interfaces are designed by considering the problems faced in previous interface architectures. The first design is implemented using a single ended source follower biased with a subthreshold transistor. From the simulations, it is observed that biasing impedances up to several gigaohms can be achieved. The second design is the fully differential version of the first design with the addition of a self biasing scheme. In another interface, the second design is modified with an instrumentation amplifier which is used for fully differential to single ended conversion. All of these interfaces are fabricated in a standard 0.6 &micro / m CMOS process. Fabricated interfaces are characterized by measuring their ac responses, noise response and transient characteristics for a sinusoidal input. It is observed that, biasing impedances up to 60 gigaohms can be obtained with subthreshold transistors. Self biasing architecture eliminates the need for biasing the source of the subthreshold transistor to set the output dc point to 0 V. Single ended SOG gyroscopes are characterized with the single ended capacitive interfaces, and a 45 dB gain improvement is observed with the addition of capacitive interface to the drive mode. Minimum resolvable capacitance change and displacement that can be measured are found to be 58.31 zF and 38.87 Fermi, respectively. The scale factor of the gyroscope is found to be 1.97 mV/(&deg / /sec) with a nonlinearity of only 0.001% in &plusmn / 100 &deg / /sec measurement range. The bias instability and angle random walk of the gyroscope are determined using Allan variance method as 2.158 &deg / /&amp / #8730 / hr and 124.7 &deg / /hr, respectively.

The thesis is composed of tow topics: a fully bidirectional mixed- voltage-tolerant I/O cell using a new output stage circuit and a sub-3¡ÑVDD wide range fully bidirectional mixed-voltage-tolerant I/O cell. The first topic discloses a mixed-voltage-tolerant I/O cell implemented using 2P4M 0.35 £gm CMOS process, which uses a low static power dynamic gate bias generator providing three different logic voltage levels to the output stage to avoid gate oxide reliability and leakage current. The design also reveals a new output stage circuit, which enhances the output current to resolve the poor driving capability caused by the slow mobility and body effect of the stacked PMOS. The second topic shows a sub-3¡ÑVDD wide range fully bidirectional mixed-voltage-tolerant I/O cell using 1P6M 0.18 £gm CMOS process, which employs a new dynamic gate bias generator and a PAD voltage detector to provide appropriate gate biases. The design includes a new gate tracking circuit and a floating N-well circuit to avoid gate oxide reliability and leakage current, which relaxes the body effect at the output PMOS.

Dans cette thèse, nous abordons les défis rencontrés lors de la caractérisation des mémoires non volatiles par microscopie en transmission in situ. Les innovations récentes menées sur les porte-objets de TEM in situ basés sur l'utilisation de puces en silicium apportent de grands avantages comparée aux précédents modèles. Cependant, cette technique reste complexe et les expériences de MET in situ sont difficiles à mener à terme. Ce manuscrit tente d'apporter de nouvelles solutions pour permettre l'observation à l'échelle atomique pendant le recuit, ou la polarisation d'un échantillon dans le MET. Ce projet a été mené à travers plusieurs améliorations effectuées au cours des différentes étapes des expériences de MET in situ. Cette thèse se focalise plus particulièrement sur les problèmes rencontrés lors de la polarisation de dispositifs de mémoires résistives de taille nanométrique. Ces travaux furent conduits à travers une étude des instruments utilisés, le développement de nouvelles méthodes de préparation d'échantillons, et une analyse de l'impact de l'imagerie électronique sur le fonctionnement d'un dispositif dans le MET.Tout d’abord, une nouvelle méthode est développée spécifiquement pour les expériences de MET in situ en température. Grâce à ces développements, la cristallisation de mémoires à changement de phase en GeTe est observée en temps réel. Ces résultats ont notamment permis d'obtenir des informations utiles pour le développement de mémoires à changement de phase de type chalcogénure. Ensuite, de nouvelles puces en silicium dédiées à la polarisation in situ sont développées et produites. Une étude est ensuite menée sur la préparation d'échantillons par FIB afin d'améliorer la qualité des contacts électriques pour la polarisation in situ, ainsi que la technique de préparation elle-même. La qualité de cette méthode est ensuite démontrée à travers des mesures quantitatives obtenues pendant la polarisation in situ d'un échantillon de référence de type jonction PN. Ces développements sont ensuite appliqués afin d’observer des dispositifs de mémoires résistives de type CBRAM en fonctionnement dans le microscope électronique en transmission. Ces résultats ont permis d'apporter de nouvelles informations sur les mécanismes de fonctionnement des mémoires résistives, ainsi que sur la technique de polarisation in situ. / In this work, we address the current challenges encountered during in situ Transmission Electron Microscopy characterization of emerging non volatile data storage technologies. Recent innovation on in situ TEM holders based on silicon micro chips have led to great improvements compared to previous technologies. Still, in situ is a particularly complicated technique and experiments are extremely difficult to implement. This work provides new solutions to perform live observations at the atomic scale during both heating and biasing of a specimen inside the TEM. This was made possible through several improvements performed at different stages of the in situ TEM experiments. The main focus of this PhD concerned the issues faced during in situ biasing of a nanometer size resistive memory device. This was made possible through hardware investigation, sample preparation method developments, and in situ biasing TEM experiments.First, a new sample preparation method has been developed specifically to perform in situ heating experiments. Through this work, live crystallization of a GeTe phase change Memory Material is observed in the TEM. This allowed to obtain valuable information for the development of chalcogenide based Phase Change Resistive Memories. Then, new chips dedicated to in situ biasing experiments have been developed and manufactured. The FIB sample preparation is studied in order to improve electrical operation in the TEM. Quantitative TEM measurements are then performed on a reference PN junction to demonstrate the capabilities of this new in situ biasing experimental setup. By implementing these improvements performed on the TEM in situ biasing technique, results are obtained during live operation of a Conductive Bridge Resistive Memory device. This allowed to present new information on the resistive memories functioning mechanisms, as well as the in situ TEM characterization technique itself.

Les technologies SOI partiellement désertées (PD-SOI), permettent de gagner en performances ou en consommation dynamique, par rapport à leur équivalent sur substrat massif (BULK). Leur inconvénient principal est la consommation statique qui est bien supérieure, en raison principalement de l'effet de body flottant de ses transistors. Ce travail propose une technique de réduction de la consommation statique, pour la technologie PD-SOI, basée sur le principe des interrupteurs de puissance. Un nouveau facteur de mérite recherchant le meilleur compromis entre vitesse, courant de fuite et surface est introduit pour la sélection du meilleur interrupteur de puissance. L'interrupteur de puissance proposé apporte par rapport à une solution de référence, et pour le même courant de fuite en mode éteint, une réduction de la résistance équivalente en mode passant de 20%. Les tests comparatifs sur Silicium de blocs LDPC incluant ces montages montrent, entre PD-SOI et BULK, un gain de 20% en vitesse pour la même tension d'alimentation, une réduction de 30% de la consommation dynamique pour la même vitesse et une division par 2 de la consommation statique. Enfin, une bascule de rétention, élément à associer aux interrupteurs de puissance, optimisée pour le PD-SOI, est proposée. Cette bascule est conçue de manière robuste et peu fuyante. / Partially depleted SOI technologies (PD-SOI), offer advantages in terms of speed and dynamic power consumption compared to bulk technologies. The main drawback of the PD-SOI technology is its static power consumption, which is higher than bulk one. It is due to the floating body of its transistors. This work presents a new static power consumption design technique based on power switches. A new factor of merit is introduced selecting the power switch with the best trade-off in terms of leakage current, speed and area. A new power switch brings, in comparison to a reference solution, a reduction of 20% of the ON mode equivalent resistance for the same OFF mode leakage current PD-SOI Silicon validation test chips include LDPC bloc supplied by the proposed solution. Comparing to the bulk technology, a speed gain of 20% is measured for the same voltage supply and a dynamic power consumption reduction of 30% at same speed is achieved. This solution allows reducing by 2 the static power consumption. Finally, a retention flip-flop associated to the implementation of power switches and optimized in PD-SOI is proposed. This flip-flop is designed to be robust with a low leakage current.

This dissertation focuses on questions regarding the metaphysical and psychological possibility of self-deception and attempts to show that self-deception is a phenomenon best characterized as both motivated and intentional, such that self-deceivers can be held responsible for their deceptions in a stronger sense than that of being merely epistemically negligent. In Chapter One, I introduce the paradoxes of self-deception, which arise when one attempts to draw a close analogy between self- and other-deception, and I discuss the various ways in which one might characterize an unwarranted belief as irrational. I go on to show how the various ways one understands interpersonal deception may mirror the various accounts one might give of self-deception. I concluded the chapter with a brief discussion of the role of empirical studies in philosophical investigations of irrationality. In Chapter Two, I look more closely at a particular kind of intentionalist account of self-deception, namely the claim that we must suppose the existence of a partitioned mind to make sense of the so-called "internal irrationality" of the self-deceiver. I discuss both stronger and weaker versions of this theory, in an attempt to show that it tends to raise more metaphysical worries than it solves. I argue further that if there is such a thing as divisions within the mind, an account of self-deception centered around such divisions will not get the intentionalist about self-deception what he or she wants. In Chapter Three, I move on to discuss non-intentionalist accounts of self-deception. Such theories have gained in popularity in recent years, due to their appeals to explanatory parsimony. Against these theories, I argued that there are certain phenomenon we take to be central to self-deception that Mele, Barnes, et al. cannot account for. I therefore propose that a more robust account of self-deception is necessary to make sense of these phenomena. Chapter Four attempts to provide such an account. I claim that if we focus more heavily on the diachronic process by which self-deceivers elicit and/or maintain their beliefs over time, what emerges looks much more like an intentional project aimed at the manipulation of one's evidence or evidential standards than a mere more-or-less unconscious process of motivated biasing. I suggest that such a view can escape the paradoxes of self-deception, while at the same time making sense of the features lacking on non-intentionalist accounts. Finally, in Chapter Five I examine the morality of self-deception. I argue that self-deceivers are not only epistemically but also morally responsible for their self-deceptions, and that self-deception generally represents a moral failure on the part of the moral agent, regardless of the normative moral theory one adopts.

In modern wireless communication systems, a base station typically serves a few hundred users within its cell coverage. To combat the near-far problem – the situation where a nearby user’s strong cellular signal masks the cellular signal of a faraway user – base stations continually enforce power control. That is, nearby users must lower their transmit power. In CDMA technology, power control can be as large as 70-80dB. At low power outputs, this greatly impacts the performance of the RF power amplifier (PA) in the cellular device. For small RF drives, the magnitude of the output RF current approaches the magnitude of the DC current and thus the efficiency suffers. Operating the RF PA in class C operation improves the efficiency, but results in poor linearity. Several methods of so-called dynamic biasing have been proposed. These strategies entail lowering the bias of the PA as the RF drive increases. The proposed methods, however, fail to explain how to achieve linearity and low third-order intermodulation distortion. Additionally, the methods utilize open-loop implementations. This work presents a novel dynamic biasing topology that results in a much improved linear class C PA. The topology utilizes a closed loop that cleverly senses the operating conditions of the "power device." Particularly, the loop operates on the principle of keeping the conduction angle remarkably constant and thereby ensuring linearity. The work details a thorough design methodology that should provide assistance to a designer wanting to implement the topology in an RF integrated circuit. Agilent ADS simulations and laboratory results from a functional PCB prototype bring merit to the topology.

No description available.

Currently the treatment of alcohol use disorder is very difficult and often requires the combination of therapy and medications, with many who undertake treatment experiencing relapse over time. There is also no treatment in use to prevent the development of alcohol use disorder. It is the aim of this work to provide information that may be useful for the development of a preventative treatment for developing alcohol use disorder by elucidating more of the acute effects of alcohol use. It is known that these effects originate in the brain. Within the brain are circuits made up of neurons that communicate with each other through chemical synapses. These chemical synapses involve the release of neurotransmitters from one neuron that are detected by another neuron, which initiates its own response. It is known that ethanol can change how much neurotransmitter is released from a neuron, depending on the specific neuron tested, and many researchers have implicated the "release machinery" as a target. It is also known that alcohol can affect lipid membrane properties that are important for the fusion of the vesicle membrane, encapsulating the neurotransmitter, with the cell membrane for release of the neurotransmitter outside of the neuron. It is not known if alcohol directly affects the SNARE proteins ("release machinery") or the lipid membranes to initiate the change in neurotransmitter release previously observed. Within this work you will find a discussion of the steps of neurotransmitter release and the known effects of anesthetics on components of this process, as an introduction to the topic (Chapters 1 and 2). In Chapters 3-5 you will find studies that successively dive deeper and deeper into the effects of alcohol on the SNARE proteins and lipid membranes. We show that ethanol is effective at a dose of 0.4% v/v or 64 mM at increasing fusion probability in a model of neurotransmitter release that uses the 3 SNARE proteins to drive fusion of a vesicle with a supported membrane. We also show that alcohol has little direct effect on the SNARE proteins themselves. In addition, we provide evidence that alcohol alters fusion oppositely, depending on which membrane leaflet it has most direct access to. In Chapter 5 we show that alcohol increases the probability of lipid tail protrusion in silico. Previously it has been shown that protrusion of one fatty acid tail of one lipid can initiate fusion of that membrane with an apposing membrane. These data provide further insight into the effects of alcohol on a neuron and we would argue are valuable to research pursuing treatment and prevention of alcohol use disorder.

No description available.