This thesis presents an examination of the jitter performance of different oscillator types in the presence of flicker noise, white noise and power supply noise. Key results are achieved using time domain simulations to determine cycle jitter of several different oscillator architectures, semiconductor processes and component features. In the end, a design procedure is developed for creating a low-jitter oscillator in a TSMC .25mm CMOS semiconductor process.

The design of mineral processing circuits is a complex, open-ended process.  While several tools and methodologies are available, extensive data collection accompanied with trial-and-error simulation are often the predominant technical measures utilized throughout the process.  Unfortunately, this approach often produces sub-optimal solutions, while squandering time and financial resources.  This work proposes several new and refined methodologies intended to assist during all stages of circuit design.  First, an algorithm has been developed to automatically determine circuit analytical solutions from a user-defined circuit configuration.  This analytical solution may then be used to rank circuits by traditional derivative-based linear circuit analysis or one of several newly proposed objective functions, including a yield indicator (the yield score) or a value-based indicator (the moment of inertia). Second, this work presents a four-reactor flotation model which considers both process kinetics and machine carrying capacity.  The simulator is suitable for scaling laboratory data to predict full-scale performance.  By first using circuit analysis to reduce the number of design alternatives, experimental and simulation efforts may be focused to those configurations which have the best likelihood of enhanced performance while meeting secondary process objectives.  Finally, this work verifies the circuit analysis methodology through a virtual experimental analysis of 17 circuit configurations.  A hypothetical electrostatic separator was implemented into a dynamic physics-based discrete element modeling environment.  The virtual experiment was used to quantify the selectivity of each circuit configuration, and the final results validate the initial circuit analysis projections. / Ph. D.

Today’s advances in communication systems and VLSI circuits increases the performance requirements and complexity of circuits. The performance of RF and mixed-signal circuits is normally limited by the nonlinear behavior of the transistors used in the design. This makes simulation of nonlinear circuits more important. Volterra series is a method used for simulation of mildly nonlinear circuits. Using Volterra series the response of the nonlinear circuit is converted into a sum of multiple linear circuit responses. Thus, using Volterra series, simulation of nonlinear circuits in frequency-domain analysis becomes possible. However, Volterra series is not able to simulate strongly nonlinear circuits such as saturated Power Amplifiers. In this thesis, a new time-varying Volterra analysis is presented. The time-varying Volterra analysis is the generalization of conventional Volterra analysis where instead of using a DC expansion point a time-varying waveform has been used. Employing a time-varying expansion waveform for Volterra analysis, time-varying Volterra achieves better accuracy than conventional Volterra. The time-varying expansion waveforms are derived using a fast pre-analysis of the circuit. Using numerical examples, it has been shown that the time-varying Volterra is capable of simulating nonlinear circuits with better accuracy than conventional Volterra analysis. The time-varying Volterra analysis in both time and frequency domains are discussed in this thesis. The time-varying Volterra analysis has been used to simulate a saturated Class-F Power Amplifier in frequency-domain. The simulation results show good agreement with ELDO® steady-state and Harmonic Balance simulation results. The proposed method manages to simulate nonlinear circuits, such as saturated Power Amplifier, mixers and nonlinear microwave circuits, with good accuracy. Also, this method can be used to simulate circuit with large number of nonlinear elements without the convergence issues of Harmonic Balance.

Today’s advances in communication systems and VLSI circuits increases the performance requirements and complexity of circuits. The performance of RF and mixed-signal circuits is normally limited by the nonlinear behavior of the transistors used in the design. This makes simulation of nonlinear circuits more important. Volterra series is a method used for simulation of mildly nonlinear circuits. Using Volterra series the response of the nonlinear circuit is converted into a sum of multiple linear circuit responses. Thus, using Volterra series, simulation of nonlinear circuits in frequency-domain analysis becomes possible. However, Volterra series is not able to simulate strongly nonlinear circuits such as saturated Power Amplifiers. In this thesis, a new time-varying Volterra analysis is presented. The time-varying Volterra analysis is the generalization of conventional Volterra analysis where instead of using a DC expansion point a time-varying waveform has been used. Employing a time-varying expansion waveform for Volterra analysis, time-varying Volterra achieves better accuracy than conventional Volterra. The time-varying expansion waveforms are derived using a fast pre-analysis of the circuit. Using numerical examples, it has been shown that the time-varying Volterra is capable of simulating nonlinear circuits with better accuracy than conventional Volterra analysis. The time-varying Volterra analysis in both time and frequency domains are discussed in this thesis. The time-varying Volterra analysis has been used to simulate a saturated Class-F Power Amplifier in frequency-domain. The simulation results show good agreement with ELDO® steady-state and Harmonic Balance simulation results. The proposed method manages to simulate nonlinear circuits, such as saturated Power Amplifier, mixers and nonlinear microwave circuits, with good accuracy. Also, this method can be used to simulate circuit with large number of nonlinear elements without the convergence issues of Harmonic Balance.

Every engineer that has worked on designing an integrated circuit has to leverage an under- standing of device physics. Understanding device physics is essential when optimizing a design for speed, power, etc. These characteristics affect the bottom line when considering an integrated circuit used in a particular application. In order for there to be an under- standing of device physics, there must be a device model that is developed for a device of interest. The development of a device model often involves utilizing fundamental physical equations in a manner that is solvable by either analytical or numerical means. This typically begins by simplifying fundamental physical equations, possibly spanning multiple domains, and considering the physical quantities of interest. In order to make simplifications, assumptions about the underlying physics must be made. It is the process of transitioning from known physics laws to simplified mathematical models that a device modeler spans. This thesis will cover the device modeling aspects of a new classification of computing devices, spintronics. It will begin by stating the physical assumptions necessary for the operation of spintronic devices. Then it will go the process of deriving the underlying physical equations and stating them in a tractable form with the appropriate boundary conditions. Then these equations will be manipulated and mapped into an equivalent circuit. The equivalent circuits will them be validated against analytical solutions provided from other works. It will then finish by providing example devices that can be simulated with the develop device models, and some optimization results are proposed based off a simplified circuit model.

This thesis describes a new approach to accelerate the simulation of the steady-state response of nonlinear circuits using the Harmonic Balance (HB) technique. The approach presented in this work focuses on direct factorization of the sparse Jacobian matrix of the HB nonlinear equations using a Graphics Processing Unit (GPU) platform. This approach exploits the heterogeneous structure of the Jacobian matrix. The computational core of the proposed approach is based on developing a block-wise version of the KLU factorization algorithm, where scalar arithmetic operations are replaced by block-aware matrix operations. For a large number of harmonics, or excitation tones, or both the Block-KLU (BKLU) approach effectively raises the ratio of floating-point operations to other operations and, therefore, becomes an ideal vehicle for implementation on a GPU-based platform. Motivated by this fact, a GPU-based Hybrid Block KLU framework is developed to implement the BKLU. The proposed approach in this thesis is named Hybrid-BKLU. The Hybrid-BKLU is implemented in two parts, on the host CPU and on the graphic card’s GPU, using the OpenCL heterogeneous parallel programming language. To show the efficiency of the Hybrid-BKLU approach, its performance is compared with BKLU approach performing HB analysis on several test circuits. The Hybrid-BKLU approach yields speedup by up to 89 times over conventional BKLU on CPU.

The transient time-domain simulation, of the circuit response, is a fundamental component in the Computer-Aided Design tools of all integrated circuit and systems. It is typically desirable that a method adopted in the transient circuit simulator be of high- order and numerically stable. The two requirements, however, proved to be in conflict with each other, especially in the larger class of methods that were used in traditional circuit simulators. Recent work based on utilizing the Obreshkov formula has proved that it is possible to combine the high order with the numerical stability. The objective of this thesis is to show how the present implementation of the Obreshkov- based method can be improved and generalized to handle different types of circuits. The first aspect of improvement targets the computation of the high-order derivatives re- quired by the Obreshkov formula. The second aspect of improvement, presented in the thesis, develops a generalized formulation that takes into account the presence of non- linear memory elements, whose nonlinearity is based on a capacitive or inductive-based nonlinear model.

This thesis describes a new approach to accelerate the simulation of the steady-state response of nonlinear circuits using the Harmonic Balance (HB) technique. The approach presented in this work focuses on direct factorization of the sparse Jacobian matrix of the HB nonlinear equations using a Graphics Processing Unit (GPU) platform. This approach exploits the heterogeneous structure of the Jacobian matrix. The computational core of the proposed approach is based on developing a block-wise version of the KLU factorization algorithm, where scalar arithmetic operations are replaced by block-aware matrix operations. For a large number of harmonics, or excitation tones, or both the Block-KLU (BKLU) approach effectively raises the ratio of floating-point operations to other operations and, therefore, becomes an ideal vehicle for implementation on a GPU-based platform. Motivated by this fact, a GPU-based Hybrid Block KLU framework is developed to implement the BKLU. The proposed approach in this thesis is named Hybrid-BKLU. The Hybrid-BKLU is implemented in two parts, on the host CPU and on the graphic card’s GPU, using the OpenCL heterogeneous parallel programming language. To show the efficiency of the Hybrid-BKLU approach, its performance is compared with BKLU approach performing HB analysis on several test circuits. The Hybrid-BKLU approach yields speedup by up to 89 times over conventional BKLU on CPU.

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