Parallel software is now required to exploit the abundance of threads and processors in modern multicore computers. Unfortunately, manual parallelization is too time-consuming and error-prone for all but the most advanced programmers. While automatic parallelization promises threaded software with little programmer effort, current auto-parallelizers are easily thwarted by pointers and other forms of ambiguity in the code. In this dissertation we profile the loops in SPEC CPU2006, categorize the loops in terms of available parallelism, and focus on promising loops that are not parallelized by IBM's XL C/C++ V10 auto-parallelizer. For those loops we propose methods of improved interaction between the programmer and compiler that can facilitate their parallelization. In particular, we (i) suggest methods for the compiler to better identify to the programmer the parallelization-blockers; (ii) suggest methods for the programmer to provide guarantees to the compiler that overcome these parallelization-blockers; and (iii) evaluate the resulting impact on performance.

This thesis describes the development of a compiler for OpenGLES 2.0 programs for a novel GPU. This work is a part of a larger project to develop a low-power GPU for embedded systems. Our compiler has been developed in the LLVM compiler infrastructure. The present thesis focuses on three areas of the compiler: 1) making corrections and improvements to an existing graphics shading language parser, 2) augmenting LLVM¡¦s bit-code format to support the new information from the shading language, and 3) modifying LLVM¡¦s backend to support this augmented bit-code. Much of this work is related to supporting the matrix and vector primitive data types found in OpenGL¡¦s GLSL shading language. In conjunction with several other theses, as listed in the text, this work achieves a working basic compiler for GLSL code on our new GPU. Continuing work by future researchers is necessary to make the compiler more robust and optimized.

Executing sequential code in parallel on a multithreaded machine has been an elusive goal of the academic and industrial research communities for many years. It has recently become more important due to the widespread introduction of multicores in PCs. Automatic multithreading has not been achieved because classic, static compiler analysis was not powerful enough and program behavior was found to be, in many cases, input dependent. Speculative thread level parallelization was a welcome avenue for advancing parallelization coverage but its performance was not always optimal due to the sometimes unnecessary overhead of checking every dynamic memory reference. In this dissertation we introduce a novel analysis technique, Hybrid Analysis, which unifies static and dynamic memory reference techniques into a seamless compiler framework which extracts almost maximum available parallelism from scientific codes and incurs close to the minimum necessary run time overhead. We present how to extract maximum information from the quantities that could not be sufficiently analyzed through static compiler methods, and how to generate sufficient conditions which, when evaluated dynamically, can validate optimizations. Our techniques have been fully implemented in the Polaris compiler and resulted in whole program speedups on a large number of industry standard benchmark applications.

Ziel der Arbeit ist die Erweiterung des Software-Werkzeuges ¨SAPCDEM¨ um eine Skriptsprache. Dieses Werkzeug wurde in der Abteilung ¨SAP R/3 Software Factory¨ der SAP AG entwickelt und dient der Verwaltung und Qualitaetssicherung der SAP R/3 CD's. Im Rahmen dieser Arbeit wird das Werkzeug hinsichtlich seines Aufbaus und seiner Arbeitsweise analysiert. Es werden die genauen Anforderungen an die Skriptsprache ermittelt und Loesungsansaetze diskutiert, diese in das vorhandene System zu integrieren. Ein Interpreter wird entworfen, der die Anweisungen der Sprache in entsprechende Aktionen des Werkzeuges umsetzt.

The key to performance improvements in the multicore era is for software toutilize the newly available concurrency. Consequently, programmers will have tolearn new programming techniques, and software systems will have to be able tomanage the parallelism effectively. The challenge is to do so simply, portably,and efficiently.This dissertation presents a lightweight programming framework called Gossamerthat is easy to use, enables the solution of a broad range of parallelprogramming problems, and produces efficient code. Gossamer supports task andrecursive parallelism, iterative parallelism, domain decomposition, pipelinedcomputations, and MapReduce computations. Gossamer contains (1) a set ofhigh-level annotations that one adds to a sequential program to specifyconcurrency and synchronization, (2) a source-to-source translator that producesan optimized program, and (3) a run-time system that provides efficient threadsand synchronization. The annotation-based programming model simplifies writingparallel programs by allowing the programmer to concentrate on the applicationand not the extensive bookkeeping involved with concurrency and synchronization;moreover, the annotations never reference any particulars of the underlyinghardware.

The modern computing industry tends to build integrated circuits with multiple energy-efficient cores instead of ramping up the clock speed for each single processing unit. While each core may not run as fast as the single core model, such architecture allows more jobs to be handled in parallel and also provides better overall performance. Asymmetric Multiprocessing, also known as Heterogeneous Multiprocessing, involves multiple processors that differ architecturally from one another, especially where each processor has its own memory space. Under power limitations, this design could provide better performance than that attained through symmetric multiprocessing. However, the heterogeneous nature adds difficulty to programming. Each specific architecture requires its own program code. Programmers also need to explicitly transfer code and data between processors. This study describes the implementation of a compiler of the pedagogic Tiger language for the Cell Broadband Engine, an asymmetric multiprocessing platform jointly developed by Sony, Toshiba and IBM. The problem above is solved by introducing multiple backends for the Tiger language, along with a remote call stub (RCS) generator. Functions are compiled into different architectures, and calls across architectures are linked automatically through the stubs. RCS takes care of the execution context switch and hides details of the argument data/return value transfer. TigC simplifies the programming and building procedures. It also provides a high-level view of the whole program execution for future optimization because all of the source files are processed by a single compiler. As an example of this procedure, the possible optimization of data transfer during remote calls is investigated here.

Zugl.: Dresden, Techn. University, Diss., 2008.

Techn. University, Diss., 2001--Berlin.

Universiẗat, Diss., 2000--Dortmund.

Universiẗat, Diss., 2005--Saarbrücken. / Erscheinungsjahr an der Haupttitelstelle: 2004.