Low-density parity-check (LDPC) codes have been shown to have good error correcting performance approaching Shannon’s limit. Good error correcting performance enables efficient and reliable communication. However, a LDPC code decoding algorithm needs to be executed efficiently to meet cost, time, power and bandwidth requirements of target applications. The constructed codes should also meet error rate performance requirements of those applications. Since their rediscovery, there has been much research work on LDPC code construction and implementation. LDPC codes can be designed over a wide space with parameters such as girth, rate and length. There is no unique method of constructing LDPC codes. Existing construction methods are limited in some way in producing good error correcting performing and easily implementable codes for a given rate and length. There is a need to develop methods of constructing codes over a wide range of rates and lengths with good performance and ease of hardware implementability. LDPC code hardware design and implementation depend on the structure of target LDPC code and is also as varied as LDPC matrix designs and constructions. There are several factors to be considered including decoding algorithm computations,processing nodes interconnection network, number of processing nodes, amount of memory, number of quantization bits and decoding delay. All of these issues can be handled in several different ways. This thesis is about construction of LDPC codes and their hardware implementation. LDPC code construction and implementation issues mentioned above are too many to be addressed in one thesis. The main contribution of this thesis is the development of LDPC code construction methods for some classes of structured LDPC codes and techniques for reducing decoding time. We introduce two main methods for constructing structured codes. In the first method, column-weight two LDPC codes are derived from distance graphs. A wide range of girths, rates and lengths are obtained compared to existing methods. The performance and implementation complexity of obtained codes depends on the structure of their corresponding distance graphs. In the second method, a search algorithm based on bit-filing and progressive-edge growth algorithms is introduced for constructing quasi-cyclic LDPC codes. The algorithm can be used to form a distance or Tanner graph of a code. This method could also obtain codes over a wide range of parameters. Cycles of length four are avoided by observing the row-column constraint. Row-column connections observing this condition are searched sequentially or randomly. Although the girth conditions are not sufficient beyond six, larger girths codes were easily obtained especially at low rates. The advantage of this algorithm compared to other methods is its flexibility. It could be used to construct codes for a given rate and length with girths of at least six for any sub-matrix configuration or rearrangement. The code size is also easily varied by increasing or decreasing sub-matrix size. Codes obtained using a sequential search criteria show poor performance at low girths (6 and 8) while random searches result in good performing codes. Quasi-cyclic codes could be implemented in a variety of decoder architectures. One of the many options is the choice of processing nodes interconnect. We show how quasi-cyclic codes processing could be scheduled through a multistage network. Although these net-works have more delay than other modes of communication, they offer more flexibility at a reasonable cost. Banyan and Benes networks are suggested as the most suitable networks. Decoding delay is also one of several issues considered in decoder design and implementation. In this thesis, we overlap check and variable node computations to reduce decoding time. Three techniques are discussed, two of which are introduced in this thesis. The techniques are code matrix permutation, matrix space restriction and sub-matrix row-column scheduling. Matrix permutation rearranges the parity-check matrix such that rows and columns that do not have connections in common are separated. This techniques can be applied to any matrix. Its effectiveness largely depends on the structure of the code. We show that its success also depends on the size of row and column weights. Matrix space restriction is another technique that can be applied to any code and has fixed reduction in time or amount of overlap. Its success depends on the amount of restriction and may be traded with performance loss. The third technique already suggested in literature relies on the internal cyclic structure of sub-matrices to achieve overlapping. The technique is limited to LDPC code matrices in which the number of sub-matrices is equal to row and column weights. We show that it can be applied to other codes with a lager number of sub-matrices than code weights. However, in this case maximum overlap is not guaranteed. We calculate the lower bound on the amount of overlapping. Overlapping could be applied to any sub-matrix configuration of quasi-cyclic codes by arbitrarily choosing the starting rows for processing. Overlapping decoding time depends on inter-iteration waiting times. We show that there are upper bounds on waiting times which depend on the code weights. Waiting times could be further reduced by restricting shifts in identity sub-matrices or using smaller sub-matrices. This overlapping technique can reduce the decoding time by up to 50% compared to conventional message and computation scheduling. Techniques of matrix permutation and space restriction results in decoder architectures that are flexible in LDPC code design in terms of code weights and size. This is due to the fact that with these techniques, rows and columns are processed in sequential order to achieve overlapping. However, in the existing technique, all sub-matrices have to be processed in parallel to achieve overlapping. Parallel processing of all code sub-matrices requires the architecture to have the number of processing units at least equal to the number sub-matrices. Processing units and memory space should therefore be distributed among the sub-matrices according to the sub-matrices arrangement. This leads to high complexity or inflexibility in the decoder architecture. We propose a simple, programmable and high throughput decoder architecture based on matrix permutation and space restriction techniques. / Thesis(Ph.D.) -- University of Adelaide, School of Electrical and Electronic Engineering, 2007

No description available.

No description available.

Detta arbete är ett examensarbete i matematik på kandidatnivå vid Växjö universitet. Det är en studie av kodningsteori i allmänhet med fokusering på cykliska koder och Reed-Solomon-koder i synnerhet. Reed-Solomon-koderna används för att skapa McElieces kryptosystem. En kortfattad analys av McElieces kryptosystems säkerhet görs tillsammans med en genomgång av kända sätt att forcera denna typ av kryptosystem. Här visar det sig att användning av Reed-Solomon-kod försvagar kryptosystemet i förhållande till om den ursprungligt föreslagna Goppa-koden används. För att kunna göra denna säkerhetsanalys görs också en kortfattad genomgång av komplexitetsteori och vad det innebär att ett problem är NP-fullständigt. Nyckelord: Kodningsteori, Kodteori, Cykliska koder, BCH-koder, Reed-Solomon-koder, McElieces kryptosystem, Kryptering, Kodforcering, Komplexitetsteori, NP-fullständigt / This work is produced on bachelor level in mathematics at University of Växjö. It is a study of coding theory with focus on cyclic codes in general and Reed-Solomon codes in detail. Reed-Solomon codes are used for implementing McEliece's crypto system. A short analysis of McEliece's crypto system security is also made together with a description of some known ways to break this type of cryptosystem. It is shown that using Reed-Solomon codes weaken this cryptosystem compared to using the original supposed Goppa codes. The security analyse also need a short summary of complexity theory and what it means that a problem is NP-complete. Keywords: Coding theory, Cyclic codes, BCH codes, Reed-Solomon codes, McEliece's cryptography system, Cryptography, Code breaking, Complexity theory, NP-complete

<p>Detta arbete är ett examensarbete i matematik på kandidatnivå vid Växjö universitet. Det är en studie av kodningsteori i allmänhet med fokusering på cykliska koder och Reed-Solomon-koder i synnerhet. Reed-Solomon-koderna används för att skapa McElieces kryptosystem. En kortfattad analys av McElieces kryptosystems säkerhet görs tillsammans med en genomgång av kända sätt att forcera denna typ av kryptosystem. Här visar det sig att användning av Reed-Solomon-kod försvagar kryptosystemet i förhållande till om den ursprungligt föreslagna Goppa-koden används. För att kunna göra denna säkerhetsanalys görs också en kortfattad genomgång av komplexitetsteori och vad det innebär att ett problem är NP-fullständigt.</p><p><strong>Nyckelord: </strong>Kodningsteori, Kodteori, Cykliska koder, BCH-koder, Reed-Solomon-koder, McElieces kryptosystem, Kryptering, Kodforcering, Komplexitetsteori, NP-fullständigt</p> / <p>This work is produced on bachelor level in mathematics at University of Växjö. It is a study of coding theory with focus on cyclic codes in general and Reed-Solomon codes in detail. Reed-Solomon codes are used for implementing McEliece's crypto system. A short analysis of McEliece's crypto system security is also made together with a description of some known ways to break this type of cryptosystem. It is shown that using Reed-Solomon codes weaken this cryptosystem compared to using the original supposed Goppa codes. The security analyse also need a short summary of complexity theory and what it means that a problem is NP-complete.</p><p><strong>Keywords:</strong> Coding theory, Cyclic codes, BCH codes, Reed-Solomon codes, McEliece's cryptography system, Cryptography, Code breaking, Complexity theory, NP-complete</p>

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES / A cyclic code is a speci c type of linear code. Its relevance consists in the fact that all its main information is intrinsic to the structure of the ideals in the quotient ring K[x]=(xn - 1) via an isomorphism. In this work, we characterize the cyclic codes in biunivocal correspondence with the ideals of this quotient ring. We will also present its generating matrix, the parity matrix and we will discuss its codi cation and decoding. / Um código cíclico é um tipo específico de código linear. Sua relevância consiste no fato de que todas suas principais informações são intrinsecas à estrutura dos ideais no anel quociente K[x]=(xn 1) via um isomorfismo. Neste trabalho, caracterizamos os códigos cíclicos em correspondência biunívoca com os ideais deste anel quociente. Apresentaremos também sua matriz geradora, a matriz de paridade e abordaremos sua codificação e decodificação.

Employing an error control code is one of the techniques to reduce the Peak-to-Average Power Ratio (PAPR) in an Orthogonal Frequency Division Multiplexing system; a well known class of such codes being the cosets of Reed-Muller codes. In this thesis, classes of such coset-codes of arbitrary linear codes are considered. It has been proved that the size of such a code can be doubled with marginal/no increase in the PAPR. Conditions for employing this method iteratively have been enunciated. In fact this method has enabled to get the optimal coset-codes. The PAPR of the coset-codes of the extended codes is obtained from the PAPR of the corresponding coset-codes of the parent code. Utility of a special type of lengthening is established in PAPR studies