Switching device power losses place critical limits on the design and performance of high-frequency integrated DC-DC converters. Especially, the layout of metal interconnects in lateral power MOSFETs has a profound effect on their on-resistances and conduction power losses. This thesis presents an analytical interconnect modeling and layout optimization technique for large-area power MOSFETs. The layout optimization of 24V LDMOS transistors in the area of 1 mm2 has achieved an improvement of 55 % in its on-resistance. The simulation result has been verified by experimental measurements on a test chip fabricated in TSMC 0.25 µm HV CMOS technology. In addition, this thesis presents an optimized output stage design methodology for the implementation of a 4 MHz, 12V to 1V integrated DC-DC converter. A segmented output stage scheme is employed to increase the converter efficiency at light load conditions. The peak efficiency of 84% was achieved at load current of 2 A.

The United Nations has declared 2012 the ``International Year of Sustainable Energy for All''. A substantial portion of the world's population (some 1.3 billion people) currently live without electricity and development efforts to reach them are progressing relatively slowly. This thesis follows the development of a technology which can enable community owned and operated microgrids to emerge based solely on the local supply and demand of that community. Although this thesis ends with the technical analysis of a DC/DC converter, there is a significant amount of background to cover in order to properly understand the context in which it will be used. After providing an introduction into typical rural electrification efforts and pointing out some of the shortcomings of these projects, this thesis introduces some cutting edge efforts which combine solar home system technology with cellular technology and discusses the benefits of such a marriage of technology. Next, the research proposes some tweaks to this novel technology and provides a high-level economic demonstration of the spread of solar home systems in a community based on these modifications. It then takes this concept even further and proposes the addition of a DC/DC converter which could turn these individual solar home systems into a proper microgrid. This thesis elaborates on the development process of simulating such a microgrid in PSCAD, including the individual components of a solar home system and the specific task of designing the converter which would form the backbone of the proposed microgrid. The final simulations and analyses demonstrate a microgrid that is both technically and economically feasible for developing world applications.

abstract: During the past decade, different kinds of fancy functions are developed in portable electronic devices. This trend triggers the research of how to enhance battery lifetime to meet the requirement of fast growing demand of power in portable devices. DC-DC converter is the connection configuration between the battery and the functional circuitry. A good design of DC-DC converter will maximize the power efficiency and stabilize the power supply of following stages. As the representative of the DC-DC converter, Buck converter, which is a step down DC-DC converter that the output voltage level is smaller than the input voltage level, is the best-fit sample to start with. Digital control for DC-DC converters reduces noise sensitivity and enhances process, voltage and temperature (PVT) tolerance compared with analog control method. Also it will reduce the chip area and cost correspondingly. In battery-friendly perspective, current mode control has its advantage in over-current protection and parallel current sharing, which can form different structures to extend battery lifetime. In the thesis, the method to implement digitally average current mode control is introduced; including the FPGA based digital controller design flow. Based on the behavioral model of the close loop Buck converter with digital current control, the first FPGA based average current mode controller is burned into board and tested. With the analysis, the design metric of average current mode control is provided in the study. This will be the guideline of the parallel structure of future research. / Dissertation/Thesis / M.S. Electrical Engineering 2011

abstract: Presently, hard-switching buck/boost converters are dominantly used for automotive applications. Automotive applications have stringent system requirements for dc-dc converters, such as wide input voltage range and limited EMI noise emission. High switching frequency of the dc-dc converters is much desired in automotive applications for avoiding AM band interference and for compact size. However, hard switching buck converter is not suitable at high frequency operation because of its low efficiency. In addition, buck converter has high EMI noise due to its hard-switching. Therefore, soft-switching topologies are considered in this thesis work to improve the performance of the dc-dc converters. Many soft-switching topologies are reviewed but none of them is well suited for the given automotive applications. Two soft-switching PWM converters are proposed in this work. For low power automotive POL applications, a new active-clamp buck converter is proposed. Comprehensive analysis of this converter is presented. A 2.2 MHz, 25 W active-clamp buck converter prototype with Si MOSFETs was designed and built. The experimental results verify the operation of the converter. For 12 V to 5 V conversion, the Si based prototype achieves a peak efficiency of 89.7%. To further improve the efficiency, GaN FETs are used and an optimized SR turn-off delay is employed. Then, a peak efficiency of 93.22% is achieved. The EMI test result shows significantly improved EMI performance of the proposed active-clamp buck converter. Last, large- and small-signal models of the proposed converter are derived and verified by simulation. For automotive dual voltage system, a new bidirectional zero-voltage-transition (ZVT) converter with coupled-inductor is proposed in this work. With the coupled-inductor, the current to realize zero-voltage-switching (ZVS) of main switches is much reduced and the core loss is minimized. Detailed analysis and design considerations for the proposed converter are presented. A 1 MHz, 250 W prototype is designed and constructed. The experimental results verify the operation. Peak efficiencies of 93.98% and 92.99% are achieved in buck mode and boost mode, respectively. Significant efficiency improvement is achieved from the efficiency comparison between the hard-switching buck converter and the proposed ZVT converter with coupled-inductor. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2016

abstract: Sliding-Mode Control (SMC) has several benefits over traditional Proportional-Integral-Differential (PID) control in terms of fast transient response, robustness to parameter and component variations, and low sensitivity to loop disturbances. An All-Digital Sliding-Mode (ADSM) controlled DC-DC converter, utilizing single-bit oversampled frequency domain digitizers is proposed. In the proposed approach, feedback and reference digitizing Analog-to-Digital Converters (ADC) are based on a single-bit, first order Sigma-Delta frequency to digital converter, running at 32MHz over-sampling rate. The ADSM regulator achieves 1% settling time in less than 5uSec for a load variation of 600mA. The sliding-mode controller utilizes a high-bandwidth hysteretic differentiator and an integrator to perform the sliding control law in digital domain. The proposed approach overcomes the steady state error (or DC offset), and limits the switching frequency range, which are the two common problems associated with sliding-mode controllers. The IC is designed and fabricated on a 0.35um CMOS process occupying an active area of 2.72mm-squared. Measured peak efficiency is 83%. / Dissertation/Thesis / Ph.D. Electrical Engineering 2013

Dans les nombreuses études actuelles sur le photovoltaïque, on assiste à de grands progrès tant dans le domaine des cellules à haut rendement énergétique, que sur les structures liées à l'exploitation. Afin de tirer parti de toute l'énergie produite, il a paru de tout premier ordre d'orienter les recherches sur les architectures parallèles en bus haute tension. Pour la génération de hautes tensions il est impératif d'utiliser des convertisseurs spécialement adaptés. En effet, si on utilise des convertisseurs classiques on se heurte à la problématique des pertes dans les composants de puissance, et notamment le transistor MOSFET de commutation utilisé pour le découpage. Une première étude a permis de vérifier que les contraintes de tension entraînent pour le transistor des pertes importantes aux tensions élevées. Cette première étude montre que seuls les transistors de faible tension inférieure à 100V ont des caractéristiques intéressantes pour notre application. Une recherche systématique a abouti à l'élaboration d'un convertisseur Boost à couplage magnétique. Grâce au recyclage des énergies parasites, les essais montrent que ce montage est bien adapté à notre application permettant d'obtenir des rendements de plus de 90%. Parmi les différentes stratégies d'extraction de puissance, le MPPT à incrément de conductance a été choisi pour ses qualités de précision et de facilité de mise en œuvre. Chaque panneau équipé d'un convertisseur envoie la puissance recueillie sur le bus haute tension, lui même relié à un onduleur de type SMA / In various studies on photovoltaic, major progresses have been observed, both concerning the cells and also in the field of their use. In order to take advantage of the energy it has been paramount to focus on parallel High Voltage bus. This High Voltage generation requires dedicated converters. In fact, using classical converters implicates important losses in the MOSFET used for switching. In a prior study we could ascertain important losses on transistors when submitted to high voltages as we assumed. It was shown then that only the transistors supporting a voltage less than 100V can be used for our application. A systematic investigation led to the Magnetically Coupled Boost converters. Thanks to the recycling of parasitic losses, our tests show an efficiency superior than 90%. Among the different power extraction strategies, the incremental conductance MPPT was used because of its top of the arts performances and convenience. Every DC/DC implemented panel converter supplies the HVDC bus which, itself, is connected to the SMA inverter

No description available.

The paper discusses a design of a matrix LED display for car rear combination lamps and its power supply. It provides basic information about converters, light, and electronics requirements in the automotive industry. The design of individual circuits, printed circuit board, and firmware are analyzed. Predefined animations have safety, practical, and design functions. The innovative solution presents a new level of communication between the vehicle and its environment. The purpose is to increase safety and improve traffic flow.

This thesis deals with the design and realization of a DC/DC converter, which allows power conversion from 10-52 V input voltage to 10-52 V output voltage at a maximum output current of 3 A. The converter can communicate with the superior system via the CAN. In the first chapter I deal with the available integrated circuits of DC/DC converters, from which I choose one for my application. In the second chapter, I propose a block scheme of the converter, which includes the requirements from the assignment as well as my additional ones. In the third chapter I deal with the design of an electronic circuit and with the calculation of control loops. In the fourth chapter I propose firmware for the STM32 MCU, which controls the device and communicates with the superior system. In the last chapter the DC/DC converter is tested.

abstract: Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2019