Closed Circuit Television (CCTV) has been widely applied to crack down crimes. However, the comprehensive set-up of the CCTV in public space was controversial in terms of the issues of human rights, law, regulation, and of applications to detecting crimes. As the integration and application of CCTV are getting popular, it seems to be significant to explore the dilemmas of applying CCTV to collect information and meantime protecting people¡¦s privacy. The study is based on the architecture-oriented (AO), applying the method of situational crime privation (SCP) and architecture descriptive language (ADL) under the frame of Structure-Behavior Coalescence (SBC) of Enterprise Architecture (EA), to achieve the following goals: (1) to investigate the current CCTV management and regulation, (2) to construct a more appropriate CCTV management model, (3) to assure the public by making public the CCTV application procedure In the end, to increase the reliability and validity of the study, systematic observation approach was added to testify the operative and regulative procedures of using CCTV.

The international economy grew slowly in recent years. Small panel industry's profitability is declining year by year, coupled with external competitive pressure, high material prices and green environmental requirements. The small panel OEM¡¥s operation becomes more challenging. Facing the marginal profit age, the small panel industry must be able to extend the manufacturing and producing capabilities in order to increase competitiveness and cost savings. This study uses the Structure-Behavior Coalescence Architecture Description Language (SBC-ADL) to construct a multiple view integrated Architecture-Oriented Small Panel OEM Factory MES Model (AOSPOEMFMESM). SBC-ADL emphasizes on ¡§Structure + Behavior". Spirit of SBC-ADL can more clearly illustrate the need to change according to customer requirements and complex manufacturing process in the MES of small panel OEM factory. AOSPOEMFMESM describes in detail that small panel OEM factory organization, MES and other information sharing systems and the interaction between. AOSPOEMFMESM make it easier for the mangers or the users to know and control the entire MES and enhance the competitiveness of an enterprise.

Nowadays, facing the severe pressure of globalization and strong demand of high products quality from customers, enterprises in Taiwan are forced to enhance the quality and yield rate of manufactured products in order to gain their competitive edges. An enterprise usually relies on the statistical process control (SPC) software system to achieve this goal. The SPC approach measures, understands, and controls the variation of the products manufacturing process. This study uses the structure-behavior coalescence architecture description language (SBC-ADL) to construct the architecture-oriented statistical process control model (AOSPCM). A model constructed by the SBC-ADL differs from others software model in its using six golden rules which help integrate the structure and behavior of a software system. AOSPCM constructed in this study improved substantially both training and communication endeavors within an enterprise, reduced costs due to estimation errors, requirement uncertainties, and project delays. Overall, AOSPCM benefits a great deal to both developers and users of a software project. In general, most manufacturing and high-tech industries rely heavily on the SPC software system. Therefore, AOSPCM constructed in this study provides a standard model for other software developers to follow. Following the AOSPCM, any SPC software developer shall improve lots of development efforts and cost savings within an enterprise.

According to the Department of Statistic, there are 163 existing Universities, Colleges and Institutes with 1,352,084 students in the 100th academic year. Under the trend of globalization, Taiwan¡¦s society and high education are facing an enormous change. And as to dealing with those changes Taiwan has to rely on the globalized higher education system to accomplish. Therefore, to expend recruiting aboard students is the key of success for Ministry of Education to enhance the development of globalizing higher education. However, Taiwan is a late bloomer on globalizing the higher education and English is the second language to us. Therefore, problems are generated when working on recruiting international students. As the matter of the fact, the matters of caring and managing international students appear to be essential. This study constructs an architecture-oriented international student management model (AOISCM) using the structure-behavior coalescence architecture description language (SBC-ADL). AOISCM is an international student centered blueprint which includes six fundamental diagrams: architecture hierarchy diagram, framework diagram, component operation diagram, component connection diagram, structure-behavior coalescence diagram, and interaction flow diagram. Comparing with existing international student care and management model from various kinds of views, all results demonstrate that AOISCM is superior to the existing model. AOISCM covers the organization structure and caring behavior. By this model we are able to see the relationship between international students and the universities, and show the whole picture of the caring and managing international students. Therefore, using AOISCM on caring and managing international students will help universities to meet the high proficiency on reaching an agreement on international student¡¦s communication. Last and not least, AOISCM shall clarify the duties for each divisions and flexible sources allocation for office executives.

Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, September 1990. / Thesis Advisor(s): Lee, Chin-Hwa. Second Reader: Butler, Jon T. "September 1990." Description based on title screen as viewed on December 29, 2009. DTIC Identifier(s): Computerized simulation, computer aided design, logic circuits, subroutines, theses, integrated circuits. Author(s) subject terms: VHDL, costfunction, hardware description language. Includes bibliographical references (p. 77). Also available in print.

Thesis (Ph.D.), Memorial University of Newfoundland, 2000. / Bibliography: leaves 155-165.

Traditionally manufacturing job shops either have a process layout or a product layout. The advantages of one type of layout tend to be a disadvantage for the other. Hybrid cellular constructs represents a novel fusion of process and product layouts. In this thesis, hybrid cellular constructs specifically Hybrid Flow Shops and Reoriented andamp; Reshaped Cells are clearly described in terms of their structure, key features, and modes of operation. An engineering procedure is illustrated by cases and particular manufacturing circumstances where each concept would be most useful are identified. This thesis then defines the lean practices that are compatible with the structure in question and identifies what practices are incompatible. It suggests how to modify lean practices to fit and at least obtain some benefits for the incompatible ones. Finally, a procedure for design of logistics management systems for assembly cells and lines is presented.

Verification and debug of integrated circuits for embedded applications has grown in importance as the complexity in function has increased dramatically over time. Various modeling and debugging techniques have been developed to overcome the overwhelming challenge. This thesis attempts to address verification and debug methods by presenting an accurate C model at the bit and algorithm level coupled with an implemented Hardware Description Language (HDL). Key concepts such as common signal and variable naming conventions are incorporated as well as a stepping function within the implemented HDL. Additionally, a common interface between low-level drivers and C models is presented for early firmware development and system debug. Finally, selfchecking verification is discussed for delivering multiple test cases along with testbench portability.

Modern processor architectures suffer from an ever increasing gap between processor and memory performance. The current memory-register model attempts to hide this gap by a system of cache memory. Line Associative Registers(LARs) are proposed as a new system to avoid the memory gap by pre-fetching and associative updating of both instructions and data. This thesis presents a fully LAR-based architecture, targeting a previously developed instruction set architecture. This architecture features an execution pipeline supporting SWAR operations, and a memory system supporting the associative behavior of LARs and lazy writeback to memory.

Thesis(M.S.)--Auburn University, 2006. / Abstract. Vita. Includes bibliographic references.