A propagação de eventos transientes na lógica combinacional é estudada através da simulação elétrica do circuito, utilizando-se o simulador Hspice. Uma das fontes de falhas transientes é o pulso transiente causado por partículas ionizantes que atingem o circuito. O estudo é centrado nas propriedades de mascaramento elétrico das portas lógicas. Estuda-se a propagação do pulso transiente através de cada estágio da lógica até que alcance um elemento da memória. A partir do estudo das propriedades de mascaramento elétrico, propõe-se um modelo simples para a degradação e ampliação de um pulso transiente enquanto este é propagado através de uma cadeia de portas lógicas. O modelo considera as propriedades elétricas das portas, utilizando como parâmetro principal da modelagem o tempo de propagação (atraso) da porta lógica. O modelo é computacionalmente eficiente e adequado para implementação em ferramentas de auxilio de projeto automatizadas, como ferramentas de timing analysis. A ferramenta timing analysis poderia então executar um algoritmo para percorrer todos os nós de um circuito, determinando os nós mais sensíveis, ajudando a estimar e reduzir a taxa de falhas transientes do circuito. Visando no futuro, testar o modelo e o comportamento de circuitos combinacional sobre efeito de partículas radioativas, foram estudadas algumas arquiteturas existentes capazes de medir a largura dos pulsos transientes nos circuitos combinacionais on-chip, para compararmos com o modelo analítico proposto e os comportamentos elétricos obtidos através de simulação Hspice. / Single Event Transients in Combinatorial Logic are studied using spice-level circuit simulation. The study is centered on the electrical masking properties of the gates. The propagation of the transient through each stage of logic until it reaches a memory element is characterized. Both duration and amplitude of the transient pulse are attenuated as it propagates through the logic gates. A simple, first order model for the degradation of a transient pulse as it is propagated through a chain of logic gates is proposed. The model considers the electrical properties of the logic gates through which the pulse propagates. The model is computationally efficient and intended to be implemented in a timing analysis tool. The timing analysis tool could then implement an algorithm to traverse all circuit nodes, determining the most sensitive nodes, helping to estimate and reduce the soft error failure rate of the whole circuit. Aiming at the future, test the model and the behavior of combinatorial circuits effect on radioactive particles, was studied some existing architectures capable of measuring the width of transient pulses in combinatorial circuits on-chip, to compare with the proposed analytical model and the electrical behaviors obtained by Hspice simulation.

A propagação de eventos transientes na lógica combinacional é estudada através da simulação elétrica do circuito, utilizando-se o simulador Hspice. Uma das fontes de falhas transientes é o pulso transiente causado por partículas ionizantes que atingem o circuito. O estudo é centrado nas propriedades de mascaramento elétrico das portas lógicas. Estuda-se a propagação do pulso transiente através de cada estágio da lógica até que alcance um elemento da memória. A partir do estudo das propriedades de mascaramento elétrico, propõe-se um modelo simples para a degradação e ampliação de um pulso transiente enquanto este é propagado através de uma cadeia de portas lógicas. O modelo considera as propriedades elétricas das portas, utilizando como parâmetro principal da modelagem o tempo de propagação (atraso) da porta lógica. O modelo é computacionalmente eficiente e adequado para implementação em ferramentas de auxilio de projeto automatizadas, como ferramentas de timing analysis. A ferramenta timing analysis poderia então executar um algoritmo para percorrer todos os nós de um circuito, determinando os nós mais sensíveis, ajudando a estimar e reduzir a taxa de falhas transientes do circuito. Visando no futuro, testar o modelo e o comportamento de circuitos combinacional sobre efeito de partículas radioativas, foram estudadas algumas arquiteturas existentes capazes de medir a largura dos pulsos transientes nos circuitos combinacionais on-chip, para compararmos com o modelo analítico proposto e os comportamentos elétricos obtidos através de simulação Hspice. / Single Event Transients in Combinatorial Logic are studied using spice-level circuit simulation. The study is centered on the electrical masking properties of the gates. The propagation of the transient through each stage of logic until it reaches a memory element is characterized. Both duration and amplitude of the transient pulse are attenuated as it propagates through the logic gates. A simple, first order model for the degradation of a transient pulse as it is propagated through a chain of logic gates is proposed. The model considers the electrical properties of the logic gates through which the pulse propagates. The model is computationally efficient and intended to be implemented in a timing analysis tool. The timing analysis tool could then implement an algorithm to traverse all circuit nodes, determining the most sensitive nodes, helping to estimate and reduce the soft error failure rate of the whole circuit. Aiming at the future, test the model and the behavior of combinatorial circuits effect on radioactive particles, was studied some existing architectures capable of measuring the width of transient pulses in combinatorial circuits on-chip, to compare with the proposed analytical model and the electrical behaviors obtained by Hspice simulation.

A propagação de eventos transientes na lógica combinacional é estudada através da simulação elétrica do circuito, utilizando-se o simulador Hspice. Uma das fontes de falhas transientes é o pulso transiente causado por partículas ionizantes que atingem o circuito. O estudo é centrado nas propriedades de mascaramento elétrico das portas lógicas. Estuda-se a propagação do pulso transiente através de cada estágio da lógica até que alcance um elemento da memória. A partir do estudo das propriedades de mascaramento elétrico, propõe-se um modelo simples para a degradação e ampliação de um pulso transiente enquanto este é propagado através de uma cadeia de portas lógicas. O modelo considera as propriedades elétricas das portas, utilizando como parâmetro principal da modelagem o tempo de propagação (atraso) da porta lógica. O modelo é computacionalmente eficiente e adequado para implementação em ferramentas de auxilio de projeto automatizadas, como ferramentas de timing analysis. A ferramenta timing analysis poderia então executar um algoritmo para percorrer todos os nós de um circuito, determinando os nós mais sensíveis, ajudando a estimar e reduzir a taxa de falhas transientes do circuito. Visando no futuro, testar o modelo e o comportamento de circuitos combinacional sobre efeito de partículas radioativas, foram estudadas algumas arquiteturas existentes capazes de medir a largura dos pulsos transientes nos circuitos combinacionais on-chip, para compararmos com o modelo analítico proposto e os comportamentos elétricos obtidos através de simulação Hspice. / Single Event Transients in Combinatorial Logic are studied using spice-level circuit simulation. The study is centered on the electrical masking properties of the gates. The propagation of the transient through each stage of logic until it reaches a memory element is characterized. Both duration and amplitude of the transient pulse are attenuated as it propagates through the logic gates. A simple, first order model for the degradation of a transient pulse as it is propagated through a chain of logic gates is proposed. The model considers the electrical properties of the logic gates through which the pulse propagates. The model is computationally efficient and intended to be implemented in a timing analysis tool. The timing analysis tool could then implement an algorithm to traverse all circuit nodes, determining the most sensitive nodes, helping to estimate and reduce the soft error failure rate of the whole circuit. Aiming at the future, test the model and the behavior of combinatorial circuits effect on radioactive particles, was studied some existing architectures capable of measuring the width of transient pulses in combinatorial circuits on-chip, to compare with the proposed analytical model and the electrical behaviors obtained by Hspice simulation.

Depuis quelques années, les mémoires non-volatiles de type Flash sont présentes dans un grand nombre de systèmes sur puce. La grande densité d'intégration et la complexité de leur procédé de fabrication rendent les mémoires Flash de plus en plus sujette aux défauts. La présence de défauts dans les mémoires est une des problématiques majeures. En effet, de tels défauts pourraient affecter le rendement, la rétention, l'endurance et donc la fiabilité des mémoires Flash. Cette thèse a porté sur l'analyse des mécanismes de défaillances, la modélisation des comportements fautifs et le développement de solution en vue d'améliorer le test des mémoires Flash. Dans ce contexte, nous avons proposé un modèle SPICE de la mémoire Flash TSTAC™ d'ATMEL. En comparaison avec l'état de l'art, le modèle SPICE proposé permet de simuler les opérations fonctionnelles de la mémoire de manière dynamique. Ce modèle a était utilisé pour effectuer des simulations d'injections de défauts réalistes pouvant affecter la matrice de la mémoire Flash TSTAC™. Ces simulations ont permis de prédire leurs comportements fautifs et de déterminer leurs modèles de fautes. D'autres types de simulations électriques effectuées à l'aide du modèle électrique ont permis de développer deux méthodes de caractérisation : la première permettant de détecter les variations d'épaisseur d'oxyde des cellules mémoires ; la deuxième méthode permet de caractériser la programmation par pulsation (pulse programming) et ainsi prédire la valeur du champ électrique durant l'écriture d'une cellule. / In recent years, non-volatile Flash memories have been widely used on system on chip. Their high integration density and complexity of manufacturing process make the Flash memory prone to defects. The defects in the memory are one of the major issues. They could affect the performance, retention, endurance, and therefore the reliability of Flash memories. This thesis was focused on the analysis of failure mechanisms, the faulty behavior modeling and the development of solution in order to improve the testing of Flash memories. In this work, we have proposed an electrical SPICE model of an ATMEL Flash memory. Compared with the state of art, the proposed model allows to simulate the static and dynamic behavior of the memory. This model is used to perform defect injection simulations affecting the Flash memories. These simulations are able to predict faulty behavior by fault modeling. Other types of electrical simulations highlight two characterization methods. The first one is able to detect the oxide thickness variations of the memory cells; the second one allows to characterize the programming pulse and then predict the electric field value during the programming of the cell.

Maintenance of the structural integrity and damage detection are critical for all massive and complicated new and aging structures. A structural health monitoring (SHM) system intends to identify damage on the structure under monitoring, so that necessary action can be taken in advance to avoid catastrophic results. Impedance-based SHM utilizes a piezoelectric ceramic as a collocated actuator and sensor, which measures the electrical impedance of the piezoelectric ceramic over a certain frequency range. The impedance profile of a structure under monitoring is compared against a reference profile obtained from the healthy structure. An existing approach called the sinc method adopts a sinc wave excitation and performs traditional discrete Fourier transform (DFT) based structural condition assessment. The sinc method requires rather intensive computing and a digital-to-analog converter (DAC) to generate a sinc excitation signal. It also needs an analog-to-digital converter (ADC) to measure the response voltage, from which impedance profile is obtained through a DFT. This dissertation investigates system design approaches for impedance-based structural health monitoring (SHM), in which a primary goal is low power dissipation. First, we investigated behaviors of piezoelectric ceramics and proposed an electrical model in order to enable us to conduct system level analysis and evaluation of an SHM system. Unloaded and loaded piezoelectric ceramics were electrically modeled with lumped linear circuit components, which allowed us to perform system level simulations for various environmental conditions. Next, we explored a signaling method called the wideband method, which uses a pseudorandom noise (PN) sequence for excitation of the structure rather than a signal with a particular waveform. The wideband method simplifies generation of the excitation signal and eliminates a digital-to-analog converter (DAC). The system form factor and power dissipation is decreased compared to the previously existing system based on a sinc signal. A prototype system was implemented on a digital signal processor (DSP) board to validate its approach. Third, we studied another low-power design approach which employs binary signals for structural excitation and structural response measurement was proposed. The binary method measures only the polarity of a response signal to acquire the admittance phase, and compares the measured phase against that of a healthy structure. The binary method eliminates the need for a DAC and an ADC. Two prototypes were developed: one with a DSP board and the other with a microcontroller board. Both prototypes demonstrated reduction of power dissipation compared with those for the sinc method and for the wideband method. The microcontroller based prototype achieved an on-board SHM system. Finally, we proposed an analytical method to assess the quality of the damage detection for the binary method. Using our method, one can obtain the confidence level of a damage detection for a given damage distance. / Ph. D.

Les pontages aorto-coronaires sont réalisés afin d’assurer une reperfusion myocardique. Un modèle de circulation coronaire serait utile pour prédire les effets des interventions pharmacologiques et pathophysiologiques en particulier les pontages coronaires. Dans ce travail, nous étudions des patients avec des sténoses coronaires sévères. Nous avons créé un modèle basé sur l’analogie hydraulique/électrique qui décrit le système artériel coronaire mathématiquement. Les simulations permettant de calculer les pressions et les flux dans les artères natives sténosées, les branches collatérales et les capillaires. Dans notre modèle biomécanique, les capillaires sont représentés par leur résistance hydraulique ; la résolution des équations de mécanique des fluides dans un tel réseau est complexe raison pour laquelle nous avons utilisé un modèle électrique. Dans ce modèle, chaque segment d’artère coronaire est représenté par un modèle de circuit analogue avec une résistance R, une capacitance C et une inductance L. Notre système artériel coronaire a été modélisé en présence de pontages. Dans cette analogie hydraulique/électrique, les pressions et les flux correspondent au voltage électrique et au courant. L’imagerie diagnostique seule est insuffisante pour prédire les résultats d’un traitement donné pour un patient unique de par ses lésions. La notion de Pw (pression distale à la thrombose) est proportionnelle au flux collatéral dans cette région. Un index basé sur des mesures de pression a été proposé par Pijls afin de déterminer la significativité fonctionnelle de la collatéralité et de faciliter la prise de décision chez les patients avec une collatéralité équivoque. Cet index est nommé Collateral Flow Index (CFI). Toutefois, la relation entre le flux collatéral et la valeur de Pw n’est pas aussi simple en particulier lorsqu’il s’agit de vaisseaux multisténosés. Nous avons donc développé un CFI modifié et démontré que le nouvel index de pression du flux collatéral est plus sensible aux variations des pressions distales aux thromboses, Pw, pouvant ainsi décrire le rôle du flux collatéral plus précisément. De plus, ce nouvel index reflète la balance entre deux chutes de pression : (Pw-Pv) correspondant au flux distal à la thrombose et (Pao-Pw) correspondant au flux collatéral. Nous avons également analysé les facteurs les plus importants qui déterminent la perfusion du territoire droit. Sept nouveaux patients ont également été étudiés. Le caractère temps-dépendant des résistances capillaires a été introduit afin de prendre en compte le collapsus des vaisseaux coronaires en systole dû à la contraction ventriculaire. Une des conclusions majeures est que la revascularisation complète est totalement justifiée chez nos patients. Enfin, la dernière partie a été consacrée à l’étude du Fractional Flow Reserve (FFR). Notre modèle est maintenant utilisé afin d’évaluer la fonctionnalité de la circulation coronaire après revascularisation. / Bypass grafting is performed to obtain myocardial reperfusion. Coronary artery diseases induce the development of a coronary collateral circulation. However, developed collaterals are a risk factor for restenosis. We study the case of severe coronary diseases. We proposed a model based on hydraulic/electric analogy. The simulations allow to know the pressures and flow rates with the hope that these computations will augment the surgeons experience. The reductions of the stenosed arteries were estimated from angiographic observations. Flow rates are measured with a flowmeter.In the biomechanical model of this coronary network, the capillaries are represented by their hydraulic resistances. Full resolution of the fluid mechanics equations in such a network is complicated, reason why we used an analog electrical model. In the electrical model, each segment of the coronary artery is simulated by an equivalent analog circuit model. Our coronary artery system was modeled in the presence of bypasses. In this hydraulic/electric analogy, pressure and flow rate correspond to electrical voltage and current. The so-called coronary wedge pressure Pw (pressure distal to the thrombosis) is proportional to collateral flow to this area. An index based on pressure measurements has been proposed. This index is called Collateral Flow Index (CFI). However, the relationship between the collateral flow and the Pw value is not simple. That’s why we developed another CFI and demonstrated that the proposed new pressure based index of collateral flow is more sensitive to the variations of the values of the pressure distal to the thrombosis and could thus describe the role of collateral flow. Moreover, this new index is likely to reflect the balance between the two pressure drops: (Pw- Pv) driving the flow distal to the thrombosis and (Pao- Pw), driving the collateral flow. We also studied the flow rate toward the right heart territory and demonstrated that the influence of capillary and collateral resistances cannot be analyzed separately. We also analysed the most important factors that determine the right territory perfusion using a mathematical analysis which confirmed that the CFI does not fully reflect the flow rate delivered to the occluded territory. In particular, the capillary and collateral resistances are demonstrated to have a major influence on the perfusion of the right occluded territory. Even if the CFI may be improved by a more appropriate combination of the measured pressure values, collateral flow and microvascular status determination in patients with three-vessel disease remains a challenge. Another part of this work integrated seven new patients. Simulated profiles of flow rates and pressures were obtained in case of fixed and variable resistances. The last part was dedicated to the study of the Fractional Flow Reserve. Our model is now used to evaluate the functionality of the coronary circulation after revascularization.

Le travail presente dans ce memoire a pour objet principal l'etude des phenomenes de bruit du fond electrique basse frequence dans des transistors pour applications micro-ondes de type effet de champ (HEMT) sur SiGe et GaN ainsi que de type bipolaire a heterojonction (TBH) a base de silicium-germanium (SiGe). Dans un premier chapitre nous rappelons les caracteristiques et proprietes essentielles des sources de bruit en exces que l'on rencontre generalement dans ce type de composants et proposons une description des bancs de mesure de bruit mis en oeuvre. Dans les deuxieme et troisieme chapitres, nous proposons une analyse detaillee de l'evolution du bruit observe en fonction de la frequence, de la polarisation, et de la geometrie sur des HEMTs des deux familles technologiques SiGe et GaN. Nous avons en particulier etudie les deux generateurs de bruit en courant en entree et en sortie respectivement iG et iD ainsi que leur correlation. Ceci nous a permis, en nous appuyant aussi sur l'analyse des caracteristiques statiques des transistors, d'identifier les diverses sources de bruit en exces presentes dans ces composants et de faire des hypotheses sur leurs origines. Le dernier chapitre est consacre aux TBHs a base de SiGe. Dans une premiere partie nous etablissons comment varie le bruit basse frequence de TBHs, fabriques par un premier constructeur, en fonction de la polarisation, de la geometrie et de la fraction molaire de germanium. Dans une seconde partie nous mettons en evidence, d'apres nos observations effectuees sur des TBHs fabriques par un second constructeur, l'impact important sur le bruit BF de stress thermiques appliques sur ce type de composants.