Traditionally, the goal of channel routing algorithms is to route the nets with as few tracks as possible to minimize the chip area and achieve 100 percent connection. However, the manufacturing yield may not reach a satisfactory level if care is not taken to reduce the critical areas which are susceptible to defects. Our approach is to systematically eliminate critical areas by floating, burying, and bumping net segments as well as shifting vias. The yield optimizing routing (YOR) algorithm also minimizes the number of vias since vias in a chip increase the manufacturing complexity which again degrades the yield. The algorithm has been implemented and applied to benchmark routing layouts in the literature. The experimental results show that large reduction in the number of critical areas and significant improvement in yield are achieved, particularly for practical size channels such as the Deutsch's difficult problem.

Simultaneous switching noise was calculated for a number of CMOS drivers switching together. CMOS receiver noise immunity and the feed through of simultaneous switching noise from a D.C. "ON" driver were studied. The effects of skewing output driver switching on the simultaneous switching noise were explained. The performance trade-offs in using a damping resistor to minimize switching noise were analyzed. A distributed lumped equivalent model has been developed to model signal propagation over noisy reference planes, and thereby to accurately predict the overall noise levels in a system. The impact of package pin distribution on noise on the reference plane was analyzed.

Simulations were performed to assess the performance capabilities of a proposed design for an airborne spectral sunphotometer to operate on the NASA ER-2 aircraft. The detector system characteristics were simulated for typical operation conditions, and the results suggest that it is capable of achieving the scientific objectives of the ER-2 sunphotometer. A simulation program was developed for the retrievals of the optical depth, extinction/absorption coefficient at selected wavelengths, including a detailed error component analysis. The last function is particularly important for achieving high accuracy retrievals, since it allows one to trace back the error sources, and correspondingly make adjustments in data sensing or flight parameters. Models of the diffuse light dependencies airmass, wavelength, and Rayleigh and aerosol optical depth were also established. An correction method was constructed based on these models to permit high accuracy retrievals. Simulation results show that this scheme is highly accurate.

Rapid progress in telecommunication and introduction of wireless phones has revolutionized the way, in which the analog signal is treated. High Radio Frequency (RF) pollution caused by increased number of subscribers imposes new requirements on the quality of transmitted RF signal. These requirements are met by introduction of Digital Direct Synthesis (DDS) of Intermediate Frequency (IF). The DDS eliminates the analog IF mixing stage, which is responsible interference with modulated signal. The high accuracy of DDS modulation is possible only with high quality digital-to-analog conversion. The design of Digital-to-Analog Converters (DAC) providing high-speed and high-resolution is extremely difficult. To overcome problems caused by manufacturing process variation numerous techniques such as thermometer coding or calibration are utilized in DAC design. However, in many cases implementation of these techniques becomes a source of new problems such as clock jitter or glitch. To solve them simulation of DAC, depicting numerous effects of physical phenomena, is an absolute necessity. Unfortunately such simulation with utilization of off-the-shelf mixed signal simulators is very demanding. Therefore simulation of all DAC circuit becomes impractical due to long simulation time or lack of good models of still studied phenomena such as glitch. A novel method allowing for simultaneous and accurate representation of numerous phenomena and significantly increasing simulation speed is proposed. The method is called a Perfect Sampling Technique (PST) and it allows for precise calculation of most important in telecommunication dynamic DAC performance metric---the Spurious Free Dynamic Range (SFDR). The technique was primarily built to overcome the deficiencies of popular Discrete Fourier Transform (DFT). This novel approach allows for concurrent simulation of the following phenomena: deterministic and random clock jitter, random and graded current source mismatch, and the glitch and output finite impedance. The implemented in Visual C++ simulator provides means of representation of various DAC structures: segmentation (thermometer and binary coding), 2D layout of current source matrix and analog switch dynamic characteristics. It utilizes behavioral models of DAC building blocks (analog switches) in custom-built extremely fast event driven simulation framework. It also provides means for parametric, statistical, transient and spectral analysis of DAC.

The challenge of target classification is addressed in this work with both feature extraction and classifier hyperparameter optimization investigations. Simulated and measured high-range resolution radar data is processed, features are selected, and the resulting features are given to a classifier. For feature extraction, we examine two techniques. The first is a supervised method requiring an "expert" to identify and construct features. The performance of this approach served as motivation for the second technique, an automated wavelet packet basis approach. For this approach, we develop the Kolmogorov-Smirnov best-basis technique that utilizes empirical cumulative distribution functions and results in improved classification performance at low dimensionality. To measure classification efficacy, we use a quadratic Bayesian classifier, which assumes a Gaussian distribution as well as a support vector machine. The support vector machine is a classifier, which has generated excitement and interest in the pattern recognition community due to its generalization, performance, and ability to operate in high dimensional feature spaces. Although support vector machines are generated without the use of user-specified models, required hyperparameters, such as kernel width, are usually user-specified or experimentally derived. We develop techniques to optimize selection of these hyperparameters. These approaches allow us to characterize the problem, ultimately resulting in an automated approach for optimization, semi-alignment .

Statistical variations in physically proximate iso-drawn MOSFETs limit the yield and performance of VLSI circuits and thus receive the attention of integrated circuit communities. As technology scales, variations must be made to scale as well. Some variations can be reduced by tighter control of processes. However, some variations such as random dopant fluctuations (RDF) may not be controllable, or are amenable to control only by radical and expensive changes in manufacturing methodology. Before undertaking such changes, it is prudent to see whether RDF really is a problem, and to do this we need an accurate estimate of the size of RDF effects. This work advances these goals. The first part of this dissertation provides an experimental assessment of different variation sources and a comparison of their contributions to transistor performance variation. Our study shows that macroscopic geometrical variations are significant and cannot be ignored. The second part of the dissertation presents a novel approach to assessing how potential at any position in the MOSFET channel is affected by accidental arrangements of point charges. The potential and the statistics are treated exactly for the first time. We find that as device scaling reaches the sub-10 nm regime, the earlier RDF work becomes unacceptable because the approximation made of lumping charge on numerical mesh nodes becomes too inaccurate. Our method is freed from this approximation because the potential and the statistics are determined analytically. Moreover, our method proves efficient computationally compared to the existing numerical analyses. The remaining part assesses the impact of MOSFET scaling on the potential variation introduced by RDF. It is shown for the first time that charge location variations dominate charge number variations. We examine the role of structural parameters upon the potential variation, including oxide thickness t, depletion width w, device area L², number nu of charges present, number N of sites available for the charges to reside, and average charge density/cm² N(S). Our study shows that reduction in L at a fixed N(S), t and w has no effect until the device radius becomes smaller than a screening radius. At this point, further reduction gives rise to a smaller standard deviation of potential σ and mean potential μ, but a larger σ/μ. This last trend is due to charge location variations, and contradicts previous approximate treatments that show an opposite trend in σ.

We design and analyze LDPC codes for magnetic disk drives, wireless modems, and packet transmission on the internet in this dissertation. A new method of constructing rate-compatible LDPC codes is proposed for large file broadcast on the Internet and a family of variable-length rate-compatible LDPC codes is designed with very low error-rate floors. We study the concatenated zigzag (CZ) code and the turbo product-code with single parity-check component code (TPC/SPC) for EPR4 channel. Simulations show a coding gain of about 4 dB over uncoded EPR4 by the two codes. Collaborating with Seagate Technologies, we made greater than 100Gb/in2 recordings using a TPC/SPC code. A coding gain comparable to the simulations was observed. We examine the TPC/SPC-coded EPR4 channel with soft-output Viterbi Algorithm (SOVA) and show that it is SOVA's optimistic reliability outputs that result in SOVA detector's performance degradation relative to the BCJR detector. We propose a simple remedy and demonstrate that the modified SOVA-TPC/SPC system gives about the same performance as the BCJR-TPC/SPC system. Using a similar methodology, we demonstrate the min-sum algorithm for LDPC code also provides optimistic reliability values. Based on the Gaussian approximation and EXIT chart, we develop a design technique for LDPC-coded higher-order modulation systems on an AWGN channel and present an example of a 2 bits/symbol LDPC-coded 8PSK scheme operating about 0.6 dB from the capacity at a BER of 10-6. We also propose a reliability-based mapping strategy. Compared to conventional strategies, this strategy gives a 0.15 dB-0.2 dB performance improvement without added complexity. The LDPC-coded OFDM system is analyzed based on a mutual information metric. We demonstrate that the mutual information between the transmitted binary sequence and the soft input to LDPC decoder is a precise and robust measure for characterizing the performance of the LDPC-coded system. Given this, we formulate an adaptive bit-loading and power-allocation problem, and design adaptive mutual information-based algorithms. Simulations show that those algorithms ensure the system robust performance against channel fluctuations. It is also shown that, with those algorithms, the system only suffers little performance loss if coding rate adaptation is not used.

A variety of topics in large-signal and system-level power electronics are explored. First, the load-sharing problem for converters with parallel- and series-connected outputs is defined and explained. Requirements for load-sharing behavior are illustrated graphically. Many classes of switching converters are capable of load-sharing aside from current-programmed-mode (CPM) converters, including but not limited to discontinuous-mode (DCM) pulse-width-modulated (PWM) converters and resonant converters. The input filter problem is studied for high-power-factor rectifiers (HPFRs) based on the DCM flyback converter. Such HPFRs require an input filter to reduce switching noise conducted to the AC line, but the filter can degrade the power factor and interfere with converter operation. The analysis allows filter design that minimizes and balances these effects. Intuitive and analytical approaches are given and compared. The analytical approach uses phase plane methods usually used for resonant converter analysis. Although the filter design is for a specific converter, the approach is applicable to any HPFR. A single-quadrant negative resistor is synthesized from a DCM flyback converter. This circuit is simple, efficient, and can handle power levels over 100W. A design procedure and small-signal analysis are given. Additionally, a set of large-signal dynamic circuit models are presented for DCM PWM converters. A general impedance synthesizer is developed based on a four-quadrant switching converter. This circuit is used to create the negative resistance pseudoinverter, which puts power onto the AC line for sale to a utility. To develop the pseudoinverter, the concept of load reduction is employed. Potential stability problems are studied and a solution implemented. The synthesis of self-contained reactive components is also studied. Extensive experimental verification substantiates the majority of the concepts in this dissertation. Simulation is also used to support some of the analysis.

A domain model consistent with the measured capacitance-voltage ( CV) characteristic of PZT (Pb( Zr,Ti)O₃) capacitors is proposed. The model is introduced using a macroscopic electric field that is spatially uniform through the depth of the film. Then this multiple-domain model is generalized, and a spatially varying electric field model with a domain structure varying through the depth of the film is proposed. The spatial variation of the electric field is caused by dopant-ion charges in this work. A position-dependent permittivity is then deduced. Based upon this permittivity, the extraction of doping profiles in ferroelectric thin film capacitors using ferroelectric capacitance-voltage (CV) measurements is studied. The doping profile relation to measured CV curves for ferroelectric thin film capacitors is found to be analogous to the well-known result of metal-semiconductor Schottky junctions with an easily determined effective dielectric constant. Computer simulation shows the electrical doping concentration of ferroelectric thin film capacitors can be profiled accurately with the proposed model. The profiling shows compensation of the p-type PZT samples by the n-type niobium doping. Limitations of the Schottky profiling on ferroelectrics are investigated. Based on the approximate doping profiles extracted from CV measurement and the deduced permittivity, the measured CV characteristics are reconstructed through computer simulations. It is found that there is a minimum doping level below which it is not possible to obtain the doping profile from CV measurements. This minimum level depends on the shape of the CV curve, and a method to determine this minimum level from the CV curve is presented. For the films measured in this work, the minimum level is about 10¹⁸ cm⁻³. It is also found using the model that niobium doping slightly slows the volume growth of polarization with the electric field and has a tendency to increase the coercive field.

The success of the emerging ATM networks depends both on switch performance at the cell level and routing strategies at the call level. In this dissertation, we address both issues. At the cell level, we propose a measure that captures cell loss behavior and analyze ATM switch performance by computing the distribution of consecutive cell losses. The extremely low loss probability requirements of an ATM switch preclude the use of simulation, calling for the use of analytic and numerical methods. The latter methods involve the construction and solution of the underlying stochastic processes associated with the switch and workload. Since the detailed stochastic process representations of the above are on the order of tens to hundreds of thousands of states, we use a tool called UltraSAN, which allows for the automatic construction and solution of these detailed stochastic processes. We also compute the distribution of the queue length rather than just the average queue length. At the call level, we propose two restoration schemes and a method to analyze their performance in the case of failures in ATM transport networks. The proposed restoration strategies utilize the existing portions of the network after a link or switch failure rather than relying on redundancy while restoring the affected calls. We also propose an efficient routing scheme for multi-class traffic with widely differing call characteristics. We develop as approach based on Markov decision theory and propose an adaptive band-width protection strategy to prevent any specific application type from monopolizing the link resources.