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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
231

Systems-on-a-chip testing using an embedded microprocessor

Hwang, Sungbae 28 August 2008 (has links)
Not available / text
232

Slicing and characterizing typical-case behavior for component-based embedded systems

Russell, Jeffry Thomas 28 August 2008 (has links)
Not available / text
233

Optimal Real-Time Scheduling of Control Tasks with State Feedback Resource Allocation

Gaid, MEMB, Cela, AS, Hamam, Y 27 February 2009 (has links)
Abstract—This paper proposes a new approach for the optimal integrated control and real-time scheduling of control tasks. First, the problem of the optimal integrated control and nonpreemptive off-line scheduling of control tasks in the sense of the H2 performance criterion is addressed. It is shown that this problem may be decomposed into two sub-problems. The first sub-problem aims at finding the optimal non-preemptive off-line schedule, and may be solved using the branch and bound method. The second sub-problem uses the lifting technique to determine the optimal control gains, based on the solution of the first sub-problem. Second, an efficient on-line scheduling algorithm is proposed. This algorithm, called Reactive Pointer Placement (RPP) scheduling algorithm, uses the plant state information to dispatch the computational resources in a way that improves control performance. Control performance improvements as well as stability guarantees are formally proven. Finally, simulations as well as experimental results are presented in order to illustrate the effectiveness of the proposed approach.
234

Implementation of a Generic Gateway as a Multipurpose Communication Node

Moshiri, Hesam January 2014 (has links)
Steering and navigation systems play an essential role in governing today’s leisure boats. CPAC Systems AB, a subsidiary of Volvo AB, satisfies a large part of the global market needs for this kind of products. CPAC Systems, among others, manufactures a well-known “steer-by-wire” (SBW) control system, the “Electronic Vessel Control” (a.k.a. EVC). The need to connect the EVC to systems and devices designed by other companies resulted in the development of “gateway” devices, which have a primary role in preserving the integrity of the overall system architecture. Whenever the SBW communicates with external products, gateways are used as electric isolators and protocol translators, in order to protect the integrity of the SBW function. Today, a number of different gateway devices are required to match the different interfaces to which the CPAC’s EVC system has to be connected. This thesis aims to tackle the huge diversification of the requirements and evaluates the possibility of designing a “single” product that satisfies most of the requirements. In addition to that, the work aims to design a flexible device that could be easily updated to comply with the potential needs of the incoming applications. This isbeneficial in terms of both technology and cost-efficiency. Existing gateway products are designed to fulfill the assigned tasks or just to do a specific protocol conversion and apart from this significant difference with a generic gateway, they have some limitations concerning environmental conditions and prospective upgrades. Therefore designing, testing and implementation of one multifunctional gateway to be applicable as a multipurpose communication node to cover several functionalities, would be beneficial. Several challenges arose in designing the generic gateway device, such as: hardware design with a limited number of connection I/Os (solution is limited to 20 I/Os, whereas current gateway products require as many as 35 I/Os), robustness, final cost and power consumption. The contribution of the thesis was to analyse current gateway products, to design the hardware (Schematic and PCB), to implement the software, to debug the operation, to verify of the designed hardware to ensure the operation of each part. For gathering test results and investigation of communication or instruction signals, industrial equipment like digital oscilloscope and CAN analyser have been used to prove the operation of the device which are demonstrated in the “design tests” part. In addition, robustness of the gateway has been tested against several industrial test parameters, such as temperature variations, isolation, power supply robustness and typical power consumption. The results of these tests are iscussed in the “robustness tests” part. By fulfilling all of these steps and collaboration with the company team, satisfactory results have been achieved.
235

A HARDWARE ARCHITECTURE FOR GPS/INS-ENABLED WIRELESS SENSOR NETWORKS

Tang, Chun 13 January 2012 (has links)
Wireless sensor network technology has now been widely adopted. In many applications, distributed sensor nodes collect data at different locations and the location information of each node is required. The Global Positioning System is commonly used to identify the location of the nodes in such networks. Although GPS localization has consistent long-term accuracy, it is limited by the inherent dependency on a direct line of sight to 4 or more external satellites. The increasing demand for an embedded system providing reliable navigation solutions regardless of its operational environment has motivated investigations into the use of integrated systems that combine inertial sensors with GPS receivers. This research proposes a hardware architecture for location-based wireless sensor networks. In this architecture, each sensor node consists of a GPS receiver, a reduced set of low cost micro-electro-mechanical-system-based INS and a wireless transceiver. Sensor nodes in WSN are often equipped with irreplaceable batteries, which makes the power consumption crucial. To reduce the energy consumption, a microcontroller is used to control the power supply. Besides, a motion detection scheme is proposed by taking advantage of the ultra low-power wake-up function of the microcontroller. A low-power featured digital signal processor is used to accomplish the navigation computation using the Kalman filter for GPS/INS data fusion. Non-Holonomic Constraints derived velocity updates are applied to reduce the position errors. Field tests are conducted to verify the real-time performance of the proposed system with a positioning update rate of 20 Hz. The first test shows that the 2D INS/GPS integration can maintain the average system position error within 5 meters during a 60-second GPS outage. The second test used low cost inertial sensors. The average position error was 10.17 meters during a 20-second outage. The largest RMS value of position errors among these outages was within 14.5 meters. Furthermore, additional accuracy improvements of approximately 1.4 meters were achieved by utilizing NHC during GPS outages. The third test shows that the average error during a 30-second outage is approximately 20.6 meters for the on-foot scenario and 26.7 meters for the in-vehicle scenario. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2012-01-13 14:46:45.44
236

Design and implementation of a framework for semi-autonomous mobile robots

Sanders, David Marc 21 January 2011 (has links)
The design of a framework to control multiple semi-autonomous mobile robots is presented. The goals are to create a flexible framework that allows easy task reconfiguration for a fleet of mobile robots, and to provide a means of off-loading computationally intensive tasks to a central server. Four major components are specified: controllable devices, application servers, an application directory, and a mobile management system. Remote firmware upgrades via the mobile management system are achieved with the remotely managed operating system framework or RMOS. A prototype was created using field programmable gate arrays and system on a programmable chip technology from Altera. It was built with the application of selective herbicide spraying in mind. Although the prototype was a successful implementation of the designed framework, selective herbicide application was not implemented. A broad-leaf weed detection algorithm using Boltzmann machines was investigated. Its performance was good, but similar to that obtained by a statistical analysis of the input images of a lawn.
237

Formal Verification of Adaptive Real-Time Systems by Extending Task Automata

Hatvani, Leo January 2014 (has links)
Recently, we have seen an increase in the deployment of safety critical embedded systems in rapidly changing environments, as well as requirement for on-site customizations and rapid adaptation. To address the extended range of requirements, adaptation mechanism are added to the systems to handle large number of situations appropriately. Although necessary, adaptations can cause inconsistent and unstable configurations that must be prevented for the embedded system to remain dependable and safe. Therefore, verifying the behavior of adaptive embedded systems during the design phase of the production process is highly desirable. A hard real time embedded system and its environment can be modeled using timed automata. Such model can describe the system at various levels of abstraction. In this thesis, we model the adaptive responses of a system in terms of tasks that are executed to handle changes in the environmental or internal parameters. Schedulability, a property that all tasks complete execution within their respective deadlines, is a key element in designing hard real-time embedded systems. A system that is unschedulable immediately compromises safety and hard real-time requirements and can cause fatal failure. Given specifications of all tasks in the system, we can model the system, an abstraction of the environment, and adaptive strategies to investigate whether the system retains safety properties, including schedulability, regardless of the changes in the environment and adaptations to those changes.
238

Time-triggered Runtime Verification of Real-time Embedded Systems

Navabpour, Samaneh January 2014 (has links)
In safety-critical real-time embedded systems, correctness is of primary concern, as even small transient errors may lead to catastrophic consequences. Due to the limitations of well-established methods such as verification and testing, recently runtime verification has emerged as a complementary approach, where a monitor inspects the system to evaluate the specifications at run time. The goal of runtime verification is to monitor the behavior of a system to check its conformance to a set of desirable logical properties. The literature of runtime verification mostly focuses on event-triggered solutions, where a monitor is invoked when a significant event occurs (e.g., change in the value of some variable used by the properties). At invocation, the monitor evaluates the set of properties of the system that are affected by the occurrence of the event. This type of monitor invocation has two main runtime characteristics: (1) jittery runtime overhead, and (2) unpredictable monitor invocations. These characteristics result in transient overload situations and over-provisioning of resources in real-time embedded systems and hence, may result in catastrophic outcomes in safety-critical systems. To circumvent the aforementioned defects in runtime verification, this dissertation introduces a novel time-triggered monitoring approach, where the monitor takes samples from the system with a constant frequency, in order to analyze the system's health. We describe the formal semantics of time-triggered monitoring and discuss how to optimize the sampling period using minimum auxiliary memory and path prediction techniques. Experiments on real-time embedded systems show that our approach introduces bounded overhead, predictable monitoring, less over-provisioning, and effectively reduces the involvement of the monitor at run time by using negligible auxiliary memory. We further advance our time-triggered monitor to component-based multi-core embedded systems by establishing an optimization technique that provides the invocation frequency of the monitors and the mapping of components to cores to minimize monitoring overhead. Lastly, we present RiTHM, a fully automated and open source tool which provides time-triggered runtime verification specifically for real-time embedded systems developed in C.
239

Design and implementation of a framework for semi-autonomous mobile robots

Sanders, David Marc 21 January 2011 (has links)
The design of a framework to control multiple semi-autonomous mobile robots is presented. The goals are to create a flexible framework that allows easy task reconfiguration for a fleet of mobile robots, and to provide a means of off-loading computationally intensive tasks to a central server. Four major components are specified: controllable devices, application servers, an application directory, and a mobile management system. Remote firmware upgrades via the mobile management system are achieved with the remotely managed operating system framework or RMOS. A prototype was created using field programmable gate arrays and system on a programmable chip technology from Altera. It was built with the application of selective herbicide spraying in mind. Although the prototype was a successful implementation of the designed framework, selective herbicide application was not implemented. A broad-leaf weed detection algorithm using Boltzmann machines was investigated. Its performance was good, but similar to that obtained by a statistical analysis of the input images of a lawn.
240

Intelligent presentation and tailoring of online legal information

Royles, Christopher Andrew January 2000 (has links)
No description available.

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