International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / To achieve good efficiency in a space-based radio transmitter, its final amplifier must be operated near the saturation point, in its nonlinear region. Because of strict band limitations, this nonlinear operation is combined with the problem of intersymbol interference. Normally, these problems are addressed using a combination of equalization and power back-off, resulting in reduced power efficiency. Many proposed receiver-based methods, such as Volterra equalization, attempt to compensate for the nonlinearity and ISI in a single block before the detector, allowing higher efficiency operation, but introducing a great deal of complexity. We propose a receiver-based method in which the two effects are dealt with in separate blocks, an equalizer and a linearizer, resulting in considerable simplification. We go further and place the detector before the linearizer, achieving improved performance by eliminating the errors introduced by the linearizer. Simulation results compare favorably with the performance of a linear AWGN channel.

Single Carrier Frequency Domain Equalization (SC-FDE) utilize Time Division multiple Access with Zero-padding under ultra-wideband¡Ait can improve Inter-Block Interference(IBI) and Multi-Access Interference(MAI) to get good performance¡AThis system even can eliminate multi-access interference. Concept of TDMA can avoid the same time to transmit different user¡¦s data with zero-padding algorithm. This method can efficiency to solve multi-access interference. In this thesis, we will utilize property of two dimension to solve multi-access interference between each others. Zero-padding have good capability the same to Cyclic prefix and can save transmitter power. In this thesis, we will not use CDMA of method because it do not need to much analysis of mathematics, moreover, we can provide low cost and low complexity for system to get low error rate. Finally we to be aimed at improve IBI and MAI to simulation under ultra-wideband, then simulation will show thesis of method is high performance than traditional of method.

Intersymbol interference(ISI) is an important factor which affects the performance of communication systems. To achieve highspeed digital transmission and reliable communication, an equalizer can effectively eliminate ISI caused by band-limited channel or multipath. In this paper, we introduce an adaptive H¡Û equalizing algorithm. Different form conventional recursive least square filtering algorithm, the adaptive H¡Û filtering algorithm is a worst case optimization. It can minimize the effect of the worst disturbances (including input noise and modeling error) on the equalization error. It has been proven that the adaptive H¡Û filtering algorithm has the advantage of reduction of sensitivity to modeling error and suitability for arbitrary ambient noise over RLS algorithm. However, the computational burden of the H¡Û algorithm is enormous. To reduce the computational complexity, the subweight partition technique is employed to the H¡Û algorithm. Computer simulation also shows that the H¡Û algorithm can reduce the dynamic estimation error resulting from subweight partition. Finally, in order to overcome multiple access interference, interchip interference, time-varying effects from the channel and computational complexity, the H¡Û algorithm with subweight partition (termed H¡Û-based) is then further extended to the multiuser detection in code division multiple access (CDMA) system. Simulation results are presented to demonstrate the advantage of the H¡Û-based equalizing algorithm.

The advancement in the CATV industry has been remarkable. In the beginning, CATV provided a few television channels. Now it provides a variety of advanced services such as video on demand (VOD), Internet access, Pay-Per-View on demand and interactive TV. These advances have increased the popularity of CATV manyfold. Current improvements focus on interactive services with high quality. These interactive services require more upstream (transmission from customer premises to cable operator premises) channel bandwidth. The flow of data through the CATV network in both the upstream and downstream directions is governed by a standard referred to as the Data Over Cable Service Interface Specification (DOCSIS) standard. The latest version is DOCSIS 3.1, which was released in January 2014. The previous version, DOCSIS 3.0, was released in 2006. One component of the upstream communication link is the QAM demodulator. An important component in the QAM demodulator is the equalizer, whose purpose is to remove distortion caused by the imperfect upstream channel as well as the residual timing offset and frequency offset. Most of the timing and frequency offset are corrected by timing and frequency recovery circuits; what remains is referred to as offset. A DOCSIS receiver, and hence the equalizer within, can be implemented with ASIC or FPGA technology. Implementing an equalizer in an ASIC has a large nonrecurring engineering cost, but relatively small per chip production cost. Implementing equalizer in an FPGA has very low non-recurring cost, but a relatively high per chip cost. If the choice technology was based on cost, one would think it would depends only on the volume, but in practice that is not the case. The dominant factor when it comes to profit, is the time-to-market, which makes FPGA technology the only choice. The goal of this thesis is to design a cost optimized equalizer for DOCSIS upstream demodulator and implement in an FPGA. With this in mind, an important objective is to establish a relationship between the equalizer’s critical parameters and its performance. The parameter-performance relationship that has been established in this study revealed that equalizer step size and length parameters should be 1/64 and approximately 20 to yield a near optimum equalizer when considering the MER-convergence time trade-off. In the pursuit of the objective another relationship was established that is useful in determining the accuracy of the timing recovery circuit. That relationship establishes the sensitivity both of the MER and convergence time to timing offset. The equalizer algorithm was implemented in a cost effective manner using DSP Builder. The effort to minimize cost was focused on minimizing the number of multipliers. It is shown that the equalizer can be constructed with 8 multipliers when the proposed time sharing algorithm is implemented.

Link adaptation is important to guarantee robust and reliable wireless communications with- out wasting valuable radio resources. This technique has become more feasible with the recent appearance of Software Defined Radios (SDRs), which allow easy reconfiguration of their parameters via software. As the environment changes over time, the transmitter needs to be able to effectively estimate its performance under different radio input parameters to be able to find a close to optimal solution. In most wireless communications, an equalizer is implemented at the receiver to estimate the channel impulse response. This estimate can be fed back to the transmitter via a feedback channel, which can in turn help generate a sub-optimal transmission solution for the current situation. In this thesis, a link adaptation method is proposed that uses Orthogonal Frequency-Division Multiplexing (OFDM) in conjunction with blind channel estimation. With the use of OFDM, it can be assumed that the frequency fading at each subcarrier is approximately flat. In addition, under the assumption that the channel is quasi-stationary, the Bit Error Rate (BER) at each subcarrier can be estimated by using the well-known BER formulas for an Additive White Gaussian Noise (AWGN) channel. However, the effect of imperfect channel estimation must also be taken into account. A novel OFDM blind channel estimator is developed. Finally, both simulations and real over-the-air results are presented. / Master of Science

This thesis examines the challenges in creating a fully integrated optical receiver. Due to the nature of silicon, 850nm light exhibits a poor impulse response when directed at an on-die photodiode. Using a modified decision feedback equalizer with an infinite impulse response filter in the feedback path allows to eliminate the long tail of post-cursor ISI that is generated by the photodiode. Due to silicide depositions over the photodiodes, making them opaque, the receiver was tested using an electrical cable with similar frequency roll-off as that of a photodiode. A data rate of 3.7 Gbps was achieved and only limited by the amount of input reflections at the transimpedance amplifier. The receiver occupies an area of 0.23 mm^2 and consumes 51.3mW.

This thesis examines the challenges in creating a fully integrated optical receiver. Due to the nature of silicon, 850nm light exhibits a poor impulse response when directed at an on-die photodiode. Using a modified decision feedback equalizer with an infinite impulse response filter in the feedback path allows to eliminate the long tail of post-cursor ISI that is generated by the photodiode. Due to silicide depositions over the photodiodes, making them opaque, the receiver was tested using an electrical cable with similar frequency roll-off as that of a photodiode. A data rate of 3.7 Gbps was achieved and only limited by the amount of input reflections at the transimpedance amplifier. The receiver occupies an area of 0.23 mm^2 and consumes 51.3mW.

Novel Turbo Equalization Methods for the Magnetic Recording Channel Elizabeth Chesnutt 95 Pages Directed by Dr. John R. Barry The topic of this dissertation is the derivation, development, and evaluation of novel turbo equalization techniques that address the colored noise problem on the magnetic recording channel. One new algorithm presented is the noise-predictive BCJR, which is a soft-output detection strategy that mitigates colored noise in partial-response equalized magnetic recording channels. This algorithm can be viewed as a combination of the traditional BCJR algorithm with the notion of survivors and noise prediction. Additionally, an alternative equalization architecture for magnetic recording is presented that addresses the shortcomings of the PRML approach, which dominates magnetic recording. Specifically, trellis-based equalizers are abandoned in favor of simple equalization strategies based on nonlinear filters whose complexity grows only linearly with their length. This research focuses on the linear-complexity SFE algorithm and on investigating the possibility of lowering the SFE filter calculation complexity. The results indicate that with using the proposed novel SFE method, it is possible to increase the information density on magnetic media without raising the complexity. The most important result presented is that partial-response equalization needs to be reconsidered because of the amount of noise enhancement problems that it adds to the overall system. These results are important for the magnetic recording industry, which is trying to attain a 1 Tb/cm2 information storage goal.

In this dissertation, the combined optical link, where the baseband digital signal and wireless signal are transmitted simultaneously over a multi-mode fiber (MMF) using an VCSEL and received through a photoreceiver and a feed forward equalizer (FFE). For this hybrid optical link, a new type of combiner is developed using the multi-layer organic (MLO) process. For the overall link simulation, a rate-equation-based VCSEL model is developed with circuit components. This model describes the high-speed modulation characteristic as well as the thermal effect on the L-I (light vs. bias current) characteristic. Additionally, The FFE is developed to further extend a MMF distance by compensating differential modal delay (DMD) in MMF. Two different implementation approaches are taken for the FFE by passive LC ladder based delay line and active inductance peaking delay line structure. To overcome the voltage headroom limitation of the conventional Gilbert cell architecture, modified Gilbert cell is presented and implemented as a multiplier cell for both FFEs. The FFEs are fully integrated on a single chip and fabricated by a standard 0.18 ?m CMOS process. The developed FFE successfully rebuild the distorted signal form the MMF at 10 Gbps data rate.

Recently, there is growing interest in high speed circuits for broadband communication, especially in wired networks. As the data rate increases beyond 1 GB/s conventional materials used as communication channels such as PCB traces, coaxial cables, and unshielded twisted pair (UTP) cables, etc. attenuate and distort the transmitted signal causing bit errors in the receiver end. Bit errors make the communication less reliable and in many cases even impossible. The goal of this work was to analyze, and design an channel equalizer capable of restoring the received signal back to the original transmitted signal. The equalizer was designed in a standard CMOS 0.18 µm process and it is capable of compensating up to 20 dB’s of attenuation at 1.5625 GHz for 15 and 20 meters of RG-58 A/U coaxial cables. The equalizer is able to remove 0.5 UI ( 160 ps ) of peak-to-peak jitter and output a signal with 0.1 UI ( 32 ps ) for 15 meters of cable at 3.125 Gb/s. The equalizer draws 18 mA from a 1.8 V power supply which is lower than publications [1, 2] for CMOS transversal equalizers.