<p>In this master thesis, the possibilities of customizing a low-cost microprocessor with the purpose of replacing an existing microprocessor solution are investigated. A brief survey of suitable processors is carried out wherein a replacement is chosen. The replacement processor is then analyzed and extended with accelerators in order to match set requirements.</p><p>The result is a port of the processor Lattice Mico32 for the FPGA curcuit Xilinx Virtex-5 which replaces an earlier solution using Xilinx MicroBlaze. To reach the set requirements, accelerators for floating point arithmetics and FIR filtering have been developed. The toolchain for the processor has been modified to support the addition of accelerated floating point arithmetics.</p><p>A final evaluation of the presented solution shows that it fulfills the set requirements and constitutes a functional replacement for the previous solution.</p>

In this master thesis, the possibilities of customizing a low-cost microprocessor with the purpose of replacing an existing microprocessor solution are investigated. A brief survey of suitable processors is carried out wherein a replacement is chosen. The replacement processor is then analyzed and extended with accelerators in order to match set requirements. The result is a port of the processor Lattice Mico32 for the FPGA curcuit Xilinx Virtex-5 which replaces an earlier solution using Xilinx MicroBlaze. To reach the set requirements, accelerators for floating point arithmetics and FIR filtering have been developed. The toolchain for the processor has been modified to support the addition of accelerated floating point arithmetics. A final evaluation of the presented solution shows that it fulfills the set requirements and constitutes a functional replacement for the previous solution.

This semestral thesis is concerned on facilities of using DebugMonitor exception for debugging software which run on ARM Cortex-M4. The comunnication between debugged software and debugging master is implemented via CAN bus. The result is support for debugging without special debugging equipment. For support of this type of debug this thesis implemented code library called SDebug. It's managing parts of Cortex-M4 core, which are userd for debug.

<p>Debugging applications that are running in embedded systems is becoming harder and harder due to the growing complexity of the systems. This is especially true for embedded systems that are developed for the automotive market.</p><p>To aid the debugging there are tools called debuggers. Historically, debuggers have been implemented by using a debug port to connect a software debugger running at the developer machine to dedicated on-chip debugging hardware. The problem with this approach is that it is expensive and that it is not possible to use it if the debug port on the system is not available.Therefore there is a demand for user-friendly debuggers that are not as expensive and require no extra hardware.</p><p>This report presents alternatives to debugging embedded systems. From these alternatives a completely software based debugger solution called monitor-based debugging is selected and acts as a foundation for an implementation that is described in the report. The implementation uses GNU Debugger (GDB) and its remote debugging capabilities to perform debugging.</p><p>The implemented debugger is evaluated by using it to debug applications that are running in a powertrain control unit in a modern truck. It is also compared to two commercial hardware based debuggers. In the evaluation it is found that the debugger functionalities and user-friendliness are on par with the commercial alternatives, but that it lacks some in its non-intrusive capabilities when comparing it with the high-end alternatives on the market.</p>

Debugging applications that are running in embedded systems is becoming harder and harder due to the growing complexity of the systems. This is especially true for embedded systems that are developed for the automotive market. To aid the debugging there are tools called debuggers. Historically, debuggers have been implemented by using a debug port to connect a software debugger running at the developer machine to dedicated on-chip debugging hardware. The problem with this approach is that it is expensive and that it is not possible to use it if the debug port on the system is not available.Therefore there is a demand for user-friendly debuggers that are not as expensive and require no extra hardware. This report presents alternatives to debugging embedded systems. From these alternatives a completely software based debugger solution called monitor-based debugging is selected and acts as a foundation for an implementation that is described in the report. The implementation uses GNU Debugger (GDB) and its remote debugging capabilities to perform debugging. The implemented debugger is evaluated by using it to debug applications that are running in a powertrain control unit in a modern truck. It is also compared to two commercial hardware based debuggers. In the evaluation it is found that the debugger functionalities and user-friendliness are on par with the commercial alternatives, but that it lacks some in its non-intrusive capabilities when comparing it with the high-end alternatives on the market.

In recent years, developers have wanted to design more complex and advanced embedded processors. The feasibility of developed processors must be verified before the actual application. However, the process of verification always needs high costs and time. Quick Emulator (QEMU), a virtual platform emulator, can help in this situation. It can emulate different processors and hardware environments and build a unique platform according to the designers wishes. Many people have used QEMU to emulate advanced Reduced Instruction Set Computing (RISC) processors (like ARM) or the X86 architectures. Still, there is little research on RISC-V processors. Therefore, studying the QEMU to emulate the RISC-V processor is important. This thesis aims to evaluate the performance of the RISC-V processor using QEMU. Ten different benchmarks are designed, and their results are compared to reflect the performance of the RISC-V as well as the simulator. These results provide a reference when these benchmarks are run on the RISC-V processor that is on the actual hardware development board. / De senaste åren har utvecklarna alltid velat utveckla mer komplexa och avancerade funktioner på inbyggda utvecklingskort. Men de nya funktionerna måste verifieras innan man gör kretskortet. Å andra sidan så kostar verifieringsprocessen mycket tid och pengar. Quick Emulator (QEMU), en virtuell plattformsemulator, kan hjälpa till för att lösa detta problem. Den kan emulera olika processorer och hårdvarumiljöer och bygga en unik plattform allt enligt designernas önskemål. Många människor har använt QEMU för att emulera avancerade Reduced Instruction Set Computing (RISC)-processorer (som ARM), eller X86-arkitekturerna, men det finns mycket lite forskning om RISC-V processorer. Därför är det viktigt att studera QEMU för att emulera RISC-V-processorn. Denna avhandling syftar till att utvärdera prestandan för RISC-V processorer genom att använder QEMU. Tio olika benchmarks konstrueras för att användas för att spegla prestandan hos processorn såväl som simulatorn. Dessa resultat kan sedan användas som referens när benchmarken körs på de RISC-V-processorer som finns på det aktuella hårdvaruutvecklingskortet.

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Projetos de SIG (Sistemas de Informação Geográfica), em geral, ainda não apresentam modelo conceitual de banco de dados geográficos. Os implementadores de SIG se preocupam com a aquisição dos dados (captura e adaptação), que é a etapa mais cara, e dão, ainda, pouca atenção à modelagem. A utilização de modelos conceituais faz com que os usuários controlem melhor sua base de dados e tirem maior proveito do SIG. O objetivo deste trabalho é definir um conjunto de procedimentos de engenharia reversa de bancos de dados espaciais que auxiliem na criação e manutenção de modelos conceituais para aplicações de SIG a partir de dados já existentes. Estes procedimentos podem contribuir para um aumento na qualidade dos SIG implementados, auxiliando na popularização da prática de modelagem conceitual de banco de dados geográficos. São estudados três formatos de transferência utilizados por usuários de SIG. A partir daí, é proposto uma arquitetura de sistema de engenharia reversa para SIG. / Even with the increasing use of Geographic Information Systems (GIS), conceptual modeling of geographic databases (GDB) is not yet usual among GIS professionals. This fact can in part be explained by the professional profile of most GIS designers. They usually are more familiar with specific GIS applications than with database technology. Among them, one can find cartographers, geographers, agricultural engineers, and architects. Besides that, the cost of geographic data acquisition is so high that much important is given to acquisition plans during GIS design and less interest is given to the database design process. Especially first time designers do not perceive the importance of a database schema that is independent of a specific GIS product. Conceptual design preserves the independence between data types and the logical schema of the product. Moreover, relying on the GDB conceptual schema users can better understand what part of the geographic reality is represented in the database. The main goal of this research work is to define a set of reverse engineering procedures for spatial databases that can support either creation or evolution if conceptual GDB schemas. It is expected that these procedures can enhance the quality of GDB design as well as contribute to the popularization of GDB conceptual modeling. Three different geographic data input formats to GIS are investigated and a reverse engineering system architecture for them is proposed. Resulting conceptual (sub)schemas are based on the framework GeoFrame.

Projetos de SIG (Sistemas de Informação Geográfica), em geral, ainda não apresentam modelo conceitual de banco de dados geográficos. Os implementadores de SIG se preocupam com a aquisição dos dados (captura e adaptação), que é a etapa mais cara, e dão, ainda, pouca atenção à modelagem. A utilização de modelos conceituais faz com que os usuários controlem melhor sua base de dados e tirem maior proveito do SIG. O objetivo deste trabalho é definir um conjunto de procedimentos de engenharia reversa de bancos de dados espaciais que auxiliem na criação e manutenção de modelos conceituais para aplicações de SIG a partir de dados já existentes. Estes procedimentos podem contribuir para um aumento na qualidade dos SIG implementados, auxiliando na popularização da prática de modelagem conceitual de banco de dados geográficos. São estudados três formatos de transferência utilizados por usuários de SIG. A partir daí, é proposto uma arquitetura de sistema de engenharia reversa para SIG. / Even with the increasing use of Geographic Information Systems (GIS), conceptual modeling of geographic databases (GDB) is not yet usual among GIS professionals. This fact can in part be explained by the professional profile of most GIS designers. They usually are more familiar with specific GIS applications than with database technology. Among them, one can find cartographers, geographers, agricultural engineers, and architects. Besides that, the cost of geographic data acquisition is so high that much important is given to acquisition plans during GIS design and less interest is given to the database design process. Especially first time designers do not perceive the importance of a database schema that is independent of a specific GIS product. Conceptual design preserves the independence between data types and the logical schema of the product. Moreover, relying on the GDB conceptual schema users can better understand what part of the geographic reality is represented in the database. The main goal of this research work is to define a set of reverse engineering procedures for spatial databases that can support either creation or evolution if conceptual GDB schemas. It is expected that these procedures can enhance the quality of GDB design as well as contribute to the popularization of GDB conceptual modeling. Three different geographic data input formats to GIS are investigated and a reverse engineering system architecture for them is proposed. Resulting conceptual (sub)schemas are based on the framework GeoFrame.

Projetos de SIG (Sistemas de Informação Geográfica), em geral, ainda não apresentam modelo conceitual de banco de dados geográficos. Os implementadores de SIG se preocupam com a aquisição dos dados (captura e adaptação), que é a etapa mais cara, e dão, ainda, pouca atenção à modelagem. A utilização de modelos conceituais faz com que os usuários controlem melhor sua base de dados e tirem maior proveito do SIG. O objetivo deste trabalho é definir um conjunto de procedimentos de engenharia reversa de bancos de dados espaciais que auxiliem na criação e manutenção de modelos conceituais para aplicações de SIG a partir de dados já existentes. Estes procedimentos podem contribuir para um aumento na qualidade dos SIG implementados, auxiliando na popularização da prática de modelagem conceitual de banco de dados geográficos. São estudados três formatos de transferência utilizados por usuários de SIG. A partir daí, é proposto uma arquitetura de sistema de engenharia reversa para SIG. / Even with the increasing use of Geographic Information Systems (GIS), conceptual modeling of geographic databases (GDB) is not yet usual among GIS professionals. This fact can in part be explained by the professional profile of most GIS designers. They usually are more familiar with specific GIS applications than with database technology. Among them, one can find cartographers, geographers, agricultural engineers, and architects. Besides that, the cost of geographic data acquisition is so high that much important is given to acquisition plans during GIS design and less interest is given to the database design process. Especially first time designers do not perceive the importance of a database schema that is independent of a specific GIS product. Conceptual design preserves the independence between data types and the logical schema of the product. Moreover, relying on the GDB conceptual schema users can better understand what part of the geographic reality is represented in the database. The main goal of this research work is to define a set of reverse engineering procedures for spatial databases that can support either creation or evolution if conceptual GDB schemas. It is expected that these procedures can enhance the quality of GDB design as well as contribute to the popularization of GDB conceptual modeling. Three different geographic data input formats to GIS are investigated and a reverse engineering system architecture for them is proposed. Resulting conceptual (sub)schemas are based on the framework GeoFrame.