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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Estudo e desenvolvimento de blocos para processamento hardwired em aparelhos de auxílio auditivo com DSP / Study and development of blocks for hardwired processing in hearing aid devices with DSP

Carvalho, Dionísio de 22 November 2013 (has links)
A vida de milhões de pessoas é afetada por problemas de deficiência auditiva, incapacitando-as de ouvirem os sons naturalmente. O uso de aparelhos de auxílio auditivo minimiza o efeito das deficiências, pois possibilita tratamento dos sinais auditivos através de sofisticados algoritmos que eliminam ruídos e amplificam os sinais de interesse. Este trabalho propõem a especificação de um sistema integrado, otimizado em termos de consumo de potência, para realizar o processamento de sinais digitais em aparelhos de auxílio auditivo digital. Foram desenvolvidos dois blocos para processamento hardwired, que substituem o processamento realizado por software, cuja finalidade é filtrar os sinais sonoros digitalizados com menor consumo. Um dos blocos, um filtro FIR de até 128 coeficientes, pode ser utilizado como filtro do tipo passa baixa ou passa altas frequências. O outro bloco, para executar o algoritmo ALE, é utilizado para eliminar ruídos periódicos. Os blocos desenvolvidos e implementados foram compilados e simulados para comprovar a funcionalidade. Os resultados das simulações mostraram que eles atendem as especificações de funcionalidade. Os blocos foram também sintetizados em uma tecnologia CMOS de 0,35 &#956m, três níveis de metal, para assim se ter as estimativas de área do circuito e de consumo de potência. A área do layout final foi de 14 mm². O consumo de potência estimado é de 0,30 mW para frequência de clock de 300 kHz (o que permite que um filtro FIR processe uma amostra a cada 240 &#956s, no pior caso, e o ALE, uma a cada 36 &#956s), e de 5,06 mW para frequência de clock de 5,0 MHz (filtro FIR processa uma amostra a cada 14,4 &#956s e o ALE, uma a cada 2,2 &#956s). As estimativas de consumo foram feitas considerando os dois blocos operando simultaneamente e com tensão de alimentação de 1,8 V. Para todo o sistema integrado proposto, obtive-se, com um cenário específico, o consumo de potência de 1,1 mW, considerando dois Filtros Configuráveis, um Filtro ALE e um DSP. / The live of millions of people are affected by hearing problems, disabling them from hearing the sounds naturally. The use of hearing aids devices minimizes the effect of deficiencies, since it allows processing of auditory signals through sophisticated algorithms that eliminate noise and amplify the signals of interest. This work proposes the specification of an integrated system, optimized in terms of power consumption, to perform digital signal processing in digital hearing aid devices. Were developed two blocks of hardwired processing, replacing software processing, whose purposes are to filter the digitized audio signals with lower consumption. One of the blocks, an FIR filter up to 128 coefficients can be used as a low pass or high pass filter. The other block, to run the ALE algorithm, is used to eliminate periodic noises. The blocks developed and implemented were compiled and simulated to demonstrate their functionality. The simulation results show that they meet the specifications of functionality. The blocks were also synthesized in a 0.35 &#956m CMOS technolog, three metal levels, in order to have estimatives of circuit area and power consumption. The area of the final layout was 14,0 mm². The estimated power consumption is 0.30 mW for clock frequency of 300 kHz (which allows a FIR filter to process one sample every 240 &#956s in the worst case, and ALE, one every 36 &#956s), and 5.06 mW for clock frequency of 5.0 MHz (FIR filter processing one sample every 14.4 &#956s, and ALE, one every 2.2 &#956s). Consumption estimates were made considering the two blocks operating simultaneously and supply voltage of 1.8 V. For all the proposed integrated system, it was found, for a specific scenario, the power consumption of 1.1 mW, considering two configurable filters, one filter ALE and one DSP.
2

Estudo e desenvolvimento de blocos para processamento hardwired em aparelhos de auxílio auditivo com DSP / Study and development of blocks for hardwired processing in hearing aid devices with DSP

Dionísio de Carvalho 22 November 2013 (has links)
A vida de milhões de pessoas é afetada por problemas de deficiência auditiva, incapacitando-as de ouvirem os sons naturalmente. O uso de aparelhos de auxílio auditivo minimiza o efeito das deficiências, pois possibilita tratamento dos sinais auditivos através de sofisticados algoritmos que eliminam ruídos e amplificam os sinais de interesse. Este trabalho propõem a especificação de um sistema integrado, otimizado em termos de consumo de potência, para realizar o processamento de sinais digitais em aparelhos de auxílio auditivo digital. Foram desenvolvidos dois blocos para processamento hardwired, que substituem o processamento realizado por software, cuja finalidade é filtrar os sinais sonoros digitalizados com menor consumo. Um dos blocos, um filtro FIR de até 128 coeficientes, pode ser utilizado como filtro do tipo passa baixa ou passa altas frequências. O outro bloco, para executar o algoritmo ALE, é utilizado para eliminar ruídos periódicos. Os blocos desenvolvidos e implementados foram compilados e simulados para comprovar a funcionalidade. Os resultados das simulações mostraram que eles atendem as especificações de funcionalidade. Os blocos foram também sintetizados em uma tecnologia CMOS de 0,35 &#956m, três níveis de metal, para assim se ter as estimativas de área do circuito e de consumo de potência. A área do layout final foi de 14 mm². O consumo de potência estimado é de 0,30 mW para frequência de clock de 300 kHz (o que permite que um filtro FIR processe uma amostra a cada 240 &#956s, no pior caso, e o ALE, uma a cada 36 &#956s), e de 5,06 mW para frequência de clock de 5,0 MHz (filtro FIR processa uma amostra a cada 14,4 &#956s e o ALE, uma a cada 2,2 &#956s). As estimativas de consumo foram feitas considerando os dois blocos operando simultaneamente e com tensão de alimentação de 1,8 V. Para todo o sistema integrado proposto, obtive-se, com um cenário específico, o consumo de potência de 1,1 mW, considerando dois Filtros Configuráveis, um Filtro ALE e um DSP. / The live of millions of people are affected by hearing problems, disabling them from hearing the sounds naturally. The use of hearing aids devices minimizes the effect of deficiencies, since it allows processing of auditory signals through sophisticated algorithms that eliminate noise and amplify the signals of interest. This work proposes the specification of an integrated system, optimized in terms of power consumption, to perform digital signal processing in digital hearing aid devices. Were developed two blocks of hardwired processing, replacing software processing, whose purposes are to filter the digitized audio signals with lower consumption. One of the blocks, an FIR filter up to 128 coefficients can be used as a low pass or high pass filter. The other block, to run the ALE algorithm, is used to eliminate periodic noises. The blocks developed and implemented were compiled and simulated to demonstrate their functionality. The simulation results show that they meet the specifications of functionality. The blocks were also synthesized in a 0.35 &#956m CMOS technolog, three metal levels, in order to have estimatives of circuit area and power consumption. The area of the final layout was 14,0 mm². The estimated power consumption is 0.30 mW for clock frequency of 300 kHz (which allows a FIR filter to process one sample every 240 &#956s in the worst case, and ALE, one every 36 &#956s), and 5.06 mW for clock frequency of 5.0 MHz (FIR filter processing one sample every 14.4 &#956s, and ALE, one every 2.2 &#956s). Consumption estimates were made considering the two blocks operating simultaneously and supply voltage of 1.8 V. For all the proposed integrated system, it was found, for a specific scenario, the power consumption of 1.1 mW, considering two configurable filters, one filter ALE and one DSP.
3

“Inside Story”

Crawford, Jim D. 05 1900 (has links)
Inside Story explores the essence of story and attempts to connect the audience to the significance of story in their own lives. The documentary examines story and determines the elements necessary for its formation. The film investigates the psychological aspects of story, inspects the physiological processing of story that connects story to the way we think and perceive, and finally, emphasizes the functions and values of story.
4

A Methodology for Transitioning Maritime Hardwired Communication to Controller Area Network

Lavén, Astrid January 2024 (has links)
A ship’s communication system serves as a vital infrastructure to host real-time applications,facilitating the transmission of crucial data, including sensor readings and control commands. Theexpansive dimensions of a ship necessitate a complex network of cables in an analogue hardwiredsetup, stretching from the bridge to the machinery. However, this reliance on multiple cables introduces logistical challenges and vulnerabilities within the system architecture. This thesis establishesa systematic approach for transitioning ship control systems from traditional analogue hardwiredconfigurations to more efficient Controller Area Network (CAN) bus-based systems. CAN is amulti-master communication protocol that enables multiple controllers to communicate with eachother without a host computer, making it particularly suitable for complex environments. While alternative networking options such as Ethernet or wireless networks are available, CAN emerges as acost-effective and robust communication solution suited for maritime environments. The transitionto CAN-based systems not only prolongs the ship’s operational lifespan but can also enhance fuelefficiency and reduce environmental impact. Ensuring a seamless transition requires careful consideration of safety and functionality equivalent to legacy systems. Extensive research into suitablecommunication buses, CAN protocols, and scheduling algorithms is essential. By exploring Controller Area Network with Flexible Data-Rate (CAN FD) as a complement to CAN 2.0, the tool offersmultiple solutions, with the optimal choice contingent upon various parameters. A comprehensive tool has been developed to facilitate the safe migration from hardwired systems to CAN-basedsolutions. This tool enables the mapping of signals to messages, priority assignment using various algorithms, including Audsley’s optimal priority assignment algorithm, and real-time analysis.This work will assist in the transition by presenting diverse solutions, clearly outlining deadlines,identifying potential misses, and recommending the most effective combination of methods.

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