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Static Code Analysis: A Systematic Literature Review and an Industrial SurveyIlyas, Bilal, Elkhalifa, Islam January 2016 (has links)
Context: Static code analysis is a software verification technique that refers to the process of examining code without executing it in order to capture defects in the code early, avoiding later costly fixations. The lack of realistic empirical evaluations in software engineering has been identified as a major issue limiting the ability of research to impact industry and in turn preventing feedback from industry that can improve, guide and orient research. Studies emphasized rigor and relevance as important criteria to assess the quality and realism of research. The rigor defines how adequately a study has been carried out and reported, while relevance defines the potential impact of the study on industry. Despite the importance of static code analysis techniques and its existence for more than three decades, the number of empirical evaluations in this field are less in number and do not take into account the rigor and relevance into consideration. Objectives: The aim of this study is to contribute toward bridging the gap between static code analysis research and industry by improving the ability of research to impact industry and vice versa. This study has two main objectives. First, developing guidelines for researchers, which will explore the existing research work in static code analysis research to identify the current status, shortcomings, rigor and industrial relevance of the research, reported benefits/limitations of different static code analysis techniques, and finally, give recommendations to researchers to help improve the future research to make it more industrial oriented. Second, developing guidelines for practitioners, which will investigate the adoption of different static code analysis techniques in industry and identify benefits/limitations of these techniques as perceived by industrial professionals. Then cross-analyze the findings of the SLR and the surbvey to draw final conclusions, and finally, give recommendations to professionals to help them decide which techniques to adopt. Methods: A sequential exploratory strategy characterized by the collection and analysis of qualitative data (systematic literature review) followed by the collection and analysis of quantitative data (survey), has been used to conduct this research. In order to achieve the first objective, a thorough systematic literature review has been conducted using Kitchenham guidelines. To achieve the second study objective, a questionnaire-based online survey was conducted, targeting professionals from software industry in order to collect their responses regarding the usage of different static code analysis techniques, as well as their benefits and limitations. The quantitative data obtained was subjected to statistical analysis for the further interpretation of the data and draw results based on it. Results: In static code analysis research, inspection and static analysis tools received significantly more attention than the other techniques. The benefits and limitations of static code analysis techniques were extracted and seven recurrent variables were used to report them. The existing research work in static code analysis field significantly lacks rigor and relevance and the reason behind it has been identified. Somre recommendations are developed outlining how to improve static code analysis research and make it more industrial oriented. From the industrial point of view, static analysis tools are widely used followed by informal reviews, while inspections and walkthroughs are rarely used. The benefits and limitations of different static code analysis techniques, as perceived by industrial professionals, have been identified along with the influential factors. Conclusions: The SLR concluded that the techniques having a formal, well-defined process and process elements have receive more attention in research, however, this doesn’t necessarily mean that technique is better than the other techniques. The experiments have been used widely as a research method in static code analysis research, but the outcome variables in the majority of the experiments are inconsistent. The use of experiments in academic context contributed nothing to improve the relevance, while the inadequate reporting of validity threats and their mitigation strategies contributed significantly to poor rigor of research. The benefits and limitations of different static code analysis techniques identified by the SLR could not complement the survey findings, because the rigor and relevance of most of the studies reporting them was weak. The survey concluded that the adoption of static code analysis techniques in the industry is more influenced by the software life-cycle models in practice in organizations, while software product type and company size do not have much influence. The amount of attention a static code analysis technique has received in research doesn’t necessarily influence its adoption in industry which indicates a wide gap between research and industry. However, the company size, product type, and software life-cycle model do influence professionals perception on benefits and limitations of different static code analysis techniques.
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EFPGAs : architectural explorations, System integration, & a Visionary Industrial survey of programmable technologies / EFPGAs : explorations architecturales, integration système, et une enquête visionnaire industriel des technologies programmablesAhmed, Syed Zahid 22 June 2011 (has links)
La thèse s'articule autour du thème des FPGA embarqués(eFPGAs). Ce manuscrit analyse les solutions existantes actuellement et discute les challenges et opportunités de ces technologies; une analyse en profondeur des échecs des tentatives passées est également donnée. Sur la base des solutions existantes dans la littérature, une structure de eFPGA à topologie de type grille est proposée, décrite en langage VHDL RTL. Cette solution comporte également les outils de programmation associés. Sur la base de cette proposition, des explorations sont menées quant à la pertinence des solutions proposées au sens de métriques d'actualité tells que densité logique, performance et consommation. Une des contributions notables de cette thèse repose sur la proposition d'une architecture de switch unifiée éliminant les blocs de connexions ainsi que l'interconnexion locale typique des FPGA actuels(telles que ceux modélisables dans le logiciel VPR) tout en autorisant une bonne routabilité. Toutes les expérimentations ont été menées sur une technologie CMOS 65nm faible puissance du fondeur STMicroelectronics, qui permet de fait d'obtenir des évaluations pertinentes. Une seconde contribution notable repose sur l'exploration de l'intégration de eFPGA dans un contexte système sur puce (SoC). Cette approche repose sur l'adjonction d'un eFPGA au sein d'un système intégré, au côté d'un processeur de type LEON3, la programmation s'effectuant sur la base d'une approche de type ESL. Deux explorations sont ainsi déclinées, comme unité intégrée au sein du processeur et comme coprocesseur. Les résultats présentés permettent ainsi d'analyser sous plusieurs angles les compromis possibles ainsi que les perspectives et limitations de ce type d'approches. Finalement, un cas d'étude est également présenté quant à l'intégration de mémoires de type magnétique (MRAM) au sein-même de l'architecture du eFPGA. / The thesis extensively revolves around embedded FPGAs (eFPGAs). It conducts detailed survey focused on programmable technologies to investigate potentials and challenges of eFPGAs and probable failure reasons of several past attempts of different kinds. Based on survey knowledge, technology independent soft eFPGAs of FPGA-like mesh-based classical architecture with standard RTL programming flow areinvestigated. Detailed eFPGA architectural explorations (including CAD tools) are conducted to explore silicon-efficient (logic density, power, performance etc.)eFPGA architectures. Among notable innovations achieved is unified switch block with complete removal of connection block and local interconnect of classical mesh-based FPGAs (VPR-like) while maintaining good routing efficiency. All experiments are conducted on 65nm CMOS low powerSTMicroelectronics process to get practical silicon values and perspectives. Finally eFPGAs in systems (SoCs) potentials and challenges are addressed. A reconfigurable acceleration scenario with ESL exploitation (for programming ease) and full silicon tradeoffs visualization is presented with integration of eFPGA with LEON3 processor (as a functional and co-processor unit, with also highlighting potential flaws of functional unit in industrial perspectives). An interesting case study for perspectives of emerging MRAM memories for eFPGAs is also presented.
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Information Visualization for Agile Development in Large‐Scale Organizations / Information Visualization for Agile Development in Large‐Scale OrganizationsManzoor, Numan, Shahzad, Umar January 2012 (has links)
Context: Agile/lean development has been successful situations where small teams collaborate over long periods of time with project stakeholders. Unclear is how such teams plan and coordinate their work in such situations where inter-dependencies with other projects exist. In large organizations, scattered teams and complex team structure makes it difficult for every stakeholder to have a clear understanding of project information. These factors make it difficult for large‐scale organizations to adopt the agile/lean development paradigm. Objectives: The goal of conducting this study is to find the information visualization techniques that ease or resolve the challenges of agile development in large-scale organizations. The study reports the challenges of agile development and information visualization techniques in literature and reported by industrial experts. Additionally, proposed a guideline that how information visualization technique can be used to ease or resolve related challenge of agile development. Methods: For this particular study, two research methodologies are used; Systematic Literature Review (SLR) and Industrial Survey. Two SLRs are performed for finding 1) challenges of agile development and 2) information visualization techniques in agile development. Data sources like Engineering Village (Inspec/ Compendex), IEEE Explore digital library, ACM digital library, Science Direct, ISI-Web of knowledge; Scopus were used to select primary study. Industrial survey was conducted in order to obtain empirical evidence to our findings. In survey, mainly questions were related to challenges of agile development and information visualization techniques practiced by industrial experts. Results: 84 different challenges of agile development found in literature and by applying grounded theory we found 9 distinct categories of challenges. There were 55 challenges reported by industrial experts in survey which later grouped into 10 distinct challenges. 45 information visualization techniques found in literature and grouped into 21 distinct technologies. There were 47 different information visualization techniques reported by industrial experts. When we grouped these techniques there were 9 distinct technologies found by applying open, axial and selective coding of grounded theory Conclusions: Systematic Literature Review and Industrial Survey confirmed that information visualization techniques can be used to ease or resolve challenges of agile development. Along with other visualization techniques, Data Flow Diagrams, UML, Use Case Diagrams, Burn Down Charts, Scrum Story Board, Kanban Boards and Gantt Chart are highly reported techniques found through systematic literature review and later confirmed by industrial experts. On the other hand, through survey we found that industrial experts mainly rely on informal and customized information visualization techniques to visualize information.
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