Silicon Nanowire (SiNW) based reconfigurable fieldeffect transistors (RFETs) provide an additional gate terminal called the program gate which gives the freedom of programming p-type or n-type functionality for the same device at runtime. This enables the circuit designers to pack more functionality per computational unit. This saves processing costs as only one device type is required, and no doping and associated lithography steps are needed for this technology. In this paper, we present a complete design flow including both logic and physical synthesis for circuits based on SiNW RFETs. We propose layouts of logic gates, Liberty and LEF (Library Exchange Format) files to enable further research in the domain of these novel, functionally enhanced transistors. We show that in the first of its kind comparison, for these fully symmetrical reconfigurable transistors, the area after placement and routing for SiNW based circuits is 17% more than that of CMOS for MCNC benchmarks. Further, we discuss areas of improvement for obtaining better area results from the SiNW based RFETs from a fabrication and technology point of view. The future use of self-aligned techniques to structure two independent gates within a smaller pitch holds the promise of substantial area reduction.

In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I-V characteristics can also enable compact, 1-transistor, non-volatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.

Logic-in-memory circuits promise to overcome the von-Neumann bottleneck, which constitutes one of the limiting factors to data throughput and power consumption of electronic devices. In the following we present four-input logic gates based on only two ferroelectric FETs (FeFETs) with hafnium oxide as the ferroelectric material. By utilizing two complementary inputs, a XOR and a XNOR gate are created. The use of only two FeFETs results in a compact and nonvolatile design. This realization, moreover, directly couples the memory and logic function of the FeFET. The feasibility of the proposed structures is revealed by electrical measurements of HKMG FeFET memory arrays manufactured in 28nm technology.

During the last decade ferroelectrics based on doped hafnium oxide emerged as promising candidates for realization of ultra-low-power non-volatile memories. Two spontaneous polarization states occurring in the material that can be altered by applying electrical fields rather than forcing a current through and the materials compatibility to CMOS processing are the main benefits setting the concept apart from other emerging memories. 1T1C ferroelectric random access memories (FeRAM) as well as 1T FeFET concepts are under investigation. In this article the application of hafnium based ferroelectric memories in different flavours and their ranking in the memory landscape are discussed.

The use of ferroelectric negative capacitance (NC) has been proposed as a promising way to reduce the power dissipation in nanoscale devices [1]. According to single-domain (SD) Landau theory, a hysteresis-free NC state in a ferroelectric might be stabilized in the presence of depolarization fields below a certain critical film thickness tF, SD. However, it is well-known that depolarization fields will cause the formation of domains in ferroelectrics to reduce the depolarization energy [2], which is rarely considered in the literature on NC [3]. The improvident use of SD Landau theory to model NC devices seems to be the main reason for the large discrepancy between experimental data and the current theory [4]. Here, we will show by simulation how anti-parallel domain formation can strongly limit the stability of the NC state in a metal-ferroelectric-insulator-metal (MFIM) structure, which is schematically shown in Fig. 1.

The influence of depolarization and its role in causing data retention failure in ferroelectric memories is investigated. Ferroelectric Hf₀.₅Zr₀.₅O₂ thin films 8 nm thick incorporated into a metal-ferroelectric-metal capacitor are fabricated and characterized with varying thicknesses of an Al₂O₃ interfacial layer. The magnitude of the depolarization field is adjusted by controlling the thickness of the Al₂O₃ layer. The initial polarization and the change in polarization with electric field cycling is strongly impacted by the insertion of Al₂O₃ within the device stack. Transient polarization loss is shown to get worse with larger depolarization fields and data retention is evaluated up to 85 °C.

Silicon Nanowire based Reconfigurable Field Effect Transistor (SiNW RFET) presents a solution to increase the system functionality beyond the limits of classical CMOS scaling in More-than-Moore era of semiconductor technology. They are not only spatially reconfigurable, i.e., the source and the drain can be interchangeable in design, but in such devices one can also control the primary charge carrier by controlling the voltage in the control gate. The two key morphological factors controlling reconfigurability are the structure and composition of the Schottky junctions, which serve as the location for Program and Control gates and radial strain induced by the self-limiting oxidation, which influences the carrier mobility resulting in symmetric p and n characteristic curves of an RFET. Despite its potential, in-depth nanoscale studies on the structural and compositional characterization of the key features controlling the reconfigurability are limited and thereby presents as a novel area of research. In this study, the composition and morphology of the Schottky junction and the radial strain profile due to self-limiting oxidation were studied using advanced imaging and sample preparation techniques like Transmission Electron Microscope (TEM) and Scanning Electron Microscope (SEM) imaging alongside with precise sample preparation methods like Focused Ion Beam (FIB) liftout techniques. For analysis of radial strain in nanowires that underwent self-limiting oxidation, a TEM lamella was taken of a cross-section of the NW. The lamella was kept at 200 nm thickness to preserve the strain state of the nanowire cross-section. It was observed that nanowires undergoing such oxidation have an omega (Ω) shaped oxide shell where the shell was discontinued at the spot where the nanowire was touching the substrate. Fast Fourier transform of the high-resolution image of such a NW crossection was used to calculate the strain profile. The strain is also found to be not radially uniform for such Ω shaped oxide shells. The strain profile shows a local maxima near the nanowire base where it touches the substrate then a minima approximately at the geometric center followed by the maximum strain at the area adjacent to the oxide shell thereby showing a sinusoidal profile. Theoretical simulations performed by Dr. Tim Baldauf further verified the nature of the sinusoidal strain that was observed experimentally. Similar simulations were done for different omega shell shapes, which yielded strain plots of similar sinusoidal strain plots, with the local maxima depending on the level of encapsulation of the NW by the shell. In the characterization of the Schottky junction, a TEM lamella was taken along the longitudinal direction of a nanowire, which was silicidized from both ends, similar to ones used in SiNW RFET devices. High resolution TEM micrographs and EDX (Energy dispersive X-Ray Spectroscopy) in the TEM along the Schottky junction showed a Ni rich phase and pure Si on either side of the junction. This participating phase was identified as NiSi2. However, the transition between the phases shows a gradient and in-situ experiments were designed to verify the sharpness of the junction. In in-situ silicidation experiments, Si nanowires with a thin native oxide shell were distributed on an electron transparent surface and were partially covered with Ni islands by shadow sputtering. The whole setup was then heated in a heating stage of a TEM and the Ni was allowed to disperse within the Si nanowires forming NiSi2. HRTEM (High Resolution TEM), EDX and EELS (Electron Energy Loss Spectroscopy) studies were performed on the silicidized samples for further ex-situ analysis. During the in-situ experiment, it was observed that Ni-phase interface is atomistically sharp and seldom progresses perpendicularly to the nanowire’s direction but through the closed packed planes of the NW. The interface velocity at different temperatures was used to calculate the activation energy of the silicidation process. The value of the activation energy indicates the Ni undergoing volume diffusion through the Ni-rich phase. The velocity of the interface was observed to be much higher in nanowires with smaller diameters than those with higher diameters, further proving the hypothesis. During the in-situ experiments, in around 10% of nanowires that underwent complete silicidation and held isothermally, the crystalline silicide phase was observed to partially or fully diffuse out of the nanowire core, leaving only a thin shell of Silicon oxide forming ultra-thin walled SiO2 nanotubes (NT). The onset and the time required for completion of the process varies in the nanowires depending on size of the nanowire, the distance and contact to the nearest Ni islands and presence of defects such as kinks and twists within the nanowire. In order to study the dynamics of the process, the velocity of the receding front was calculated for nanowires of two different diameters. They are found to be identical, indicating the volume flow rate of the process is directly proportional to the cross-sectional area. The voids were formed by the reduced diffusivity of Ni in Ni2Si phase in comparison to phases with lower percent of Ni. This indicates that the reason behind the phenomenon is coalition of Kirkendall voids and thus dependent on volume diffusion. From this study, it can be concluded that the extent of self-limiting oxidation and shape of the shell can influence the radial strain state. This can be used to manipulate the strain to tailor the electron and hole transfer characteristics within the RFET. A variety of factors including temperature, time, orientation and radius of the nanowires has been studied with respect to silicidation of a SiNW. The calculated activation energy can be used for precise process control over the location and morphology of Schottky junction. Although not directly related to SiNW RFET devices, the self-assembly of ultra-thin-walled SiO2 NT is a novel research area in itself, the findings of which can be applied in to design novel electronics and sensors.:TABLE OF CONTENTS Preface List of Abbreviations CHAPTER 1: Introduction and Motivation 1.1 Definition and History 1.2 Synthesis Routes 1.3 Properties and Applications 1.4 Nanoscale Electronics and Role of Si Nws 1.4.1 1.4.2 SiNW Reconfigurable Field Effect Transistor 1.5 Introduction to The Topic of The Thesis 1.6 Outline of The Thesis CHAPTER 2: Physical Basics and Previous Research: A Short Summary 2.1 Strain Measurement and Effects of Strain on on Nanoelectronics 2.1.1 Strain Analysis in Planar CMOS Structures 2.2 Silicidation and Schottky Junction 2.2.1 In-situ Silicidation 2.2.2 Silicon oxide nanotubes CHAPTER 3: Background of Instruments and Experimental Set-up 3.1 Scanning Electron Microscope 3.2 Transmission Electron Microscope 3.2.1 Imaging Techniques 3.2.2 TEM sample preparation 3.3 Focused Ion Beam CHAPTER 4: Strain in Nanowire 4.1 Goal of This Study 4.2 Strain in SiNW RFET Devices 4.3 Strain Analysis in SiNW Cross-section 4.3.1 Sample Preparation 4.3.2 Experimental Process 4.3.3 Results and Discussion 4.4 Conclusions CHAPTER 5: Schottky Junction 5.1 Crystallographic Data on Nickel Silicides 5.2 Formation of Silicides in 2-D Structures 5.2.1 Sample History 5.2.2 Sample Preparation 5.2.3 Results and Discussion 5.3 Formation of Silicides in 1-D Structures: Schottky Junction in NWs 5.3.1 Sample History 5.3.2 Sample Preparation 5.3.3 Results and Discussion 5.3.4 Shortcomings of The Lift-out Technique 5.4 In-situ Silicidation 5.4.1 Motivation 5.4.2 Sample Preparation 5.4.3 Experimental Procedure 5.4.4 Results and Discussions 5.4.5 Shortcoming of The Experiment 5.5 Self-assembling SiO2 Nanotubes 5.5.1 Sample Preparation 5.5.2 Experimental Process 5.5.3 Results and Discussion . 5.5.4 Post In-situ Experiment TEM Analysis 5.5.5 Conclusions CHAPTER 6: Conclusions and Outlook 6.1 Strain Analysis 6.2 Schottky Junction Studies Bibliography Acknowledgements

The architecture of the network is undergoing a series of structural changes from the core network to the user to pave the way for 5G. New infrastructure elements are being massively deployed, thus making 5G more heterogeneous. This emerging paradigm, along with new services and handheld devices, creates a massive, highly mobile, heterogeneous environment with hard constraints in throughput, latency, resilience, and power consumption. This dissertation presents Agile MEC (AMEC), a shift in the concept of MEC to support user's mobility with the rapid relocation of services; and Network-coded Cooperation (NCC), a new system for massive content distribution in cellular networks. In summary, AMEC provides a mobility framework that reliably reduces the latency and power consumption in the system, and NCC improves network throughput, network resilience, and power consumption by offloading cellular traffic to underlay networks. / Die Architektur des Netzes durchläuft eine Reihe von strukturellen Veränderungen vom Kernnetz bis zum Benutzer, um den Weg für 5G zu ebnen. Neue Infrastruktur Elemente werden massiv eingesetzt, wodurch 5G heterogener wird. Dieses aufkommende Paradigma bildet zusammen mit neuen Diensten und Handheld-Geräten eine massive, hochmobile, heterogene Umgebung mit harten Einschränkungen in Bezug auf Durchsatz, Latenz, Belastbarkeit und Stromverbrauch. In dieser Dissertation werden Agile MEC (AMEC), eine Verschiebung des MEC-Konzepts zur Unterstützung der Mobilität der Benutzer durch die schnelle Verlagerung von Diensten, und Network-coded Cooperation (NCC), ein neues System zur massiven Verteilung von Inhalten in zellularen Netzwerken, vorgestellt. Zusammenfassend lässt sich sagen, dass AMEC einen Mobilitätsrahmen bietet, der die Latenzzeit und den Stromverbrauch im System zuverlässig reduziert, und NCC verbessert den Netzwerkdurchsatz, die Netzwerkstabilität und den Stromverbrauch, indem es den zellularen Datenverkehr auf unterlagerte Netzwerke verlagert.

Laseroptische Messsysteme werden vielseitig eingesetzt, unter anderem für die Messung der Strömung in Blasen und Tropfen. Beispielsweise ist die Messung in Tropfen von besonderem Interesse für die Brennstoffzellenforschung, da das Wasserkondensat die Leistungsfähigkeit der Zelle stark mindern kann. Bei der laseroptischen Messung durch die dynamische Phasengrenzfläche erhöht sich aufgrund der zufälligen Lichtbrechung die Messunsicherheit erheblich. Um dem entgegenzuwirken, wurde in dieser Arbeit untersucht, wie sich der in der Astronomie weitverbreitete Ansatz einer aktiven Wellenfrontkorrektur auf die laseroptische Strömungsmesstechnik für die Korrektur einer zufällig dynamisch streuenden Phasengrenzfläche mit nur einem optischen Zugang durch die Grenzfläche übertragen lässt. Als neuartiger Leitstern wurde hierfür der Fresnel-Reflex der Oberfläche als Fresnel Guide Star (FGS), welcher alle Informationen über die optische Störung enthält, untersucht und eingesetzt. Validiert wurde der neue Leitstern exemplarisch für die zwei laseroptischen Messverfahren Laser-Doppler-Velocimetrie (LDV) und Particle-Image-Velocimetrie (PIV). Für das bildgebende Messverfahren PIV wurde ein Regelsystem realisiert, welches eine adaptive optische Korrektur einer oszillierenden Wasseroberfläche durchführt. Das System besteht aus einem Hartmann-Shack-Sensor (HSS), einer Signalverarbeitungseinheit und einem 69-elementigen deformierbaren Membranspiegel. Dabei muss die Signalverarbeitungseinheit aus dem Hartmannogramm die Wellenfront des FGS rekonstruieren, die Stellgröße berechnen und den Membranspiegel ansteuern. Diese komplexe Multiple-Input-Multiple-Output(MIMO)-Regelungsaufgabe stellt besondere Anforderungen an das System, da die Wasseroberfläche mit mehreren hundert Hertz schwingt und das System für eine hinreichende Reserve somit eine Regelrate im Kilohertzbereich haben muss. Um diese Anforderungen zu erfüllen, wurde als hybride Recheneinheit ein Field- Programmable System-on-Chip (FPSoC) eingesetzt. Dieser vereint eine Central Processing Unit (CPU) und einen Field-Programmable Gate Array (FPGA) auf einem einzigen monolithischen Chip als eine sehr leistungsfähige Symbiose beider Architekturen. Das System erreicht eine Regelrate von 3,5 kHz und war in der Lage, die optische Störung mit einer Dämpfungsbandbreite von bis zu 150 Hz zu dämpfen. Bei der PIV-Messung wurde die Erhöhung der Standardunsicherheit des Geschwindigkeitsfeldes, verursacht durch die Oszillation der Phasengrenzfläche, um 67 % reduziert. Das System kann beispielsweise für die Optimierung von Brennstoffzellen eingesetzt werden, um die Tropfeninnenströmung in den auf der chemisch aktiven opaken Membran kondensierten Tropfen mit nur einem einzigen optischen Zugang durch die streuende Grenzfläche zu messen. Damit könnte der Gleitprozess des Tropfens an der Membranoberfläche verstanden werden und das Wasser effektiver abtransportiert werden, um die Leistungsfähigkeit der Zelle zu steigern. Weitere Anwendungsgebiete sind die Strömungsmessung in Taylorblasen, Regentropfen oder Flüssigkeitskühlfilmen mit offener Oberfläche. Generell hat der neue FGS zusammen mit dem Regelungssystem das Potenzial, die optische Messung durch eine dynamische oszillierende Grenzfläche zu verbessern oder überhaupt erst zu ermöglichen. / Laser optical measurement systems are used in a variety of applications, e.g. the flow measurement in bubbles and droplets. The flow in droplets is of particular interest for fuel cell research, since water condensate can significantly reduce the efficiency of the cell. In laser-optical measurements the dynamic motion of the phase boundary increases the measurement uncertainty significantly because of the random refraction of light. Therefore this thesis investigates how the approach of an active wavefront correction, which is widely used in astronomy, can be applied to laser-optical flow measurement techniques for the correction of a dynamic phase boundary with only one optical access through the interface. For this purpose, the Fresnel reflection of the surface was investigated, which is called Fresnel Guide Star (FGS). It contains all information about the optical distortion. The new guide star was validated exemplarily for the two laser optical measurement techniques Laser Doppler Velocimetry (LDV) and Particle Image Velocimetry (PIV). For PIV a control system consisting of a Hartmann-Shack-Sensor (HSS), a signal processing unit and a 69-element deformable membrane mirror was realized, which performs an adaptive optical correction of the moving water surface. Therefore the signal processing unit must reconstruct the wavefront of the FGS from the Hartmannogram, calculate the set value and control the membrane mirror. This complex Multiple-Input Multiple-Output (MIMO) control task results in extensive demands on the control system, since the water surface oscillates with several hundred hertz and the system must therefore have a control rate in the kilohertz range to ensure sufficient reserve. In order to meet these requirements, a Field- Programmable System-on-Chip (FPSoC) was used as hybrid computing unit. It combines a Central Processing Unit (CPU) and an Field-Programmable Gate Array (FPGA) on a single monolithic chip as a very powerful symbiosis of both architectures. The system achieved a control rate of 3,5 kHz and was able to attenuate the optical distortion with an attenuation bandwidth of up to 150 Hz. In the PIV measurement, the increase in the standard uncertainty of the velocity field caused by the oscillation of the phase boundary was reduced by 67 %. The system could be used for the optimization of fuel cells to measure the internal flow in the droplets condensed on the chemically active membrane with only one optical access through the fluctuating interface. This would allow the sliding process of the droplet on the membrane surface to be understood and the water to be removed more effectively in order to increase the performance of the cell. Further applications are flow measurement in bubbles, raindrops or liquid cooling films with an open surface, where the system expands the field of application for computational laser metrology. In general, the new FGS together with the low latency control system have the potential to improve the optical measurement through dynamically oscillating interfaces or to make the measurement possible at all.

This work presents an analogue baseband (BB) chain for a magnetic tunneling junction (MTJ) based radiofrequency (RF) signal detector fully integrated in a hybrid CMOS-MTJ technology. The BB chain contains a 6 th -order gm-C low-pass filter (LPF), a BB amplifier, a comparator, and a current bank. According to measurement results, the 6 th -order LPF with a cut-off frequency of 10 MHz consumes a very low DC power of 2.41 mW. Its DC power consumption per pole of 0.4 mW is the lowest among the state-of-the-art LPFs. The LPF can be also switched on and off very fast within 110 ns. With the fast switch-ability and the low power consumption, the LPF outperforms the state of the art. Furthermore, the complete BB chain can transform a 2.5 Vpp, 5 Mbps BB signal into digital data with a bit error rate fewer than 1e−6 . The BB chain consumes 2.85mW including all bias circuits. To achieve power efficiency, the BB chain is designed to operate under an aggressive duty-cycling mode. The switch-on time of the BB chain is within 200 ns