We report the creation of strained silicon on silicon (SSOS) substrate technology. The method uses a relaxed SiGe buffer as a template for inducing tensile strain in a Si layer, which is then bonded to another Si handle wafer. The original Si wafer and the relaxed SiGe buffer are subsequently removed, thereby transferring a strained-Si layer directly to Si substrate without intermediate SiGe or oxide layers. Complete removal of Ge from the structure was confirmed by cross-sectional transmission electron microscopy as well as secondary ion mass spectrometry. A plan-view transmission electron microscopy study of the strained-Si/Si interface reveals that the lattice-mismatch between the layers is accommodated by an orthogonal array of edge dislocations. This misfit dislocation array, which forms upon bonding, is geometrically necessary and has an average spacing of approximately 40nm, in excellent agreement with established dislocation theory. To our knowledge, this is the first study of a chemically homogeneous, yet lattice-mismatched, interface. / Singapore-MIT Alliance (SMA)

High quality crystalline semiconductor films are a key component in the production of electronic and opto-electronic devices, however, the requirement of latticed-matched single crystal substrates for the epitaxy of a thin film limits the available material systems which can be developed commercially. This strict lattice matching requirement is relaxed for two-dimensional layered materials grown via van der Waals epitaxy. Unfortunately, the same low surface energies of these layered materials also suppress the growth of three-dimensional materials upon them, preventing direct large area single-crystal growth. The work presented in this thesis will demonstrate and investigate the spontaneous van der Waals epitaxy, driven by weak chemical interaction, of a three-dimensional material on a three-dimensional material system. Despite a 3.7% lattice mismatch, high quality CdTe can be heteroepitaxially deposited on α-Al2O3 but with an incommensurate interface which demonstrates weak adhesion between the film/substrate. This weak adhesion is exploited by developing a strain driven epitaxial thin film transfer and handling method, which causes deposited layers and structures to separate at the substrate interface for transfer to secondary carrier substrates without effecting the film properties and leaving the original substrate for subsequent use. Simple transferred thin film crystalline II-VI heterostructure devices on flexible substrates are demonstrated, without the need for selective chemical etch layers, ion-implantation or complex post-processes as required by conventional fabrication techniques. Following a growth study of GaAs on three oxide substrates, the phenomena of epitaxial registry with apparent weak interface adhesion is demonstrated for another system, GaAs/α-Al2O3, where a layer transferred heterostructure device on a flexible substrate is also demonstrated. / Thesis / Doctor of Philosophy (PhD)

Au vu des limitations rencontrées par la miniaturisation des circuits microélectroniques, l’augmentation de performances des systèmes repose largement aujourd’hui sur la fabrication d’empilements de couches minces complexes et innovants pour offrir davantage de compacité et de flexibilité. L’intérêt grandissant pour la réalisation de structures innovantes temporaires, i.e. permettant de réaliser des circuits sur les deux faces d’un même film, nous a mené à évaluer les potentialités d’une technologie combinant le transfert de films minces monocristallins, i.e. la technologie Smart Cut™, et un procédé de de porosification partielle du silicium afin de mettre au point une technologie de double report de film monocristallin. En ce sens, des substrats de silicium monocristallin ont été partiellement porosifiés par anodisation électrochimique. La mise en œuvre de traitements de substrats partiellement poreux a nécessité l’emploi de techniques de caractérisation variées pour dresser une fiche d’identité des couches minces poreuses après anodisation et évaluer l’évolution des propriétés de ces couches en fonction des différents traitements appliqués. Les propriétés chimiques, structurales et mécaniques des couches de Si poreux ont ainsi été étudiées via l’utilisation de différentes techniques de caractérisation (XPS-SIMS, AFM-MEB-XRD, nanoindentation, technique d’insertion de lame, etc.). Ces études ont permis d’appréhender et de décrire les mécanismes physiques mis au jeu au cours des différents traitements et de déterminer les caractéristiques {porosité, épaisseur} optimales des couches poreuses compatibles avec les séquences de la technologie proposée. La technologie Smart Cut™ a ainsi été appliquée à des substrats partiellement porosifiés menant à la fabrication réussie d’une structure temporaire de type Silicium-sur-Isolant avec une couche de silicium poreux enterrée. Ces structures temporaires ont été « démontées » dans un second temps par collage polymère ou collage direct et insertion de lame menant au second report de film mince monocristallin par rupture au sein de la couche porosifiée et donc fragile. Les structures fabriquées ont été caractérisées pour vérifier leur intégrité et leurs stabilités chimique et mécanique. Les propriétés cristallines du film mince de Si monocristallin, reporté en deux temps, ont été vérifiées confirmant ainsi la compatibilité des structures fabriquées avec des applications microélectroniques telles que les applications de type « Back-Side Imager » nécessitant une implémentation de composants sur les deux faces du film. Ainsi une technologie prometteuse et performante a pu être élaborée permettant le double report de films minces monocristallins et à fort potentiel pour des applications variées comme les imageurs visibles ou le photovoltaïque. / As scaling of microelectronic devices is confronted from now to fundamental limits, improving microelectronic systems performances is largely based nowadays on complex and innovative stack realization to offer more compaction and flexibility to structures. Growing interest in the fabrication of innovative temporary structures, allowing for example double sided layer processing, lead us to investigate the capability to combine one technology of thin single crystalline layer transfer, i.e. the Smart Cut™ technology, and partial porosification of silicon substrate in order to develop an original double layer transfer technology of thin single crystalline silicon film. To this purpose, single crystalline silicon substrates were first partially porosified by electrochemical anodization. Application of suitable treatments of porous silicon layer has required the use of several characterization methods to identify intrinsic porous silicon properties after anodization and to verify their evolution as function of different applied treatments. Chemical, structural and mechanical properties of porous silicon layers were studied by using different characterization techniques (XPS-SIMS, AFM-MEB-XRD, nanoindentation, razor blade insertion, etc.). Such studies allowed comprehending and describing physical mechanisms occurring during each applied technological steps and well determining appropriated {porosity, thickness} parameters of porous silicon layer with the developed technological process flow. The Smart Cut™ technology was successfully applied to partially porosified silicon substrates leading to the fabrication of temporary SOI-like structures with a weak embedded porous Si layer. Such structures were then “dismantled” thanks to a second polymer or direct bonding and razor blade insertion to produce a mechanical rupture through the fragile embedded porous silicon layer and to get the second thin silicon film transfer. Each fabricated structure was characterized step by step to check its integrity and its chemical and mechanical stabilities. Crystalline properties of the double transferred silicon layer were verified demonstrating the compatibility of such structures with microelectronic applications such as “Back-Side Imagers” needing double-sided layer processing. Eventually, a promising and efficient technology has been developed to allow the double transfer of thin single crystalline silicon layer which presents a high potential for various applications such as visible imagers or photovoltaic systems.