The ever-growing need for high speed data transmission is driven by multimedia and telecommunication demands. Traditional metallic media, such as copper coaxial cable, prove to be a limiting factor for high speed communications. Fiber optic methods provide a feasible solution that lacks the limitations of metallic mediums, including low bandwidth, cross talk caused by magnetic induction, and susceptibility to static and RF interferences. The first scientists to work with fibers optics started in 1970. One of the early challenges they faced was to produce glass fiber that was pure enough to be equal in performance with copper based media. Since then, the technology has advanced tremendously in terms of performance, quality, and consistency. The advancement of fiber optic communication has met its limits, not in the purity of its fiber media used to guide the data-modulated light wave, but in the conversion back and forth between electric signals to light. A high speed optic receiver must be used to convert the incident light into electrical signals. This thesis describes the design of a 2.5 GHz Optoelectronic Amplifier, the front end of an optic receiver. The discussion includes a survey of feasible topologies and an assessment of circuit techniques to enhance performance. The amplifier was designed and realized in a TSMC 0.18 µm CMOS process.

Este informe técnico propone el diseño de un bloque llamado Amplificador Limitador que se encuentra en los equipos que trabajan con fibra óptica o con altas tasas de transmision de datos y que estan integrados en una pastilla de silicio. El objetivo principal es aumentar el ancho de banda de un Amplificador Limitador mediante la aplicación de la técnica Inductive Peaking para lograr velocidades que corresponden a una portadora óptica OC-192 equivalente a 10 Gbps bajo el estándar SONET. Haciendo uso de tecnología CMOS con transistores de 130 nm de ancho de canal. A su vez se propone disminuir el consumo de potencia y el área ocupada en la pastilla de Silicio utilizando inductores activos y la eliminación de los capacitores de desacople DC entre etapas. Los resultados finales Post Layout demuestran que es posible extender el ancho de banda con las técnicas mencionadas anteriormente, reducir el consumo total y el área ocupada en la pastilla de Silicio y cumplir con las especificaciones técnicas requeridas. This technical report proposes the design of a block called Limiting Amplifier which is found in equipment that works with optical fiber or with high rates of data transmission and that are integrated in a silicon wafer. The main objective is to increase the bandwidth of a limiter amplifier by applying the Inductive Peaking technique to achieve speeds that correspond to an OC-192 optical carrier equivalent to 10 Gbps under the SONET standard, making use of CMOS technology with 130 nm channel width transistors. At the same time, it is proposed to reduce the power consumption and the area occupied in the chip using active inductors and the elimination of DC decoupling capacitors between stages. The final results of Post Layout show that it is possible to extend the bandwidth with the techniques mentioned above, reducing the total consumption and the area occupied in the silicon pellet and accomplishing with the required technical specifications.

Microwave limiting amplifiers are the key components of Instantaneous Frequency Measurement (IFM) systems. Limiting amplifiers provide constant output power level in a wide input dynamic range and over a broad frequency band. Moreover, limiting amplifiers are high gain devices that are used to bring very low input power levels to a constant output power level. Besides, limiting amplifiers are required to provide minimum small signal gain ripple in order not to reduce the sensitivity of the IFM system over the operating frequency band. In this thesis work, a high gain, medium power, 2-18 GHz limiting amplifier module is designed, simulated, fabricated and measured. First, a 3-stage cascaded amplifier with 27 dB small signal gain is designed and fabricated. The 3-stage amplifier is composed of a novel cascaded combination of negative feedback and distributed amplifiers that provides the minimum small signal gain ripple and satisfactory input and output return losses inside 2-18 GHz frequency band. Then, the designed two 3-stage amplifiers and one 4-stage amplifier are cascaded to constitute a limiting amplifier module with minimum 80 dB small signal gain. The designed 10-stage limiting amplifier module also includes an analog voltage controllable attenuator to be used for compensating the gain variations resulting from temperature changes. The fabricated 10-stage limiting amplifier module provides 20 +/- 1.2 dBm output power level and excellent small signal gain flatness, +/- 2.2 dB, over 2-18 GHz frequency range.