The need of the everyday user to transfer large amounts of data is driving the need for larger data transfer capacity. Optical communication networks can satisfy this need. To be economically viable, optical transceivers must be integrated onto chips at low cost, using relatively cheap semiconductor processes. The optical preamplifier (transimpedance amplifier) receives optical information and converts it to a useful electrical form. It must operate at high speed, contribute little distortion to the input signal, and add little electrical noise to the incoming signal. This thesis investigates the design techniques in the literature, and proposes new architectures. Two high performance preamplifiers are designed, one using GaAs HEMTs, and the other using GaAs HBTs, each with different circuit techniques. The HEMT preamplifier has a transimpedance gain of 1.4 kΩ, the highest in the literature for 10 Gb/s operation, along with a low input referred noise current of about 15 pA/Hz1/2 at a bandwidth of 6.3 GHz. The HBT preamplifier also has a transimpedance gain of 1.5 kΩ, with a low input referred noise current of about 7 pA/Hz1/2. Both have clear, open eye-diagrams with a 10 Gb/s bit stream input, and are suitable for integration on a chip. The HEMT preamplifier was implemented as a common-gate, common-source amplifier cascade with a darlington output driver for a 50 Ω load. The HBT preamplifier was implemented as common-emitter darlington amplifier with shunt peaking, and a simple emitter degenerated output driver for a 50 Ω load. Both implementations exceeded the bandwidth, transimpedance gain and noise performance typically expected of the transistor technologies used. It is shown that the transimpedance limit can be circumvented by the use of novel architectures and shunt peaking.

Abstract A simple negative transimpedance amplifier is proposed. Because of inherent low input and output impedance, the frequency response is higher than that of the traditional operational amplifier. Using feedback, the operation frequency of amplifier can be extended. By using a simple feedback resistance, the amplifier¡¦s output level is stabilized without using common-mode feedback. The negative transimpedance amplifier as a common active element is versatile. The characteristics of these application circuits are dominated by the passive elements of the circuits. In the transimpedance-C bandpass filter and transimpedance-C lowpass filter, the , , and Q factor can be tuned. Owing to the negligible loading effect of the transimpedance amplifier, the single stage Rm-C biquad can be cascaded to high order filters. In the voltage controlled oscillator, the oscillation frequency can also be tuned.

The need of the everyday user to transfer large amounts of data is driving the need for larger data transfer capacity. Optical communication networks can satisfy this need. To be economically viable, optical transceivers must be integrated onto chips at low cost, using relatively cheap semiconductor processes. The optical preamplifier (transimpedance amplifier) receives optical information and converts it to a useful electrical form. It must operate at high speed, contribute little distortion to the input signal, and add little electrical noise to the incoming signal. This thesis investigates the design techniques in the literature, and proposes new architectures. Two high performance preamplifiers are designed, one using GaAs HEMTs, and the other using GaAs HBTs, each with different circuit techniques. The HEMT preamplifier has a transimpedance gain of 1.4 kΩ, the highest in the literature for 10 Gb/s operation, along with a low input referred noise current of about 15 pA/Hz1/2 at a bandwidth of 6.3 GHz. The HBT preamplifier also has a transimpedance gain of 1.5 kΩ, with a low input referred noise current of about 7 pA/Hz1/2. Both have clear, open eye-diagrams with a 10 Gb/s bit stream input, and are suitable for integration on a chip. The HEMT preamplifier was implemented as a common-gate, common-source amplifier cascade with a darlington output driver for a 50 Ω load. The HBT preamplifier was implemented as common-emitter darlington amplifier with shunt peaking, and a simple emitter degenerated output driver for a 50 Ω load. Both implementations exceeded the bandwidth, transimpedance gain and noise performance typically expected of the transistor technologies used. It is shown that the transimpedance limit can be circumvented by the use of novel architectures and shunt peaking.

A 1-G?? CMOS transimpedance amplifier (TIA) suitable for processing sub-nA-level currents in electrochemical biosensor signal-acquisition circuits is presented. Use of a two-stage active transconductor provides resistive feedback in place of a large-area linear resistor. The TIA feedback loop is engineered to suppress output offset caused by DC input leakage currents of ??0.9 nA. A mechanism to tune the low-frequency cutoff of the TIA from 0.7 Hz to 500 Hz is implemented which permits operation under variable environmental conditions. Simulated and experimental results from a custom TIA fabricated in a 3.3-V 0.35-??m CMOS process are presented.

The selectivity and sensitivity of ion mobility spectrometry (IMS) to explosives was first demonstrated by Karasek in 1974.1 Airport security has always been a concern in the United States, especially since September 11th, 2001, and as a result IMS is commonly used to screen airline passengers and their luggage at all major airports. Portable IMS systems are now widely available for a variety of applications, but as the overall size of the IMS instrumentation decreases, the sensitivity typically decreases as well. A new ion detector read out technology, a capacitive trans-impedance amplifier (CTIA), coupled to a traditional Faraday plate has shown increased sensitivity over a Faraday plate read by a conventional current to voltage converter when used in mass spectrometry. Sandia National Laboratories sponsored a project to determine whether the CTIA technology could be coupled to an IMS, and to determine the potential increase in sensitivity that could be provided to a miniature IMS equipped with the new read out technology.Sandia first provided a full size IMS, a Phemto-Chem PCP-110, which was modified to support the first generation of CTIA (CTIA1). The CTIA1 was coupled to the IMS and was successfully used to detect explosives. Next, Sandia provided miniature IMS drift tubes, but incompatibilities necessitated the design of new miniature systems. At first, only the drift tube itself was redesigned, but eventually a complete miniature IMS, including the ionizer, circuitry, and read out, was designed and built. During the design phase a new ion-beam shutter capable of increased resolution was also implemented. The second generation of CTIA was coupled to a custom drift tube and the system demonstrated increased resolution and drastically increased sensitivity to the common explosives TNT and RDX when compared to the sensitivity of the system provided by Sandia. A custom miniature drift tube coupled to a CTIA will be placed into the peripheral equipment for Sandia's MicroHound II instrumentation to provide a portable IMS with sensitivity equal to or better than bench top IMS systems.

Accelerated growth in wireless communications in recent years has led to the emergence of portable devices that employ several wireless communication standards to provide multiple functionality such as cellular communication, wireless data communication and connectivity, entertainment and navigation, within the same device. Industry drive is towards reduction of the number of radio frequency (RF) front-end receivers required to cater to the various standards/bands within a single device to reduce cost, size and power consumption. The current trend is to use broadband/multi-standard or reconfigurable RF front-ends to cater to two or three standards at a time for cost-effective RF front-end solutions. The direct conversion receiver architecture has become attractive as it offers a full on-chip front-end solution without the need for expensive external components. Passive current-mode mixers are used in these receivers to eliminate mixer flicker noise. The in-band current signals are typically in the micro-amp range after mixer downconversion. Transimpedance amplifiers are used to convert the downconverted current signals to voltage, and they provide amplification in the process. Because of the co-existence of multiple-radios within each device, large blocker currents downconvert close to the channel bandwidth after the mixer. Conventionally, single-pole transimpedance amplifier (TIA) filters are used to provide out-of-band (OOB) signal filtering. This requires high resolution analog-to-digital converters (ADCs) later in the receiver chain for signal processing. Providing higher order filtering before the ADC relaxes its specifications and this reduces the ADC and ADC calibration cost and complexity. Typically, an extra filtering stage is provided in the form of a cascaded filtering block after the single-pole TIA. In this work, higher order filtering is embedded within the TIA in the form of active feedback. In addition to relaxing the ADC specifications, this proposed TIA provides improved large signal linearity such as P1dB compression point. Furthermore, since the extra-circuitry is not in the signal path, in-band flicker noise and linearity are not degraded. The proposed TIA filter has been designed in IBM 90nm technology with a supply voltage of 1.2V. It can tolerate close-in blocker magnitudes of 4.5mA at 60MHz and higher before in-band 1dB compression is reached.

Optical communications is expanding into new applications such as infrared wireless communications; therefore, designing high performance circuits has gained considerable importance. In this dissertation a wide dynamic-range variable-gain transimpedance amplifier (TIA) is introduced. It adopts a regulated cascode (RGC) amplifier and an operational transconductance amplifier (OTA) as the feed forward gain element to control gain and improve the overload of the optical receiver. A fully-differential variable-gain TIA in a 0.35µm CMOS technology is realized. It provides a bit error rate (BER) less than 10-12 for an input current from 6µA-3mA at 3.3V power supply. For the transimpedance gain variation, from 0.1kΩ to 3kΩ, -3dB bandwidth is higher than 1.7GHz for a 0.6pF photodiode capacitance. The power dissipations for the highest and the lowest gains are 8.2mW and 24.9mW respectively. A new technique for designing uniform multistage amplifiers (MA) for high frequency applications is introduced. The proposed method uses the multi-peak bandwidth enhancement technique while it employs identical, simple and inductorless stages. It has several advantages, such as tunability of bandwidth and decreased sensitivity of amplifier stages, to process variations. While all stages of the proposed MA topology are identical, the gain-bandwidth product can be extended several times. Two six-stage amplifiers in a TSMC 0.35µm CMOS process were designed using the proposed topology. Measurements show that the gain can be varied for the first one between 16dB and 44dB within the 0.7-3.2GHz bandwidth and for the second one between 13dB and 44dB within a 1.9-3.7GHz bandwidth with less than 5.2nV/√Hz noise. Although the second amplifier has a higher gain bandwidth product, it consumes more power and occupies a wider area. A technique for capacitance multiplication is utilized to design a tunable loop filter. Current and voltage mode techniques are combined to increase the multiplication factor (M). At a high input dynamic range, M is adjustable and the capacitance multiplier performs linearly at high frequencies. Drain-source voltages of paired transistors are equalized to improve matching in the current mirrors. Measurement of a prototype loop filter IC in a 0.5µm CMOS technology shows 50µA current consumption for M=50. Where 80pF capacitance is employed, the capacitance multiplier realizes an effective capacitance varying from 1.22nF up to 8.5nF.

The objective of this work was to integrate an optical receiver in a modern standard technology in a form amenable to multiple lanes. To accomplish this goal, a photodiode was integrated with the receiver in a standard 90nm CMOS process and the nominal process voltage of 1.2V was not exceeded. Two optical lanes were integrated on chip with a pitch compatible with existing industry photodiode arrays. This work uses a non-SML photodiode to increase optical responsivity to 0.141A/W, almost 3 times higher than values typically reported for SML photodiodes. This receiver is the first integrated optical receiver reported in a standard CMOS technology with a feature size smaller than 0.13μm, which is necessary for the eventual integration of optical receivers with modern digital processing blocks on a single die. The traditional analog equalizer used in most integrated optical receivers is replaced with a high-pass filter and hysteresis latch for equalization. The receiver occupies a core area of 0.197mm2 and has an optical sensitivity of -3.7dBm at a 2Gbps data rate, while consuming 46.3mW.

The objective of this work was to integrate an optical receiver in a modern standard technology in a form amenable to multiple lanes. To accomplish this goal, a photodiode was integrated with the receiver in a standard 90nm CMOS process and the nominal process voltage of 1.2V was not exceeded. Two optical lanes were integrated on chip with a pitch compatible with existing industry photodiode arrays. This work uses a non-SML photodiode to increase optical responsivity to 0.141A/W, almost 3 times higher than values typically reported for SML photodiodes. This receiver is the first integrated optical receiver reported in a standard CMOS technology with a feature size smaller than 0.13μm, which is necessary for the eventual integration of optical receivers with modern digital processing blocks on a single die. The traditional analog equalizer used in most integrated optical receivers is replaced with a high-pass filter and hysteresis latch for equalization. The receiver occupies a core area of 0.197mm2 and has an optical sensitivity of -3.7dBm at a 2Gbps data rate, while consuming 46.3mW.

The ever-growing need for high speed data transmission is driven by multimedia and telecommunication demands. Traditional metallic media, such as copper coaxial cable, prove to be a limiting factor for high speed communications. Fiber optic methods provide a feasible solution that lacks the limitations of metallic mediums, including low bandwidth, cross talk caused by magnetic induction, and susceptibility to static and RF interferences. The first scientists to work with fibers optics started in 1970. One of the early challenges they faced was to produce glass fiber that was pure enough to be equal in performance with copper based media. Since then, the technology has advanced tremendously in terms of performance, quality, and consistency. The advancement of fiber optic communication has met its limits, not in the purity of its fiber media used to guide the data-modulated light wave, but in the conversion back and forth between electric signals to light. A high speed optic receiver must be used to convert the incident light into electrical signals. This thesis describes the design of a 2.5 GHz Optoelectronic Amplifier, the front end of an optic receiver. The discussion includes a survey of feasible topologies and an assessment of circuit techniques to enhance performance. The amplifier was designed and realized in a TSMC 0.18 µm CMOS process.