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Multiple Hypothesis Testing For Finite and Infinite TestZhang, Zhongfa 01 August 2005 (has links)
No description available.
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USB adaptér pro připojení disketových mechanik / Floppy disk drive to USB adapterGalád, Dominik January 2021 (has links)
The work deals with the design of a USB floppy drive driver. It describes the theory needed to design your own floppy drive driver and the output of individual components. The following is a schematic of the floppy drive driver design. The functions for controlling the floppy drive are described, as well as the pitfalls of the ATSAMD21J18A-AU processor used.
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How CEO Values and TMT Diversity Jointly Influence the Corporate Strategy Making ProcessHoffmann, Werner H., Meusburger, Lukas January 2018 (has links) (PDF)
Understanding managerial behavior and its underlying motivations is
of key interest in times where the role of business in society is generally viewed
critically. While CEO influence on strategy making processes is almost undisputed,
little attention has explicitly been paid to how CEO values and the characteristics
of the top management team (TMT) interact in shaping corporate strategy making.
This is surprising if one follows the assumption that top managers who work closely
together will by necessity influence each other's actions. Hence, we would expect the
CEO-TMT interface to be vital in understanding how leadership influences strategy
making. To address this, we propose a model in which the personal values of the CEO
have a direct effect on the characteristics of corporate strategy making processes yet
where this association is moderated by TMT diversity. We test the model with
data from Austria and Germany obtained through a large-scale survey conducted in
spring 2015 and a follow-up survey conducted in fall 2015 and find general support
for our model. CEO values geared towards self-transcendence (as opposed to selfinterest)
seem to be associated with more formal strategy making processes, while
values geared towards openness to change (as opposed to conservation) are found
to be associated with more flexible and less externally open ones. TMT diversity
moderates all of these relationships. Our results add to upper echelon theory as well
as to strategy process research and highlight promising avenues for future research.
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Measuring Soft Error Sensitivity of FPGA Soft Processor Designs Using Fault InjectionHarward, Nathan Arthur 01 March 2016 (has links)
Increasingly, soft processors are being considered for use within FPGA-based reliable computing systems. In an environment in which radiation is a concern, such as space, the logic and routing (configuration memory) of soft processors are sensitive to radiation effects, including single event upsets (SEUs). Thus, effective tools are needed to evaluate and estimate how sensitive the configuration memories of soft processors are in high-radiation environments. A high-speed FPGA fault injection system and methodology were created using the Xilinx Radiation Test Consortium's (XRTC's) Virtex-5 radiation test hardware to conduct exhaustive tests of the SEU sensitivity of a design within an FPGA's configuration memory. This tool was used to show that the sensitivity of the configuration memory of a soft processor depends on several variables, including its microarchitecture, its customizations and features, and the software instructions that are executed. The fault injection experiments described in this thesis were performed on five different soft processors, i.e., MicroBlaze, LEON3, Arm Cortex-M0 DesignStart, OpenRISC 1200, and PicoBlaze. Emphasis was placed on characterizing the sensitivity of the MicroBlaze soft processor and the dependence of the sensitivity on various modifications. Seven benchmarks were executed through the various experiments and used to determine the SEU sensitivity of the soft processor's configuration memory to the instructions that were executed. In this thesis, a wide variety of soft processor fault injection results are presented to show the differences in sensitivity between multiple soft processors and the software they run.
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Overheat protection for immersion heaters : Analysis of analog and digital temperature sensorsHelmisaari, Tina January 2018 (has links)
Immersion heaters are used by industries to heat fluids. The element of an immersion heater need to be fully immersed into the heated liquid, otherwise it could be subject to overheat. The main purpose of this thesis is to find a temperature sensor, which could signal in case the immersion heater is at risk to suffer from overheat due to low liquid level. A comparison of accuracy, size and cost between an analog and a digital sensor is held, to conclude whether either one is at an advantage for this application.An immersion heater with ceramic element and quartz glass tube and a water tank, both provided by Scandymet, is used during experiments. First, the position for the sensor inside the heater was examined, by placing the sensor at different positions. Next, measurements of the operating temperature of the immersion heater were made at different liquid levels. This resulted in a placement for the sensor near the head of the immersion heater and an approximate temperature range from 41 ℃ to 58 ℃. Both the analog and digital sensors is chosen with measurable ranges to match the result from previous experiments. A thermistor along with a linearizing series resistor make the analog design and a DS18B20+ with a pull-up resistor the digital design. The microcontroller for both designs is Adafruit Feather Adalogger M0, which is programmed in C/C++ using Arduino IDE software. It is concluded that it is possible to signal in case liquid level decrease below minimum level, by inserting a temperature sensing device into the immersion heater. The sensor should be placed above the maximum liquid level mark, close to the head of the heater. The analog design would be recommended as overheat protection, due to its smaller size, less expensive and, with further calibration, accurate response.
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Limit theorems for rare events in stochastic topologyZifu Wei (15420086) 02 December 2023 (has links)
<p>This dissertation establishes a variety of limit theorems pertaining to rare events in stochastic topology, exploiting probabilistic methods to study simplicial complex models. We focus on the filtration of \vc ech complexes and examine the asymptotic behavior of two topological functionals: the Betti numbers and critical faces. The filtration involves a parameter rn>0 that determines the growth rate of underlying Cech complexes. If rn depends also on the time parameter t, the obtained limit theorems will be established in a functional sense.</p>
<p>The first part of this dissertation is devoted to investigating the layered structure of topological complexity in the tail of a probability distribution. We establish the functional strong law of large numbers for Betti numbers, a basic quantifier of algebraic topology, of a geometric complex outside an open ball of radius Rn, such that Rn to infinity as the sample size n increases. The nature of the obtained law of large numbers is determined by the decay rate of a probability density. It especially depends on whether the tail of a density decays at a regularly varying rate or an exponentially decaying rate. The nature of the limit theorem depends also on how rapidly Rn diverges. In particular, if Rn diverges sufficiently slowly, the limiting function in the law of large numbers is crucially affected by the emergence of arbitrarily large connected components supporting topological cycles in the limit.</p>
<p>The second part of this dissertation investigates convergence of point processes associated with critical faces for a Cech filtration built over a homogeneous Poisson point process in the d-dimensional flat torus. The convergence of our point process is established in terms of the Mo-topology, when the connecting radius of a Cech complex decays to 0, so slowly that critical faces are even less likely to occur than those in the regime of threshold for homological connectivity. We also obtain a series of limit theorems for positive and negative critical faces, all of which are considerably analogous to those for critical faces.</p>
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Evaluation in which context a 32-bit, rather than an 8-bit processor may be appropriate to use, based on power consumptionJönsson, Patricia January 2017 (has links)
Uttrycket Internet of Things växer sig större och större och världen är på väg att ha 50miljarder uppkopplade enheter till 2020. IoT-enheter är beroende av att ha en låg effektförbrukningoch därför är en processor med låg effektförbrukning viktigt att ha. Denna studieutför tester på två strömsnåla processorer för att komma fram till vilken processor somär mest lämplig till vilken IoT-produkt. Testningen utgick från tre applikationer som i sintur baseras på verkliga IoT-situationer. De tre applikationerna har olika intesitetsnivåer. Iden första applikationen arbetar processorerna inte särskilt hårt, I den andra applikationenfår processorena arbeta mer och i den tredje applikationen får processorerna jobba somhårdast. Effektförbrukningen mäts med hjälp av Atmel Power debugger. Resultatet visaratt IoT-enheter som inte är särskilt aktiva har en lägre effektförbrukning med en 8-bitarsprocessor men en IoT-enhet som är mer aktiv har lägre effektförbrukning med Cortex-M0+baserad 32-bitars processor. / The term Internet of Things grows bigger and bigger and the world is about to have 50 billionconnected devices. IoT devices are dependent on low power consumption and thereforea low power processor is important to have. This study performs tests on two power-savingprocessors to determine which processor is most suitable for an IoT product. The test wasbased on three applications, which in turn are based on actual IoT situations. The threeapplications have different levels of intency. In the first application, the processors do notwork very hard. In the second application, the processors get more work and in the thirdapplication, the processors get the hardest work. Power consumption is measured usingAtmel Power debugger The result shows that low-active IoT devices have a lower powerconsumption with an 8-bit processor, but an IoT device that is more active has lower powerconsumption with a Cortex-M0 + based 32-bit processor.
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