Field Programmable Gate Arrays (FPGAs) são componentes reconfiguráveis de hardware que encontraram grande sucesso comercial ao longo dos últimos anos em uma grande variedade de nichos de aplicação. Alta vazão de processamento, flexibilidade e tempo de projeto reduzido estão entre os principais atrativos desses dispositivos, e são essenciais para o seu sucesso comercial. Essas propriedades também são valiosas para sistemas críticos, que frequentemente enfrentam restrições severas de desempenho. Além disso, a possibilidade de reprogramação após implantação é relevante, uma vez que permite a adição de novas funcionalidades ou a correção de erros de projeto, estendendo a vida útil do sistema. Tais dispositivos, entretanto, dependem de grandes memórias para armazenar o bitstream de configuração, responsável por definir a função presente do FPGA. Assim, falhas afetando esta configuração são capazes de causar defeitos funcionais, sendo uma grande ameaça à confiabilidade. A forma mais tradicional de remover tais erros, isto é, scrubbing de configuração, consiste em periodicamente sobrescrever a memória com o seu conteúdo desejado. Entretanto, devido ao seu tamanho significativo e à banda de acesso limitada, scrubbing sofre de um longo tempo médio de reparo, e que está aumentando à medida que FPGAs ficam maiores e mais complexos a cada geração. Partições reconfiguráveis são úteis para reduzir este tempo, já que permitem a execução de um procedimento local de reparo na partição afetada. Para este propósito, mecanismos rápidos de detecção de erros são necessários para rapidamente disparar este scrubbing localizado e reduzir a latência de erro. Além disso, diagnóstico preciso é necessário para identificar a localização do erro dentro do espaço de endereçamento da configuração. Técnicas de redundância de grão fino têm o potencial de prover ambos, mas normalmente introduzem custos significativos devido à necessidade de numerosos verificadores de redundância. Neste trabalho, propomos uma técnica de detecção de erros de grão fino que utiliza recursos abundantes e subutilizados encontrados em FPGAs do estado da arte, especificamente as cadeias de propagação de vai-um. Assim, a técnica provê os principais benefícios da redundância de grão fino enquanto minimiza sua principal desvantagem. Reduções bastante significativas na latência de erro são atingíveis com a técnica proposta. Também é proposto um mecanismo heurístico para explorar o diagnóstico provido por técnicas desta natureza. Este mecanismo tem por objetivo identificar as localizações mais prováveis do erro na memória de configuração, baseado no diagnóstico de grão fino, e fazer uso dessa informação de forma a minimizar o tempo de reparo. / Field Programmable Gate Arrays (FPGAs) are reconfigurable hardware components that have found great commercial success over the past years in a wide variety of application niches. High processing throughput, flexibility and reduced design time are among the main assets of such devices, and are essential to their commercial success. These features are also valuable for critical systems that often face stringent performance constraints. Furthermore, the possibility to perform post-deployment reprogramming is relevant, as it allows adding new functionalities or correcting design mistakes, extending the system lifetime. Such devices, however, rely on large memories to store the configuration bitstream, responsible for defining the current FPGA function. Thus, faults affecting this configuration are able to cause functional failures, posing a major dependability threat. The most traditional means to remove such errors, i.e., configuration scrubbing, consists in periodically overwriting the memory with its desired contents. However, due to its significant size and limited access bandwidth, scrubbing suffers from a long mean time to repair, and which is increasing as FPGAs get larger and more complex after each generation. Reconfigurable partitions are useful to reduce this time, as they allow performing a local repair procedure on the affected partition. For that purpose, fast error detection mechanisms are required, in order to quickly trigger this localized scrubbing and reduce error latency. Moreover, precise diagnosis is necessary to identify the error location within the configuration addressing space. Fine-grained redundancy techniques have the potential to provide both, but usually introduce significant costs due to the need of numerous redundancy checkers. In this work we propose a fine-grained error detection technique that makes use of abundant and underused resources found in state-of-the-art FPGAs, namely the carry propagation chains. Thereby, the technique provides the main benefits of fine-grained redundancy while minimizing its main drawback. Very significant reductions in error latency are attainable with the proposed approach. A heuristic mechanism to explore the diagnosis provided by techniques of this nature is also proposed. This mechanism aims at identifying the most likely error locations in the configuration memory, based on the fine-grained diagnosis, and to make use of this information in order to minimize the repair time of scrubbing.

Field Programmable Gate Arrays (FPGAs) são componentes reconfiguráveis de hardware que encontraram grande sucesso comercial ao longo dos últimos anos em uma grande variedade de nichos de aplicação. Alta vazão de processamento, flexibilidade e tempo de projeto reduzido estão entre os principais atrativos desses dispositivos, e são essenciais para o seu sucesso comercial. Essas propriedades também são valiosas para sistemas críticos, que frequentemente enfrentam restrições severas de desempenho. Além disso, a possibilidade de reprogramação após implantação é relevante, uma vez que permite a adição de novas funcionalidades ou a correção de erros de projeto, estendendo a vida útil do sistema. Tais dispositivos, entretanto, dependem de grandes memórias para armazenar o bitstream de configuração, responsável por definir a função presente do FPGA. Assim, falhas afetando esta configuração são capazes de causar defeitos funcionais, sendo uma grande ameaça à confiabilidade. A forma mais tradicional de remover tais erros, isto é, scrubbing de configuração, consiste em periodicamente sobrescrever a memória com o seu conteúdo desejado. Entretanto, devido ao seu tamanho significativo e à banda de acesso limitada, scrubbing sofre de um longo tempo médio de reparo, e que está aumentando à medida que FPGAs ficam maiores e mais complexos a cada geração. Partições reconfiguráveis são úteis para reduzir este tempo, já que permitem a execução de um procedimento local de reparo na partição afetada. Para este propósito, mecanismos rápidos de detecção de erros são necessários para rapidamente disparar este scrubbing localizado e reduzir a latência de erro. Além disso, diagnóstico preciso é necessário para identificar a localização do erro dentro do espaço de endereçamento da configuração. Técnicas de redundância de grão fino têm o potencial de prover ambos, mas normalmente introduzem custos significativos devido à necessidade de numerosos verificadores de redundância. Neste trabalho, propomos uma técnica de detecção de erros de grão fino que utiliza recursos abundantes e subutilizados encontrados em FPGAs do estado da arte, especificamente as cadeias de propagação de vai-um. Assim, a técnica provê os principais benefícios da redundância de grão fino enquanto minimiza sua principal desvantagem. Reduções bastante significativas na latência de erro são atingíveis com a técnica proposta. Também é proposto um mecanismo heurístico para explorar o diagnóstico provido por técnicas desta natureza. Este mecanismo tem por objetivo identificar as localizações mais prováveis do erro na memória de configuração, baseado no diagnóstico de grão fino, e fazer uso dessa informação de forma a minimizar o tempo de reparo. / Field Programmable Gate Arrays (FPGAs) are reconfigurable hardware components that have found great commercial success over the past years in a wide variety of application niches. High processing throughput, flexibility and reduced design time are among the main assets of such devices, and are essential to their commercial success. These features are also valuable for critical systems that often face stringent performance constraints. Furthermore, the possibility to perform post-deployment reprogramming is relevant, as it allows adding new functionalities or correcting design mistakes, extending the system lifetime. Such devices, however, rely on large memories to store the configuration bitstream, responsible for defining the current FPGA function. Thus, faults affecting this configuration are able to cause functional failures, posing a major dependability threat. The most traditional means to remove such errors, i.e., configuration scrubbing, consists in periodically overwriting the memory with its desired contents. However, due to its significant size and limited access bandwidth, scrubbing suffers from a long mean time to repair, and which is increasing as FPGAs get larger and more complex after each generation. Reconfigurable partitions are useful to reduce this time, as they allow performing a local repair procedure on the affected partition. For that purpose, fast error detection mechanisms are required, in order to quickly trigger this localized scrubbing and reduce error latency. Moreover, precise diagnosis is necessary to identify the error location within the configuration addressing space. Fine-grained redundancy techniques have the potential to provide both, but usually introduce significant costs due to the need of numerous redundancy checkers. In this work we propose a fine-grained error detection technique that makes use of abundant and underused resources found in state-of-the-art FPGAs, namely the carry propagation chains. Thereby, the technique provides the main benefits of fine-grained redundancy while minimizing its main drawback. Very significant reductions in error latency are attainable with the proposed approach. A heuristic mechanism to explore the diagnosis provided by techniques of this nature is also proposed. This mechanism aims at identifying the most likely error locations in the configuration memory, based on the fine-grained diagnosis, and to make use of this information in order to minimize the repair time of scrubbing.

Field Programmable Gate Arrays (FPGAs) são componentes reconfiguráveis de hardware que encontraram grande sucesso comercial ao longo dos últimos anos em uma grande variedade de nichos de aplicação. Alta vazão de processamento, flexibilidade e tempo de projeto reduzido estão entre os principais atrativos desses dispositivos, e são essenciais para o seu sucesso comercial. Essas propriedades também são valiosas para sistemas críticos, que frequentemente enfrentam restrições severas de desempenho. Além disso, a possibilidade de reprogramação após implantação é relevante, uma vez que permite a adição de novas funcionalidades ou a correção de erros de projeto, estendendo a vida útil do sistema. Tais dispositivos, entretanto, dependem de grandes memórias para armazenar o bitstream de configuração, responsável por definir a função presente do FPGA. Assim, falhas afetando esta configuração são capazes de causar defeitos funcionais, sendo uma grande ameaça à confiabilidade. A forma mais tradicional de remover tais erros, isto é, scrubbing de configuração, consiste em periodicamente sobrescrever a memória com o seu conteúdo desejado. Entretanto, devido ao seu tamanho significativo e à banda de acesso limitada, scrubbing sofre de um longo tempo médio de reparo, e que está aumentando à medida que FPGAs ficam maiores e mais complexos a cada geração. Partições reconfiguráveis são úteis para reduzir este tempo, já que permitem a execução de um procedimento local de reparo na partição afetada. Para este propósito, mecanismos rápidos de detecção de erros são necessários para rapidamente disparar este scrubbing localizado e reduzir a latência de erro. Além disso, diagnóstico preciso é necessário para identificar a localização do erro dentro do espaço de endereçamento da configuração. Técnicas de redundância de grão fino têm o potencial de prover ambos, mas normalmente introduzem custos significativos devido à necessidade de numerosos verificadores de redundância. Neste trabalho, propomos uma técnica de detecção de erros de grão fino que utiliza recursos abundantes e subutilizados encontrados em FPGAs do estado da arte, especificamente as cadeias de propagação de vai-um. Assim, a técnica provê os principais benefícios da redundância de grão fino enquanto minimiza sua principal desvantagem. Reduções bastante significativas na latência de erro são atingíveis com a técnica proposta. Também é proposto um mecanismo heurístico para explorar o diagnóstico provido por técnicas desta natureza. Este mecanismo tem por objetivo identificar as localizações mais prováveis do erro na memória de configuração, baseado no diagnóstico de grão fino, e fazer uso dessa informação de forma a minimizar o tempo de reparo. / Field Programmable Gate Arrays (FPGAs) are reconfigurable hardware components that have found great commercial success over the past years in a wide variety of application niches. High processing throughput, flexibility and reduced design time are among the main assets of such devices, and are essential to their commercial success. These features are also valuable for critical systems that often face stringent performance constraints. Furthermore, the possibility to perform post-deployment reprogramming is relevant, as it allows adding new functionalities or correcting design mistakes, extending the system lifetime. Such devices, however, rely on large memories to store the configuration bitstream, responsible for defining the current FPGA function. Thus, faults affecting this configuration are able to cause functional failures, posing a major dependability threat. The most traditional means to remove such errors, i.e., configuration scrubbing, consists in periodically overwriting the memory with its desired contents. However, due to its significant size and limited access bandwidth, scrubbing suffers from a long mean time to repair, and which is increasing as FPGAs get larger and more complex after each generation. Reconfigurable partitions are useful to reduce this time, as they allow performing a local repair procedure on the affected partition. For that purpose, fast error detection mechanisms are required, in order to quickly trigger this localized scrubbing and reduce error latency. Moreover, precise diagnosis is necessary to identify the error location within the configuration addressing space. Fine-grained redundancy techniques have the potential to provide both, but usually introduce significant costs due to the need of numerous redundancy checkers. In this work we propose a fine-grained error detection technique that makes use of abundant and underused resources found in state-of-the-art FPGAs, namely the carry propagation chains. Thereby, the technique provides the main benefits of fine-grained redundancy while minimizing its main drawback. Very significant reductions in error latency are attainable with the proposed approach. A heuristic mechanism to explore the diagnosis provided by techniques of this nature is also proposed. This mechanism aims at identifying the most likely error locations in the configuration memory, based on the fine-grained diagnosis, and to make use of this information in order to minimize the repair time of scrubbing.

Background. Maintainability of software products continues to be an area of im- portance and interest both for practice and research. The time used for maintenance usually exceeds 70% of the whole period of software development process. At present, there is a large number of metrics that have been suggested to indicate the main- tainability of a software product. However, there is a gap in validation of proposed source code metrics and the external quality of software maintainability. Objectives. In this thesis, we aim to catalog the proposed metrics for software maintainability. From this catalog we will validate a subset of commonly proposed maintainability indicators. Methods. Through a literature review with a systematic search and selection ap- proach, we collated maintainability metrics from secondary studies on software main- tainability. A subset of commonly metrics identified in the literature review were validated in a retrospective study. The retrospective study used a large open source software "Elastic Search" as a case. We collected internal source code metrics and a proxy for maintainability of the system for 911 bug fixes in 14 version (11 experi- mental samples, 3 are verification samples) of the product. Results. Following a systematic search and selection process, we identified 11 sec- ondary studies on software maintainability. From these studies we identified 290 source code metrics that are claimed to be indicators of the maintainability of a soft- ware product. We used mean time to repair (MTTR) as a proxy for maintainability of a product. Our analysis reveals that for the "elasticsearch" software, the values of the four indicators LOC, CC, WMC and RFC have the strongest correlation with MTTR. Conclusions. In this thesis, we validated a subset of commonly proposed source code metrics for predicting maintainability. The empirical validation using a popu- lar large-scale open source system reveals that some metrics have shown a stronger correlation with a proxy for maintainability in use. This study provides important empirical evidence towards a better understanding of source code attributes and maintainability in practice. However, a single case and a retrospective study are insufficient to establish a cause effect relation. Therefore, further replications of our study design with more diverse cases can increase the confidence in the predictive ability and thus the usefulness of the proposed metrics.

Organizations are expected by their shareholders to continually deliver above industry returns on capital invested and to remain competitive in the industry of choice through productivity, safety and quality. The maintenance function is a key area in which competitiveness through efficiencies and world–class performance can be attained by focusing on the prevention and reduction of long and costly equipment repair times. The question is: how can the mean time to repair of equipment already installed in the plant be reduced? To answer the above question correctly and comprehensively, the research explored mixed methods in finding answers. Quantitative methodology using a survey was used for data collection. Observations and interviews were held with maintenance personnel to uncover information that couldn’t have been obtained by means of a survey. The survey was limited to equipment performance measures, human factors, environmental factors, planning, spare parts, maintainability, procedures and training. To test consistency and accuracy of representation of the total population under study, a reliability test was done by using Cronbach’s alpha coefficient. To determine whether there are any differences between groups, an ANOVA test was used. Cohen’s d–value was used to determine practically significant differences between one set of data with another and correlation analysis was used to determine the relationships between the variables. The approach designed and delivered by this research flowed from the existing body of knowledge, case studies and survey findings. The approach adopts some of the elements of the failure mode and effects analysis (FMEA) procedure and differs from other work that has been done by others by taking into account the competency and experience of maintenance personnel and assigning to them factors which are used to compute anew MTTR of the equipment. The cost of implementing the recommended corrective actions for realising the new MTTR is determined and evaluated against an improved equipment availability that will be achieved as a result of the recommended corrective actions assuming that the failure rate of the equipment remains constant. This evaluation step imbedded within the approach is valuable for the maintenance function and management for decision making in ensuring that resources at the organization’s disposal are used productively. Validation and test results of the approach showed that the MTTR of equipment installed in the plant can be reduced. The results also indicated that through the use of the designed approach a regular pattern of repair or replacement times can be followed well in advance and that it is practical, user friendly and it also delivers on its objective of offering a structure for analysis and decision making aimed at reducing the MTTR. Included with this dissertation is feedback information that can be included in a maintenance job card feedback section to capture information about factors that can be improved to lower the MTTR as part of a continuous improvement process. Included also is a spare part development and management procedure that can be used by the maintenance function. Recommendations on training of maintenance personnel on the maintainability of equipment, the FMEA procedure and maintenance procedures are highlighted. Information that flowed from this approach will be valuable for continuous plant performance improvement and during the design, installation and operation stages of a blast furnace. / Thesis (M.Ing. (Development and Management Engineering))--North-West University, Potchefstroom Campus, 2012.

Organizations are expected by their shareholders to continually deliver above industry returns on capital invested and to remain competitive in the industry of choice through productivity, safety and quality. The maintenance function is a key area in which competitiveness through efficiencies and world–class performance can be attained by focusing on the prevention and reduction of long and costly equipment repair times. The question is: how can the mean time to repair of equipment already installed in the plant be reduced? To answer the above question correctly and comprehensively, the research explored mixed methods in finding answers. Quantitative methodology using a survey was used for data collection. Observations and interviews were held with maintenance personnel to uncover information that couldn’t have been obtained by means of a survey. The survey was limited to equipment performance measures, human factors, environmental factors, planning, spare parts, maintainability, procedures and training. To test consistency and accuracy of representation of the total population under study, a reliability test was done by using Cronbach’s alpha coefficient. To determine whether there are any differences between groups, an ANOVA test was used. Cohen’s d–value was used to determine practically significant differences between one set of data with another and correlation analysis was used to determine the relationships between the variables. The approach designed and delivered by this research flowed from the existing body of knowledge, case studies and survey findings. The approach adopts some of the elements of the failure mode and effects analysis (FMEA) procedure and differs from other work that has been done by others by taking into account the competency and experience of maintenance personnel and assigning to them factors which are used to compute anew MTTR of the equipment. The cost of implementing the recommended corrective actions for realising the new MTTR is determined and evaluated against an improved equipment availability that will be achieved as a result of the recommended corrective actions assuming that the failure rate of the equipment remains constant. This evaluation step imbedded within the approach is valuable for the maintenance function and management for decision making in ensuring that resources at the organization’s disposal are used productively. Validation and test results of the approach showed that the MTTR of equipment installed in the plant can be reduced. The results also indicated that through the use of the designed approach a regular pattern of repair or replacement times can be followed well in advance and that it is practical, user friendly and it also delivers on its objective of offering a structure for analysis and decision making aimed at reducing the MTTR. Included with this dissertation is feedback information that can be included in a maintenance job card feedback section to capture information about factors that can be improved to lower the MTTR as part of a continuous improvement process. Included also is a spare part development and management procedure that can be used by the maintenance function. Recommendations on training of maintenance personnel on the maintainability of equipment, the FMEA procedure and maintenance procedures are highlighted. Information that flowed from this approach will be valuable for continuous plant performance improvement and during the design, installation and operation stages of a blast furnace. / Thesis (M.Ing. (Development and Management Engineering))--North-West University, Potchefstroom Campus, 2012.

The interruption cost for one hour of a petrochemical plant is 33 times higher than that of the average interruption cost for industrial plants across all industries. In addition to the high cost of loss of production, interruptions to the operations of petrochemical and gas-toliquid plants pose safety and environmental hazards. Thus it is necessary to better understand the reliability requirements of petrochemical and gas-to-liquid plants. This study investigated the reliability of electrical distribution networks used in petrochemical and gas-to-liquid plants compared to those used in other industrial plants. A model was developed that can be used to establish the adequacy of the reliability of a distribution network in terms of the components and network topologies used. This model was validated against data that had been collected by the IEEE and applied to an actual petrochemical plant. Over 19 years’ worth of data regarding the trips that have occurred on the distribution network of an existing petrochemical plant was collected and manipulated in order to calculate the reliability indices associated with the equipment used to make up thisRecommended Practice for the Design of Reliable Industrial and Commercial Power Systems. The cost of loss of production and the capital costs associated with increased reliability were calculated for a section of the existing petrochemical plant. The reliability associated with different network topologies that could possibly be used to supply power to this section of the plant were modelled using an appropriate software package. The resulting total cost of ownership over the life of the plant associated with each topology was then calculated in order to establish which network topology is the most appropriate for petrochemical and gas-to-liquid plants. It was concluded the components that affect the reliability of an industrial distribution network are different to those that affect a utility distribution network. These components were listed and compared. It was found that the reliability indices that were calculated for the components that affect the reliability of a petrochemical plant were similar to those provided by the IEEE. 17 out of 20 of the indices that were calculated were within the required factor of deviation. Generally the failure rates of components used in petrochemical plants were very similar to those given in the IEEE Gold Book, while the MTTR’s for the components used in petrochemical plants were found to be slightly better than those given in the IEEE Gold Book. The effect of network topology was found to be significant, with small changes in the topology of a network resulting in large variations in the reliability of the network. It was also found that the most appropriate type of network topology to use in the design of the electrical distribution network of a petrochemical plant is the dual radial network. This is the most conservative of the commonly used network topologies and is the one that is currently used in the existing plant that was studied. Due to the high cost of loss of production in petrochemical plants it was established that any incremental improvement in the reliability of the dual radial network would be beneficial to the total cost of ownership of such a plant. Such incremental improvement of the reliability of the distribution network could be cost effectively achieved by adopting a conservative maintenance strategy and the establishment of a conservative spares inventory. Before this study was undertaken, there was no literature around the reliability of electrical distribution networks that focused specifically on petrochemical and gas-to-liquid plants. This study produced a set of reliability indices and a model that electrical engineers can use in the reliability analysis of petrochemical and gas-to-liquid plants. Furthermore it shows that, because the cost of loss of production in petrochemical plants is so high, the most conservative distribution network design and maintenance philosophies should always be used. distribution network. These reliability indices were compared to those given by the IEEE / Dissertation (MEng)--University of Pretoria, 2013. / gm2014 / Electrical, Electronic and Computer Engineering / unrestricted

The purpose of this thesis is to implement Total Productive Maintenance (TPM) in Nigeria Plastics Manufacturing Company. Manufacturing companies round the world pay huge amount of money for purchasing new equipments to boost their production however nothing or little is done to achieve or obtain full output from the machine for which it is intended to do. Small losses in time or deviations from planned or calculated capability are taken as usual machine performance. But currently as a result of improved capability levels and demand of quality product at lower prices, purchasing latest machine/equipment is not a way out unless it is completely used. Total Productive Maintenance (TPM) is a method that involve everybody totally, from high management to all workers to implement a complete maintenance program for all machine/equipment during its life. This method ends up in most effectiveness of tools, equipment, virtuously improved workers, tidy up working area, neat and clean working environment. A structure is going to be developed with the potential of evaluating the impact of implementing total productive maintenance within. By evaluating the result or outcome of Total Productive Maintenance (TPM), manufacturing companies can create sensible/smart decisions to improve the potency and standard of the machine, equipment and also the product on XYZ Plastics Manufacturing Company in Nigerian.

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