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No description available.

Parallel optical interconnects (POI) have attracted a great deal of attention in the past two decades as the system bandwidth continues to increase. Optical interconnects are known to have more advantages than their electrical counterparts in many aspects such as crosstalk, bandwidth distance product, power consumption, and RC time delay. The parallelization of several optical links is also an effective method to increase the aggregate data rate while keeping the component count manageable and to reduce the unit cost of optics, electronics, and packaging at lower line rate. / Parallel optical transceiver modules running at several gigabits per second are commercially available nowadays. Parallel optical receivers are one of the key components of parallel interconnected systems. In this work, we describe how a low-power parallel CMOS preamplifier IC and a deskew IC have been designed and fabricated through the IBM 0.13mum CMOS technology. The performances of three different transimpedance amplifier (TIA) topologies are compared experimentally. The best of the three TIAs shows a differential gain of 56.2dBO, 2.6GHz bandwidth, and less than -16dBm sensitivity with a bit-error-rate (BER) less than 10-12. The TIA consumes 2.5mW of power from a 1.2V supply while the channel power is 22mW with a 400mV pp differential output swing. / A novel method of accurately measuring the crosstalk power penalty with an on-chip PRBS generator is proposed and its implementation is described. The use of an on-chip PRBS generator to drive the dummy channels eliminates the data pattern dependence between the aggressors and the victim. The inevitable channel skew associated with parallel channels can be removed by a phase-locked loop (PLL) based deskew method. We investigated the skew compensation range of this method theoretically and our experimental results confirm our conclusion. / Various practical design and test techniques such as photodiode modeling, AC coupling, low-pass filtering and continuous skew generation, and their implementations, are discussed and implemented in this thesis.

Thesis (M.S.)--University of Hawaii at Manoa, 2005. / Includes bibliographical references (leaves 95-98). / xii, 98 leaves, bound ill. 29 cm

Thesis (MEng)--University of South Australia, 1995

Thesis (M Eng) -- University of South Australia, 1992

Bibliography: p. 273-286. / xvi, 288 p. : ill. (some col.) ; 30 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 1999

175 leaves : ill. (part col.) tables, graphs ; 30 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical Engineering, 1978

Thesis (M Eng) -- University of South Australia, 1992