Les convertisseurs analogique-numérique à entrelacement temporel (TIADC) semblent être une solution prometteuse dans le monde de la conversion analogique-numérique. Leur fréquence d’échantillonnage peut théoriquement être augmentée en augmentant le nombre de convertisseurs en parallèle. En réalité, des désappariements entre les convertisseurs peuvent fortement dégrader les performances, particulièrement à haute fréquence d’échantillonnage ou à haute résolution. Ces défauts d’appariement peuvent être réduits en utilisant des techniques de calibration en arrière-plan. La première partie de cette thèse est consacrée à l’étude des sources et effets des différents types de désappariements dans un TIADC. Des indicateurs de performance tels que le SNDR ou la SFDR sont exprimés en fonction du niveau des désappariements. Dans la deuxième partie, des nouvelles techniques de calibration sont proposées. Ces techniques permettent de réduire les effets des désappariements d’offset, de gain, d’instant d’échantillonnage et de bande passante. Les désappariements sont estimés en se basant sur des propriétés statistiques du signal et la reconstruction des échantillons de sortie se fait en utilisant des filtres numériques. La troisième partie démontre les performance d’un TIADC fonctionnant a une fréquence d’échantillonnage de 1.6 GE/s et comprenant les calibration d’offset, de gain et d’instant d’échantillonnage proposées. Les raies fréquentielles dues aux désappariements sont réduites à un niveau de -70dBc jusqu’à une fréquence d’entrée de 750 MHz. Ce circuit démontre une meilleure correction de désappariements que des circuits similaires récemment publiés, et ce avec une augmentation de puissance consommée et de surface relativement faible. / Time-interleaved analog-to-digital converters (TIADC) seem to be the holy grail of analog-to-digital conversion. Theoretically, their sampling speed can be increased, very simply, by duplicating the sub-converters. The real world is different because mismatches between the converters strongly reduce the TIADC performance, especially when trying to push forward the sampling speed, or the resolution of the converter. Using background digital mismatch calibration can alleviate this limitation. The first part of the thesis is dedicated to studying the sources and effects of mismatches in a TIADC. Performance metrics such as the SNDR and the SFDR are derived as a function of the mismatch levels. In the second part, new background digital mismatch calibration techniques are presented. They are able to reduce the offset, gain, skew and bandwidth mismatch errors. The mismatches are estimated by using the statistical properties of the input signal and digital filters are used to reconstruct the correct output samples. In the third part, a 1.6 GS/s TIADC circuit, implementing offset, gain and skew mismatch calibration, demonstrates a reduction of the mismatch spurs down to a level of -70 dBFS, up to an input frequency of 750 MHz. The circuit achieves the lowest level of mismatches among TIADCs in the same frequency range, with a reasonable power and area, in spite of the overhead caused by the calibration.

Original sin in economy literature is defined as the inability of countries to borrow in domestic currency from abroad (even from local markets with long maturities and fixed-rate). There are two dimensions of the problem, international and domestic. In this thesis, some of theories on determinants of international original sin phenomenon are investigated. The results suggest that absolute size of the economy is a significant determinant of the international original sin. Financial and economic development is also found to be necessary in order to redeem from the original sin problem. Existence of strong policies and institutions, monetary credibility, and flexible exchange rate regime are found as other significant factors in terms of explaining the phenomenon. Countries that faces credit market imperfections and poor contract enforcement more prone to original sin problem.

This Bachelor Thesis investigates the inherent conflict of preservation and livelihood, and what can be done to avoid this problem. The purpose of the study is to investigate if there is an enhanced risk of overexploitation in areas in proximity to forest reserves. This assumption is based on the fact that people living in close contact with nature are directly dependent on ecosystem-services for maintaining their livelihood. Hence, preservation of an area could result in degradation, if unprotected areas will have to sustain more people with, for example, firewood and pastoral land. Based on a field study in Babati District, Northern Tanzania, I have seen signs that imply that preservation of Ufiome, the forest covering Mt Kwaraa, has had effects on areas in proximity to the gazetted forest. The method used to conduct this study was semi-structured interviews with local farmers living in closeness to Ufiome NR, but also with district officials. Finally, I think that the solution to many of the problems that come with preservation are possible to handle by the use of Participatory Forest Management (PFM); Joint Forest Management (JFM) and Community Based Forest Management (CBFM). The key to coming to terms with conservational problems lies on scale-related solutions that focuses on implementing management of natural resources on a local level, claiming that fine-scale ecological issues are best dealt with on fine-scale social levels.

Time-interleaved analog-to-digital converters make use of parallelization to increase the rate at which an analog signal can be digitized. Using M channels at their maximum sampling frequency allows for an overall sampling frequency of M times the individual converters' sampling rate. However, the performance of interleaved systems suffers from mismatches between the sub-converters. Offset mismatches, gain mismatches, and timing mismatches all contribute to the degradation of the resolution of the ADC system. Offset and gain mismatches can be corrected for in the digital domain with minimal extra processing. However, the effects of timing mismatches (specifically, the magnitude of the spurious tones that are introduced) are dependent on the frequency of the input, so digital correction is not a trivial task. This makes a circuit-based correction mechanism a much more desirable solution to the problem. This work explores the effect of timing mismatches on interleaved analog-to-digital converter performance. A set of requirements is derived to specify the performance of a variable-delay circuit for the tuning of sample clocks. Since the mismatches can be composed of both fixed and random components, several candidate architectures are modeled for their delay and jitter performance. One candidate is selected for design, based on its jitter performance and on practical considerations. A practical implementation of the clock-adjustment circuit is designed, featuring low-noise differential clock paths with high precision delay adjustment. A means of testing the circuit and verifying the precision of adjustment is presented. The design is implemented for fabrication, and post-layout simulations are shown to demonstrate the feasibility and functionality of the design.

The purpose of this study is to investigate the changes in the inadequate labor force sector of Taiwan before and after the coming Knowledge-Based Economic Time, which is considered as important to this study. The inadequate labor force sector mentioned above consists of inadequate working hours, low paid and mismatches between educational attainment and occupation. The raw data been used was from Manpower Surveys and Manpower Utilization Surveys Taiwan area, Republic of China by Census Bureau in both year 1991 and 2003. The study reveals the following findings. 1.In the inadequate working hours portion Workers who are male, age 35 to 44, married or cohabited, highest educational attainment is primary school or below, private-sector employed, working in north area of Taiwan and taking the roles as agriculture, animal husbandry, forestry & fishing and craft & related trades workers are significantly easier to fall into the inadequate working hours sector. 2. In the low paid portion Workers who are male, married or cohabited, highest educational attainment is primary school or below, own-account workers, workplace is located in middle area of Taiwan, agricultural, animal husbandry, forestry & fishing workers are significantly easier to fall into the low paid sector. 3. In the portion of mismatches between educational attainment and occupation Workers who are male, age 25 to 34, married or cohabited, highest educational attainment is senior high school & vocational school or above, private-sector employed and working in north area of Taiwan are significantly easier to fall into this sector. Especially, workers who take the roles as prod., machine operators and related workers, plant & machine operators & assemblers , and manufacturing share a large proportion. According to the conclusions above, this study provides typical suggestions for government polices toward utilization of labor force. The given comments will be helpful to the relative researchers in the further.

Time-interleaved analog-to-digital converters make use of parallelization to increase the rate at which an analog signal can be digitized. Using M channels at their maximum sampling frequency allows for an overall sampling frequency of M times the individual converters' sampling rate. However, the performance of interleaved systems suffers from mismatches between the sub-converters. Offset mismatches, gain mismatches, and timing mismatches all contribute to the degradation of the resolution of the ADC system. Offset and gain mismatches can be corrected for in the digital domain with minimal extra processing. However, the effects of timing mismatches (specifically, the magnitude of the spurious tones that are introduced) are dependent on the frequency of the input, so digital correction is not a trivial task. This makes a circuit-based correction mechanism a much more desirable solution to the problem. This work explores the effect of timing mismatches on interleaved analog-to-digital converter performance. A set of requirements is derived to specify the performance of a variable-delay circuit for the tuning of sample clocks. Since the mismatches can be composed of both fixed and random components, several candidate architectures are modeled for their delay and jitter performance. One candidate is selected for design, based on its jitter performance and on practical considerations. A practical implementation of the clock-adjustment circuit is designed, featuring low-noise differential clock paths with high precision delay adjustment. A means of testing the circuit and verifying the precision of adjustment is presented. The design is implemented for fabrication, and post-layout simulations are shown to demonstrate the feasibility and functionality of the design.

The study of Spanish in contact with Wayuunaiki has received limited attention in generative and variationist analyses. In particular, the possible influence of this indigenous language on some parts of the Spanish language has not been investigated or has been only briefly addressed. This dissertation aims to fill this existing gap by studying two morpho-syntactic variables: (i) the distribution of null and overt subjects (NOS) as portrayed by the Null Subject Parameter and overt subject personal pronoun (SPP) expression as traditionally researched in variationist studies, and (ii) the issue of subject-verb agreement within the theory of features. To carry out these studies, we collected spontaneous data from 27 Wayuunaiki-Spanish bilinguals and five Spanish monolingual speakers. This Spanish monolingual group served as the vernacular benchmark. The NOS and SPP expression are among the most studied topics in Hispanic linguistics, but they have never been systematically researched in Guajiro Spanish. By analyzing these issues in our dissertation, we want to contribute new data to their study and to the properties and factors affecting them, in order to widen the knowledge of how they function in this Spanish language contact situation. In the generative analysis of the null/overt subjects we investigate whether the distinction that occurs in Wayuunaiki between stative and active verbs and the participants’ proficiency in Spanish have an impact on the distribution of NOS in Guajiro Spanish. In the variationist study, a number of independent variables widely believed to constrain variable SPP expression are factored into the investigation to find out how they behave in this particular language contact situation. These variables include person/number, TAM, switch reference, priming effects, etc. The second research topic is subject-verb agreement. This is only investigated from the generative grammar perspective, specifically by employing the concept of features to explain the nature of the subject-verb mismatches produced by the Wayuunaiki dominant Wayuunaiki-Spanish bilinguals. We specifically investigate whether the Spanish conjugation system poses a problem to the bilingual speakers’ ability to produce the native Spanish verb forms vis-à-vis the monolingual cohort and whether this ability is shaped by the participants’ proficiency in Spanish. The results of the three studies contribute to the field of Hispanic linguistics from three different perspectives. The study of NOS adds a new dimension to the pro-drop parameter: the possible role that Wayuunaiki’s double conjugation may play in the distribution of null and overt subject pronouns in Guajiro Spanish. The variationist study provides new data on the topic of SPP expression in a variety of Spanish which, in this specific case, has as contact language an understudied indigenous language. The analysis of the subject-verb mismatches that occur in Guajiro Spanish allows us to differentiate between the status of null and overt subjects with respect to subject-verb agreement and to differentiate between this contact variety and the Colombian vernacular benchmark.

This thesis is focused on a simulation modelling approach to address the inventory inaccuracy problems in a warehouse operation. The main motivation which led to this research was a desire to investigate the inventory inaccuracy issues that have been highlighted by a logistics company. Previous and current research into inventory inaccuracy issues is largely related to the development of RFID technology as a possible solution to inventory problems. Since the inventory inaccuracy related to RFID technology is focused on the overall measurement of inventory management and retail business, there are differences between this existing research and the research presented in this thesis which is focused on issues of inventory inaccuracy in a warehouse operation. In this thesis, warehouse operation is studied as a detailed sequence of processes that are involved in the flow of items physically in parallel with related information being stored in the computer system. In these processes there are many places where errors can occur in counting or recording details of inventory, or in physically moving, storing or picking items incorrectly. These details of a warehouse operation are used to develop a conceptual model of inventory inaccuracy in warehouse operations. The study also found that typically a product needs to be considered differently at different stages of its progress through a warehouse (and therefore within different sections of the conceptual model). This is because initially batches of a product are likely to be delivered from a supplier, therefore if errors occur soon after the product is delivered to the warehouse, the error might involve the whole batch (for example the batch may be misplaced and put in an incorrect storage location), or the error might involve just part of the batch (for example poor transportation by forklift truck may damage the packaging carton and some of the items within the carton). When the product is stored ready for meeting customer orders, it needs to be considered as individual items (and errors can occur in counting of individual items or individual items may be misplaced or stolen). Finally, when a customer order is received, the product will be picked and grouped to meet the requirements of the order (for example, one order may require 10 of the product whilst another order may require 20 of the product). Errors might again occur to the whole group or to just part of the group. (Continued ...)

<em>Virtual Frameworks</em> for source migration is a methodology to extract classes and interfaces from one or more frameworks used by an application. After migration, a new set of frameworks called virtual frameworks can replace the original frameworks used. The classes and interfaces extracted are used to create a proxy layer for these new frameworks. The application then depends on this proxy layer, and through it the new frameworks, rather than on the original frameworks. A combination of three patterns: Bridge, Adapter, and Proxy are used in these new frameworks. By doing so the changes made to the application source code are minimized during migration.

<em>Virtual Frameworks</em> for source migration is a methodology to extract classes and interfaces from one or more frameworks used by an application. After migration, a new set of frameworks called virtual frameworks can replace the original frameworks used. The classes and interfaces extracted are used to create a proxy layer for these new frameworks. The application then depends on this proxy layer, and through it the new frameworks, rather than on the original frameworks. A combination of three patterns: Bridge, Adapter, and Proxy are used in these new frameworks. By doing so the changes made to the application source code are minimized during migration.