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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Autokompenzace ofsetu operačního zesilovače pro přesná měření / Autocompensation of operational amplifier offset for precise measurement

Prášek, David January 2009 (has links)
This work deals with the problems of the design of two stage operational amplifier with automatic offset compensation for precise measurement. Full design operational amplifier is aimed at appropriate realization in technology CMOS07 with usage Cadence design environment. The goal of the design is minimum offset value as well as the adherence to the parameters of the operational amplifier which are introduced in submission of the thesis.
32

Návrh operačního zesilovače s nízkým napájecím napětím a nízkým příkonem / Design of low voltage low power Op-Amp

Kužílek, Jakub January 2011 (has links)
This work deals with issues of design and optimize of an operational amplifiers using CMOS transistor models. The main focus of work is to propose a circuit suitable for low voltage applications with low power. The proposed circuit consists of sub-circuits, each of which must operate in the desired voltage range. Detailed design of input and output stages will reach range of rail-to-rail type with a minimum quiescent current.
33

Realizace jednoduchých aktivních prvků s komerčně dostupnými BJT/MOS poli / Realization of simple active elements employing commercially available BJT/MOS arrays

Vyčítal, Jaroslav January 2016 (has links)
The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..
34

Realizace jednoduchých aktivních prvků s komerčně dostupnými BJT/MOS poli / Realization of simple active elements employing commercially available BJT/MOS arrays

Vyčítal, Jaroslav January 2016 (has links)
The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..
35

Layout-accurate Ultra-fast System-level Design Exploration Through Verilog-ams

Zheng, Geng 05 1900 (has links)
This research addresses problems in designing analog and mixed-signal (AMS) systems by bridging the gap between system-level and circuit-level simulation by making simulations fast like system-level and accurate like circuit-level. The tools proposed include metamodel integrated Verilog-AMS based design exploration flows. The research involves design centering, metamodel generation flows for creating efficient behavioral models, and Verilog-AMS integration techniques for model realization. The core of the proposed solution is transistor-level and layout-level metamodeling and their incorporation in Verilog-AMS. Metamodeling is used to construct efficient and layout-accurate surrogate models for AMS system building blocks. Verilog-AMS, an AMS hardware description language, is employed to build surrogate model implementations that can be simulated with industrial standard simulators. The case-study circuits and systems include an operational amplifier (OP-AMP), a voltage-controlled oscillator (VCO), a charge-pump phase-locked loop (PLL), and a continuous-time delta-sigma modulator (DSM). The minimum and maximum error rates of the proposed OP-AMP model are 0.11 % and 2.86 %, respectively. The error rates for the PLL lock time and power estimation are 0.7 % and 3.0 %, respectively. The OP-AMP optimization using the proposed approach is ~17000× faster than the transistor-level model based approach. The optimization achieves a ~4× power reduction for the OP-AMP design. The PLL parasitic-aware optimization achieves a 10× speedup and a 147 µW power reduction. Thus the experimental results validate the effectiveness of the proposed solution.
36

Σχεδίαση μιγαδικών φίλτρων χαμηλής τάσης τροφοδοσίας με χρήση CFOAs

Σαμιώτης, Παναγιώτης 20 October 2010 (has links)
Οι συνεχώς αυξανόμενες ανάγκες της σημερινής αγοράς για φορητές ηλεκτρονικές συσκευές και τηλεπικοινωνιακά συστήματα χαμηλής τάσης τροφοδοσίας και χαμηλής κατανάλωσης ισχύος, καθιστά απαραίτητη τη σχεδίαση ενεργών βαθμίδων οι οποίες θα είναι ικανές να λειτουργήσουν σε ένα περιβάλλον όπου μία απλή τάση τροφοδοσίας μικρότερη ή ίση με 1.5V είναι διαθέσιμη. Έτσι, στην εργασία αυτή θα γίνει μια μελέτη διαφορετικών ενεργών βαθμίδων που δύνανται να λειτουργήσουν στο περιβάλλον αυτό, συγκρίνοντας τις δυνατότητες τους. Η μελέτη αυτή αφορά στις ενεργές βαθμίδες CCII και CFOA, καθώς και σε παραλλαγές τους που αφορούν στη λειτουργία των βαθμίδων αυτών με διαφορική τάση εισόδου (DVCCII και DVCFOA).Απώτερος σκοπός της σύγκρισης των βαθμίδων αυτών, αποτελεί η εφαρμογή τους στη σχεδίαση και υλοποίηση μιγαδικών φίλτρων. Έτσι, έπειτα από μία πλήρη περιγραφή των μιγαδικών φίλτρων ώστε να κατανοηθεί η λειτουργία τους, αλλά και των προβλημάτων που εισάγουν την ανάγκη χρήσης τέτοιων φίλτρων, θα μελετηθεί η χρησιμότητα καθεμιάς από τις παραπάνω ενεργές βαθμίδες στη σχεδίαση μιγαδικών φίλτρων ανώτερης τάξης, τα οποία πληρούν τις προδιαγραφές της εκάστοτε τεχνολογίας. Συγκεκριμένα θα γίνει η σχεδίαση και υλοποίηση ενός μιγαδικού φίλτρου 12ης τάξης ικανού να λειτουργεί (κατ’ επιλογή) τόσο για ένα κανάλι μετάδοσης μέσω του πρωτοκόλλου Bluetooth, όσο και για ένα κανάλι μετάδοσης μέσω του πρωτοκόλλου ZigBee.Τελικό βήμα της εργασίας, αποτελεί η φυσική σχεδίαση του κυκλώματος που θα προκύψει, ώστε να επαληθευτεί η ορθή λειτουργία του σε ένα περισσότερο ρεαλιστικό περιβάλλον. / The ever-increasing needs of today's market for portable electronic devices and telecommunication systems of low voltage and low power consumption, necessitates the design of active building blocks that are likely to operate in an environment where a single supply voltage less than or equal to 1.5V is available. Thus, this work will be a study of different active building blocks that may operate in this environment, comparing their abilities. The study refers to active building blocks CCII and CFOA, as well as variations related to their operation involving differential input voltage (DVCCII and DVCFOA). The ultimate goal of comparing these blocks is their application in the design and implementation of complex filters. Thus, after a full description of complex filters to understand their functioning and the problems that introduce the need to use such filters, the usefulness of each of these blocks will be studied in the design of higher-order complex filters, which meet the specifications of each technology. In particular a 12th order complex filter able to function (optional) for both a transmission channel over Bluetooth Protocol, and a transmission channel over ZigBee Protocol, will be designed and implemented. Final step of the work is the physical layout of the circuit, so as to verify the proper functioning in a more realistic environment.
37

Hybridní mikrofonní předzesilovač s plynulou volbou technologie zesilovače / Hybrid microphone preamplifier with variable selection of amplifier technology

Musil, Tomáš January 2017 (has links)
This diploma thesis deals with a basic description of dynamic and condenser microphone, its performance regarding polar patterns and a type of mechanical construction. It also describes a principle of operation of a triode. The thesis deals with selecting of a suitable type of microprocessor to control microphone preamplifier functions. Last part contains a power supply and microphone preamplifier circuits design using a semiconductor and vacuum tube technology.
38

Rychlý datalogger s galvanicky oddělenými měřicími kanály / Fast data logger with galvanically separated measuring channels

Doležel, Jiří January 2018 (has links)
Master‘s thesis deals with analysis solutions and construction of the devices for data collection. At the beginning, they describe the basic types of devices for data collection. In other parts of the work is compared few commercial devices for data collection, under which the requirements will be selected on the proposed device for data collection. In other chapters of the work devoted to the design of schemes and selecting components for their manufacture. The last chapters are devoted to describing the design of device for data collection.
39

Návrh proudového digitálně analogového převodníku pro diferenciální analogový IQ enkodér / Design of current-steering DAC for differential IQ decoder

Klein, Miroslav January 2020 (has links)
This master’s thesis deals with design of two channel digital to analog converter for automotive applications. In first part, different topologies of D/A converters and their properties are discussed, with focus on current steering topology. Second part deals with design of convertor topology and current steering application. In third part, all parts of designed convertor are described and simulations results are presented. The designed two channel D/A converter has differential current output with 11b resolution per channel.
40

Metody návrhu aktivních kmitočtových filtrů na základě pasivního RLC prototypu / Active Frequency Filter Design Methods Based on Passive RLC Prototype

Pisár, Peter January 2009 (has links)
The aim of this diploma thesis is to design active frequency filters based on passive RLC prototype. Three methods of the design of active filters and active functional blocks of electronic circuits working in current or mixed mode are used to this purpose. These blocks allow to process electrical signals with frequencies up to low tens of megahertz. In addition they feature for instance with high slew rate and low supply voltage power. Active high-pass and low-pass 2nd order filters are designed using simulation of inductor by active subcircuit method. Grounded and subsequently floating synthetic inductor is made with the current conveyors in the first case and with the current operational amplifiers with single input and differential output in the second case. This method advantage is relatively simple design and disadvantage is great quantity of active functional blocks. Active filters based on passive frequency ladder 3rd order filter while only one floating inductor is connected, are designed with circuit equation method. In the first design differential input / output current followers are used and in the second case current-differencing buffered amplifiers are used. This method benefits by smaller active blocks number and disadvantage is more complex design of the active filter. Active filter based on passive prototype of low-pass 3rd order filter with two floating inductors is designed with Bruton transformation method. Final active filter uses current operational amplifiers with single input and differential output which together with other passive elements replace frequency depending negative resistor, which arise after previous Bruton transform. This method usage is advantageous if the design consists of larger quantity of inductors and less number of capacitors. High-pass 2nd order filter is simulated by tolerance and parametrical analyses. Physical realisation utilising current feedback operational amplifier which substitute commercially hardly accessible current conveyors is subsequently made. Measurements of constructed active filter show that additional modifications, which allow better amplitude frequency characteristics conformity, are necessary.

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