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As wireless communication becomes an ever-more important and pervasive part of our everyday life, system capacity and quality of service issues are becoming more critical. In order to increase the system capacity and improve the quality of service, it is necessary that we pay closer attention to bandwidth and power efficiency issues. Orthogonal Frequency Division Multiplexing (OFDM) is a multicarrier modulation technique for high speed data transmission and is generally regarded as bandwidth efficient. However, OFDM signals suffer from high peak-to-average power ratios (PARs) which lead to power inefficiency in the RF portion of the transmitter. Moreover, in OFDM, the well-known pilot tone assisted modulation (PTAM) technique utilizes a number of dedicated training pilots to acquire the channel state information (CSI), resulting in somewhat reduced bandwidth efficiency. In this dissertation, we will address the above mentioned bandwidth and power efficiency issues in wireless transmissions. To avoid bandwidth efficiency loss due to dedicated training, we will first develop a superimposed training framework that can be used to track the frequency selective as well as the Doppler shift characteristics of a channel. Later on, we will propose a generalized superimposed training framework that allows improved channel estimates. To improve the power efficiency, we adopt the selected mapping (SLM) framework to reduce the PARs for both OFDM and forward link Code Division Multiple Access (CDMA). We first propose a dynamic SLM algorithm to greatly reduce the computational requirement of SLM without sacrificing its PAR reducing capability. We propose a number of blind SLM techniques for OFDM and for forward link CDMA; they require no side information and are easy to implement. Our proposed blind SLM technique for OFDM is a novel joint channel estimation and PAR reduction algorithm, for which bandwidth efficiency power efficiency - complexity - bit error rate tradeoffs are carefully considered.

The main circuit equipment in an HVDC station must be rated for continuous operation as well as for stresses during ground faults and other short circuits. The component impedances are thus selected for proper operation during both continuous operation and short circuit events. Normally, Electromagnetic Transient (EMT) simulations are performed for the short circuit current ratings, which can leadto time consuming iterations for the optimization of impedance values. Hence, sufficiently correct and handy formulas are useful. For that reason, in this research work, firstly, a thorough literature study is done to gain a deep understanding of the modular multilevel converter (MMC) and its behaviour after aDC pole-to-pole short circuit fault. Two associated simulation models are designed in PSCAD/EMTDC simulation software. The focus of this thesis is on DC pole-topoleshort circuit in Symmetric Monopole HVDC VSC Modular Multilevel Converter (MMC). The desired analytical expression for the steady state fault current is determined byusing mesh analysis and also by applying KCL and it is verified by doing a set of simulations in PSCAD. A detailed sensitivity study has been done in the PSCAD simulation software to understand the influence of the AC converter reactor inductance and the DC smoothing reactor inductance on the steady state as well as peak fault current respectively. From the sensitivity study, the simulated values of peak factor have been obtained. By means of the ratio in between DC side inductance (L_DC) and AC side inductance (L_AC), and by performing a number of calculations, the desired expression for the peak factor is derived. As a result, the peak fault current can be calculated. The calculated value of the peak fault current from the derived formula is compared to the simulated value and validated. An over-estimation is considered for the rating of the equipment. Along with that, the analysis of the effect of impedances of equipment and systems are done and also verified, to better judge the accuracy of the result. In the result, it is found that, the error margin obtained from the derived analytical expression for the steady state value is within 2% of the PSCAD simulated value, which means the error can be safely ignored. Similarly, the value obtained from the derived formula for the peak fault current is within 4% over-estimation margin of the PSCAD simulated value, which is quite good in terms of cost estimation for the rating of the components.