Spelling suggestions: "subject:"pipeline multiplier""
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Design and NMOS implementation of parallel pipelined multiplierChen, Chao-Wu January 1988 (has links)
No description available.
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A Pipelined, Single Precision Floating-Point Logarithm Computation Unit in HardwareChen, Jing 10 1900 (has links)
<p>This thesis is funded by the IBM Center for Advanced Studies</p> / <p>A large number of scientific applications rely on the computing of logarithm. Thus, accelerating the speed of computing logarithms is significant and necessary. To this end, we present the realization of a pipelined Logarithm Computation Unit (LCU) in hardware that uses lookup table and interpolation techniques. The presented LCU supports single precision arithmetic with fixed accuracy and speed. We estimate that it can generate 2.9G single precision values per second under a 65nm fabrication process. In addition, the accuracy is at least 21 bits while lookup table size is about 7.776KB. To the best of our knowledge, our LCU achieves the fastest speed at its current accuracy and table size.</p> / Master of Science (MSc)
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