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Direct Fabrication of Planar Grating by Ultrafast Laser BeamVenkatakrishnan, K., Hee, C.W., Sivakumar, N.R., Ngoi, Kok Ann Bryan 01 1900 (has links)
Femtosecond laser pulse has been used for the machining of the gratings primarily due to its superior advantages over conventional continuous wave (CW) and long pulse lasers for micromachining. In this paper, we develop a novel technique for the fabrication of planar gratings by colliding two beams to generate interference fringes. This technique is simple, fast and low cost. We have successfully fabricated planar gratings on a copper substrate. / Singapore-MIT Alliance (SMA)
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MEMS-compatible integrated hollow waveguides fabricated by buckling self-assemblyEpp, Eric 11 1900 (has links)
This thesis describes the fabrication and characterization of integrated hollow Bragg waveguides fabricated by controlled thin film buckling. Hollow waveguides based on two different set of materials were studied. In the first case, thermal tuning of air-core dimensions was studied using waveguides, with chalcogenide glass and polymer claddings. Results showed that the change in air-
core height as a function of small temperature variations was in good agreement
with theory.
Planar, silicon based, hollow core waveguides with Si/SiO2 Bragg reflector claddings are also described. Fabrication was accomplished by incorporating compressive stress in the sputtered Si and SiO2 layers and then
heating samples to induce buckling along predefined areas of low adhesion. Several low adhesion layers were studied, but a fluorocarbon layer was deposited
by CVD gave the best results. Optical experiments demonstrated optical confinement in the air-core, with loss in the ~5 dB/cm range at the 1550 nm wavelength. / Photonics and Plasmas
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Development and Application of a Planar Cam Measuring SystemTseng, Kuo-Shu 26 July 2000 (has links)
Cam mechanisms are widely utilized for automatic devices in production lines, and the important influences for accuracy of out motions are the kinematic characteristics of follower motions. In order to realize and analyze the influence of the error in manufacturing processes, this research is going to analyze the planar cam-follower motion curve by using the reverse function in a measuring system. The goal of this research is to improve the measuring accuracy and efficiency in a cam measuring system. Results obtained by applying the developed measuring system also compared to those obtained by using a coordinate measuring machine.
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STUDIES OF DUAL-BAND AND BROADBAND PLANAR ANTENNAS FOR WIRELESS COMMUNICATIONSChang, Fa-Shian 30 December 2002 (has links)
Novel broadband designs of planar antenna with an air substrate are proposed in this dissertation, The operating bands considered include the GSM/DCS band and ISM band. Several antenna designs capable of dual- polarized operation, circularly polarized radiation, and diversity operation are also presented.In these antenna designs, prototypes were constructed. The measured input impedance, return loss, radiation pattern, and antenna gain are presented and discussed. The commercially available simulation software are also used in verifying the measured results.As for the broadband planar antenna designs, the impedance bandwidth obtained reaches about 10% (1.5¡G1VSWR). For the circularly polarized designs, we propose a low-cost, broadband circularly polarized patch antenna fed by a coplanar probe feed, and circular polarization (CP) radiation over a wide frequency range (¡Ö10%) can be achieved. High isolation between two feeding ports (S21 less than ¡V30 dB) can be obtained for the constructed prototype of the proposed dual-polarized design. On the other hand, wrapping a planar monopole into a compact box-like structure allows the antenna¡¦s total height less then 5% of the wavelength at 900 MHz. The proposed antennas are suitable for wireless communications applications.
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Design and Modeling of Planar Transformer-based Integrated Passive DevicesWei, Tzu-Chiang 26 July 2008 (has links)
This thesis is mainly composed of two parts. The first part is to introduce the planar transformer-based circuits and their applications. The mixed-mode S parameters and the grounding effects for planar transformers are discussed. A physical model has been developed for modeling the planar transformers. In the second part, a new coil winding technique for planar transformers has been presented to realize a high-efficiency planar transformer with arbitrary turn ratio for power-split/combine and phase-shift applications. Especially, the power-split/combine architecture based on a planar transformer of cellular shape is first presented in this thesis, enabling various kinds of passive components to be widely realized using the integrated passive device processes. As an example, this thesis proposes a design procedure for high-efficiency balun component. Firstly, design a high Q transformer that considers the load impedance effects. Secondly, design the ground reference for un-balanced signal on the virtual ground symmetry axis for balanced signals. Thirdly, design impedance matching networks for minimizing un-balanced and balanced port return losses. Then, a high performance planar transformer-based balun design can be done.
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Planar unijunction transistors for a neuristor realizationWise, Joseph Brinton, 1941- January 1968 (has links)
No description available.
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Embedded Tree Structures and Eigenvalue Statistics of Genus Zero One-Face MapsMcNicholas, Erin Mari January 2006 (has links)
Using numerical simulations and combinatorics, this dissertation focuses on connections between random matrix theory and graph theory.We examine the adjacency matrices of three-regular graphs representing one-face maps. Numerical studies have revealed that the limiting eigenvalue statistics of these matrices are the same as those of much larger, and more widely studied classes of random matrices. In particular, the eigenvalue density is described by the McKay density formula, and the distribution of scaled eigenvalue spacings appears to be that of the Gaussian Orthogonal Ensemble (GOE).A natural question is whether the eigenvalue statistics depend on the genus of the underlying map. We present an algorithm for generating random three-regular graphs representing genus zero one-face maps. Our numerical studies of these three-regular graphs have revealed that their eigenvalue statistics are strikingly different from those of three-regular graphs representing maps of higher genus. While our results indicate that there is a limiting eigenvalue density formula in the genus zero case, it is not described by any established density function. Furthermore, the scaled eigenvalue spacings appear to be described by the exponential distribution function, not the GOE spacing distribution.The embedded graph of a genus zero one-face map is a planar tree, and there is a correlation between its vertices and the primitive cycles of the associated three-regular graph. The second half of this dissertation examines the structure of these embedded planar trees. In particular, we show how the Dyck path representation can be used to recast questions about the probabilistic structure of random planar trees into straightforward counting problems. Using this Dyck path approach, we find:1. the expected number of degree k vertices adjacent to j degree d vertices in a random planar tree, 2. the structure of the planar tree's adjacency matrix under a natural labeling of the vertices, and 3. an explanation for the existence of eigenvalues with multiplicity greater than one in the tree's spectrum.
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Planar chromatography coupled with mass spectrometryMullis, James Onis, Jr. 12 1900 (has links)
No description available.
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MEMS-compatible integrated hollow waveguides fabricated by buckling self-assemblyEpp, Eric Unknown Date
No description available.
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The Design of high-voltage planar transistors with specific reference to the collector region.Smithies, Stafford Alun. January 1984 (has links)
The thesis represents a major contribution to the understanding of
the design and fabrication of high-voltage planar silicon bipolar transistors,
and reports on the original research carried out and the special
methods evolved leading to the successful design, development and industrialization
of two highly specialized transistors. The development of
these transistors, destined for high-reliability applications in subscriber
telephone systems, was funded by the South African Department of Posts
and Telecommunications.
The first device developed was a discrete transistor meeting the
requirements of a singularly difficult specification that included the
following.
An accurately controlled upper limit to quasi-saturation operation,
so that above a collector-emitter voltage of 4 V at 60 mA,
the device characteristics should be extremely linear.
An extremely small range of acceptable gains, with lower and
upper limits of 80 and 180 respectively.
Both accurately reproducible and high breakdown-voltages
exceeding 200 V.
The ability to withstand 100 W pulses of 10ps duration at a case
temperature of 95 °c and a collector-emitter voltage of 130 V.
The second device represents a design and development breakthrough
resulting in a unique high-voltage integrated Darlington transistor incorporating
the following design features.
The standard discrete high-voltage transistors used initially in
the Darlington application were found to fail frequently due to
an external breakdown mechanism under lightning surge conditions,
which are common in South Africa. To overcome this weakness, the
integrated Darlington incorporates a special clamping circuit to
absorb the surge energy non-destructively within the bulk of the
device and thereby prevent external breakdown.
To act as an electrostatic shielding system a new 'inverted
metallization structure' was developed and incorporated in
the Darlington transistor design. With this structure it was
possible to realize transistors with a combination of extremely
high gains, approaching 105 , and very low collector-emitter
leakage currents, often lower than 1 nA at an applied 240 V,
and no device with comparable properties has been reported on
elsewhere.
During the development of the integrated Darlington it was recognized
that there was a necessity for a simple yet accurate method of predicting
quasi-saturation operation. This consideration led to the development of
a totally new, user-orientated, graphical model for predicting the gain of
a transistor when operating in the quasi-saturation mode a model involving
the use of entirely new yet easily measured parameters. The model was
successfully applied to the verification of the Darlington design and the
optimization of processing parameters for the device.
Although undertaken in a research environment, the projects were
handled under pressures normally associated with industrial conditions.
Time schedules were constrained, and this influenced design strategy. As
a consequence, however, the need arose to develop fast and efficient design
aids since much of the theoretical design was implemented for production
without recourse to long-term experimental verification in the laboratory.
Whilst the author viewed this approach as less than ideal, the successful
production of almost two million of these highly specialized devices, including
both types, has lent authority to the design techniques developed.
In spite of the industry-like pressures imposed during the course of
the work, many aspects of the development programmes were further investigated
and refined by research that would have been omitted had the author accepted
the realization of a working device as the only goal. This research has not
only contributed to the production of devices of exceptionally high quality,
but has also produced a wealth of new information valuable to future designers.
These aids include a new and highly accurate correction for the parasitic
collector resistance of a transistor; design data for the specification of
epitaxial layers for transistors with collector-emitter breakdown voltages
ranging between 5 V and 800 V; information on Gate Associated Transistor
(GAT) structures; and the entirely new graphical method, mentioned above,
for modelling saturation effects in bipolar transistors.
Process development was successfully carried out within the strict
confines of compatibility with available equipment, and the pre-requisite that
the existing production of low-voltage bipolar integrated circuits should in
no way be compromised. Successful transfer of the technology, followed by
industrialization, has demonstrated the effectiveness of a method developed
by the author for the rapid communication and dissemination of appropriate
information in a system without precedents for such procedures.
Listed below are other examples showing that useful information was
gathered and new techniques developed.
Emitter-region defects associated with the metallization
process were identified.
Test data were used to monitor project performance and in
the development of data management techniques.
Interaction with the author resulted in the establishment
of the first Quality Assurance and Audit function for microelectronics
activities by the Department of Posts and Telecommunications
in the Republic of South Africa. The group
formed had the authority to handle the certification of semiconductor
capabilities and the qualification for service of
semiconductor components.
An entirely new continuous failure analysis programme was introduced
covering both the products manufactured and similar types
from other sources: a programme that has brought to light the
major failure mechanisms in the high-voltage transistors.
On the basis of the knowledge gained during the research and development
programmes it has been possible to make recommendations, substantiated
by preliminary investigations for further original research work on a new type
of negative-resistance high-voltage device. This would initially be destined
for use in subscriber telephones to improve their immunity to surges, and it
would form the basis of the development of a totally new type of interface
circuit with in-built protection against surges, for application at the subscriber
line interface in electronic exchanges. / Thesis (Ph.D.) - University of Natal, Durban, 1984.
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