Current AlGaN/GaN Heterojunction Field Effect Transistors (HFETs) make use of multiple sources, drains, and gates in parallel to maximize transconductance and effective gain while minimizing the current density through each channel. To connect the sources to a common ground, current practice prescribes the fabrication of air bridges above the gates and drains. This practice has the advantage of a low dielectric constant and low parasitic capacitance, but it is at the expense of manufacturability and robust device operation. In the study described below, the air bridges in AlGaN/GaN HFETs were replaced by a polymer supported metallization bridge with the intention of improving ease of fabrication and reliability. The DC, high frequency, and power performance for several polymer step heights were investigated. The resultant structures were functional and robust; however, their electrical performance was degraded due to high source resistance. The cause of the high source resistance was found to be thinning of the metallization at the polymer step. The effect was more pronounced for higher step heights. / Master of Science

Two issues pertinent to magamp post regulator are treated in this thesis. One of the issues considered is the operation of a magamp under extreme loading conditions. Practical design equations are derived to allow magamp operation under extreme load conditions such as shutdown of output, foldback of output current and very light load (discontinuous operation). The other issue considered concerns with magamp post regulation for a quasi-resonant converter. A magamp circuit is proposed, designed and tested for a zero current switching quasi-resonant forward converter. It demonstrates that output regulation in a quasi-resonant converter can be achieved with a fixed switching frequency operation. It also demonstrates the feasibility of multiple regulated output application of a quasi-resonant converter. / Master of Science

State-plane technique was adopted for analysis of a class of resonant de to de power converters. A comprehensive method was developed to understand the complex operation of a resonant converter, identify its operating modes along with their regions of occurrence and determine the de characteristics of the converter in each mode. The method was shown by application to a series resonant converter (SRC), a parallel resonant converter (PRC) and the family of quasi resonant converters (QRCs). Several major conclusions were experimentally verified. By suitably modifying the method, the effect of parasitic losses on the performance of a SRC was also studied. The operating regions where significant deviations in de characteristics occurred due to losses were also identified. In addition, from the mode and de analysis of a PRC, a novel resonant buck converter with de gain almost insensitive to load variations was proposed. Generalized mode and de analysis applicable to all QRC topological variations were performed using state-plane diagrams. Four sets of mode and de analyses were shown to be adequate to characterize the steady-state operation of nearly a hundred QRC variations. This simplified the understanding and analysis of these converters. Also, two simple circuit rules were introduced using which several QRC topological variations were generated and evaluated based on relative component stresses. The state-plane technique was also used to understand and evaluate different control methods of a SRC. The occurrence of large, undesirable tank energy surges with analog-signal-to-discrete-time-interval-converter (ASDTIC) control was investigated and explained using state-plane trajectories. A new control method called #optimal trajectory control*, which attempts to achieve the fastest response possible was proposed. By exploiting the structure of SRC state portrait, the tank energy is always kept within bounds with this control. Experimental implementation was discussed in detail along with experimental oscillograms which confirm the predicted fast response. / Ph. D.

The Switched Reluctance Motor (hereafter referred to as SRM) requires rotor position information for successful operation. The rotor position, in the present day, is obtained through a mechanical/electrical sensor mounted on the rotor shaft. These transducers are expensive and take additional space on the rotor shaft. An alternative scheme of rotor position sensing is proposed in this thesis which overcomes the disadvantages of existing position sensors. This is achieved by injecting a high frequency control level signal on the stator windings and measuring the response. The response is an indirect measure of the rotor position. The principle, design, and implementation of the sensor is described in this thesis. The proposed sensor is inexpensive compared to the available sensors and is expected to find applications in small and medium size SRM drives. / Master of Science

Electricity is the fastest-growing type of end-use energy consumption in the world, and its generation and usage trends are changing. Hence, the power electronics that control the flow and conversion of electrical energy are an important research area. Advanced power electronics with improved efficiency, power density, reliability, and functionality are critical in data center, transportation, motor drive, renewable energy, and grid applications, among others. Wide-bandgap power semiconductors are enabling power electronics to meet these growing demands, and have thus begun appearing in commercial products, such as traction and solar inverters. Looking ahead, even greater strides can be made in medium-voltage systems due to the development of silicon carbide power devices with voltage ratings exceeding 10 kV. The ability of these devices to switch higher voltages faster and with lower losses than existing semiconductor technologies will drastically reduce the size, weight, and complexity of medium-voltage systems. However, these devices also bring new challenges for designers. This dissertation will present a package for 10 kV silicon carbide power MOSFETs that addresses the enhanced electric fields, greater electromagnetic interference, worsened dynamic imbalance, and higher heat flux issues associated with the packaging of these unique devices. Specifically, due to the low and balanced parasitic inductances, the power module prototype is able to switch at record speeds of tens of nanoseconds with negligible ringing and voltage overshoot. An integrated common-mode current screen contains the current that is generated by these fast voltage transients within the power module, rather than flowing to the system ground. This screen connection simultaneously increases the partial discharge inception voltage by reducing the electric field strength at the triple point of the insulating ceramic substrate. Further, field-grading plates are used in the bus bar to reduce the electric field strength at the module terminations. The heat flux is addressed by employing direct-substrate, jet-impingement cooling. The cooler is integrated into the module housing for increased power density. / Ph. D. / Electricity is the fastest-growing type of end-use energy consumption in the world, and its generation and usage trends are changing. Hence, the power electronics that control the flow and conversion of electrical energy are an important research area. Advanced power electronics with improved efficiency, power density, reliability, and functionality are critical in data center, transportation, motor drive, renewable energy, and grid applications, among others. Wide-bandgap power semiconductors are enabling power electronics to meet these growing demands, and have thus begun appearing in commercial products, such as traction and solar inverters. Looking ahead, even greater strides can be made in medium-voltage systems due to the development of silicon carbide power devices with voltage ratings exceeding 10 kV. The ability of these devices to switch higher voltages faster and with lower losses than existing semiconductor technologies will drastically reduce the size, weight, and complexity of medium-voltage systems. However, these devices also bring new challenges for designers. This dissertation will present a package for 10 kV silicon carbide power MOSFETs that addresses the enhanced electric fields, greater electromagnetic interference, worsened dynamic imbalance, and higher heat flux issues associated with the packaging of these unique devices. Specifically, due to the low and balanced parasitic inductances, the power module prototype is able to switch at record speeds of tens of nanoseconds with negligible ringing and voltage overshoot. An integrated common-mode current screen contains the current that is generated by these fast voltage transients within the power module, rather than flowing to the system ground. This screen connection simultaneously increases the partial discharge inception voltage by reducing the electric field strength at the triple point of the insulating ceramic substrate. Further, field-grading plates are used in the bus bar to reduce the electric field strength at the module terminations. The heat flux is addressed by employing direct-substrate, jet-impingement cooling. The cooler is integrated into the module housing for increased power density.

GaN has the potential to revolutionize the high power electronics industry, enabling high voltage applications and better power conversion efficiency due to its intrinsic material properties and newly available high purity bulk substrates. However, unintentional impurity incorporation needs to be reduced. This reduction can be accomplished by reducing the source of contamination and exploration of extreme growth conditions which reduce the incorporation of these contaminants. Newly available bulk substrates with low threading dislocations allow for better study of material properties, as opposed to material whose properties are dominated by structural and chemical defects. In addition, very thick films can be grown without cracking due to exact lattice and thermal expansion coefficient match. Through chemical and electrical measurements, this work aims to find growth conditions which reduces contamination without a severe impact on growth rate, which is an important factor from an industry standpoint. The proposed thicknesses of these devices are on the order of one hundred microns and requires tight control of the intentional dopants. / Doctor of Philosophy / GaN is a compound semiconductor which has the potential to revolutionize the high power electronics industry, enabling new applications and energy savings due to its inherent material properties. However, material quality and purity requires improvement. This improvement can be accomplished by reducing contamination and growing under extreme conditions. Newly available bulk substrates with low defects allow for better study of material properties. In addition, very thick films can be grown without cracking on these substrates due to exact lattice and thermal expansion coefficient match. Through chemical and electrical measurements, this work aims to find optimal growth conditions for high purity GaN without a severe impact on growth rate, which is an important factor from an industry standpoint. The proposed thicknesses of these devices are on the order of one hundred microns and requires tight control of impurities.

The goal of more efficiently and more reliably realizing energy conversion in the power electronics industry is pushing the limits of current wire bonding packaging technology. Emerging three-dimensional power packaging techniques have shown their potential to replace wire bonding technology down the road. However, these innovative technologies have not yet been fully understood in terms of thermal and thermo-mechanical performance. Therefore, a comparative evaluation between the thermally induced response in conventional wire bonding (a 2-Dimensional technology) and 3-Dimensional packaging technologies is essential. Thermal and thermo-mechanical analysis using the Finite Element Method (FEM) has been performed to evaluate a three-dimensional power module packaged in a Metal Post Interconnected-Parallel Plate Structure (the MPIPPS), and the result is compared with that of a wire bond module. Under the same single-sided cooling conditions, thermal modeling results show a significantly lower junction temperature of 17oC in the MPIPPS module than that in the wire bond module, due to the more uniform heat flow distribution in the MPIPPS module. The top DBC (direct bonded copper) substrate in the MPIPPS module helps direct the excessive heat generated from IGBT (Insulated Gate Bipolar Transistor) chips to diode chips (which dissipates less heat). The maximum junction temperature is reduced to 108 oC in the MPIPPS module by the implementation of double-sided cooling, which the wire bonding technique can not achieve. Subsequent thermo-mechanical analysis reveals the weak points in both modules during temperature cycling and power cycling. In the wire bond module, temperature cycle results have shown more severe stress and strain than that those of the power cycling conditions in the regions where the wires attach the device emitter pads. In the MPIPPS module, the solder joints exhibit high plastic and creep deformation. Power cycling produces more inelastic deformation at the solder joints between the posts and device, due to local over-heating, which causes more severe high-temperature creep deformation. Using a deformation-based thermal fatigue theory, the solder joint fatigue lives are predicted. Compared with the commercial wire bond module temperature cycle test, the fatigue life of MPIPPS is limited. We conclude that the MPIPPS module is better in thermal management but is thermo-mechanically less reliable than the wire bond module. / Master of Science

M.S.

Thermal management is one of many critical tasks in the design of power electronic systems. It has become increasingly important as a result of the introduction of high power density and integrated modules. It has also been realized that higher temperatures do affect reliability due to a variety of physical failure mechanisms that involve thermal stresses and material degradation. Therefore, it is important to consider temperature as design parameter in developing power electronic modules. The NSF Center for Power Electronics System (CPES) at Virginia Tech previously developed a first generation (Gen-I) active Integrated Power Electronics Module (IPEM). This module represents CPES's approach to design a standard power electronic module with low labor and material costs and improved reliability compared to industrial Intelligent Power Modules (IPM). A preliminary Generation II (Gen-II.A) active IPEM was built using embedded power technology, which removes the wire bonds from the Gen-I IPEM. In this module, the three primary heat-generating devices are placed on a direct bonded copper substrate in a multi-chip module format. The overall goal of this research effort was to optimize the thermal performance of this Gen-II.A IPEM. To achieve this goal, a detailed three-dimensional active IPEM was modeled using the thermal-fluid analysis program ESC in I-DEAS to study the thermal performance of the Gen-II.A IPEM. Several design variables including the ceramic material, the ceramic thickness, and the thickness of the heat spreader were modeled to optimize IPEM geometric design and to improve the thermal performance while reducing the footprint. Input variables such as power loss and interface material thicknesses were studied in a sensitivity and uncertainty analysis. Other design constraints such as electrical design and packaging technology were also considered in the thermal optimization of the design. A new active IPEM design named Gen-II.C was achieved with reduced-size and improved thermal and electrical performance. The success of the new design will enable the replacement of discrete components in a front-end DC/DC converter by this standard module with the best thermal and electrical performance. Future improvements can be achieved by replacing the current silicon chip with a higher thermal-conductivity material, such as silicon carbide, as the power density increases, and by, exploring other possible cooling techniques. / Master of Science

Thermal management is a rapidly growing field in power electronics today. As power supply systems are designed with higher power density levels, keeping component temperatures within suitable ranges of their maximum operating limits becomes an increasingly challenging task. This project focuses on thermal management at the system level, using a 1.2 kW front-end power converter as a subject for case study. The establishment of a methodology for using the computer code I-deas to computationally simulate the thermal performance of component temperatures within the system was the primary goal. A series of four benchmarking studies was used to verify the computational predictions. The first test compares predictions of a real system with thermocouple measurements, and the second compares computational predictions with infrared camera and thermocouple measurements on a component mounted to a heat sink. The third experiment involves using flow visualization to verify the presence of vortices in the flow field, and the fourth is a comparison of computational temperature predictions of a DC heater in a controlled flow environment. A radiation study using the Monte Carlo ray-trace method for radiation heat transfer resulted in the reduction of some component temperature predictions of significant components. This radiation study focused on an aspect of heat transfer that is often ignored in power electronics. A component rearrangement study was performed to establish a set of guidelines for component placement in future electronic systems. This was done through the use of a test matrix in which the converter layout was varied a number of different ways in order to help determine thermal effects. Based on the options explored and the electrical constraints on the circuit, an optimum circuit layout was suggested for maximum thermal performance. This project provides a foundation for the thermal management of power electronics at the system level. The use of I-deas as a computational modeling tool was explored, and comparison of the code with experimental measurements helped to explore the accuracy of I-deas as a system level thermal modeling tool. / Master of Science