With the rapid evolving IT technologies, today, the power factor correction (PFC) design is facing many challenges, such as power scalability, high entire-load-range efficiency, and high power density. Power scalability is a very desirable and cost-effective approach in the PFC design in order to keep up with servers' growing power requirements. Higher power density can eventually reduce the converter cost and allows for accommodating more equipment in the existing infrastructures. Driven strongly by economic and environmental concerns, high entire-load-range efficiency is more and more required by various organizations and programs, such as the U.S. Energy Star, Climate Savers, and German Blue Angel. Today, the existing boost PFC is reaching its limitations to meet these challenges simultaneously. Using the cutting-edge semiconductor devices, further efficiency improvement at light load is still needed. There are limited approaches available for increasing the power density due to the large EMI filter and inductor size. Interleaved multi-channel boost PFC is a promising candidate to meet those challenges, but the interleaved boost converter is a less explored area. On the other hand, the multi-channel interleaved buck converter for the VR application has been intensively studied and thoroughly explored. One basic approach of this study is trying to extend the existing knowledge and techniques obtained from multiphase buck converters to the multi-channel interleaved boost converters since there are similarities existed between the multi-phase buck and the multi-channel boost converters. The existing studies about the interleaving impact on the EMI filter design are based on the time domain ripple cancellation effect. This approach is good enough for most of the filter designs. However, unlike the conventional filter designs, the EMI filter design is a specification related process. Both the EMI standard and the EMI measurement are based on the frequency domain spectrum. Limited by the existing analysis approaches, it is difficult to provide a clear picture about how exactly the multi-channel interleaving will impact the EMI filter design. The interleaving impact on the Common Mode (CM) noise also has not been studied in any existing literatures for the same reason. In this study, the frequency domain analysis method was adopted. With the double Fourier integral transformation, a closed-form expression of all the harmonics of the noise sources can be obtained. With all the detailed phase relationship of the switching frequency harmonics and all the side band harmonics, the multi-channel interleaving impact on both the differential mode (DM) and CM filter design can be clearly understood and summarized. According to the design curves provided, the EMI filter size can be effectively reduced by properly choosing the interleaving channel number and the switching frequency. The multi-channel interleaving impact on the output capacitor current ripple is also studied and summarized in this dissertation. It should be pointed out that interleaving only reduces the total input and output current ripples; the inductor current in each channel still has large ripple if small inductance is used. Similar to the multi-phase buck converter, coupling inductors result in different equivalent inductances for input current ripple and inductor current ripple for boost converters. Keeping the inductor current ripple magnitude the same, inverse coupling inductors between the interleaved channels can reduce the inductor size. However, the DM filter size is increased due to larger input current. Based on the investigation on the total magnetic component weight, inverse coupling inductor can reduce the total magnetic component weight. The reduction is more pronounced for lower switching frequency design when the inductor size is dominating among the total magnetic components. Based on the harmonic cancellation, and with all the detailed phase relationship of the switching frequency harmonics and all the side band harmonics, a novel phase angle control method is proposed to maximize the reduction of the EMI filter. For example, in a 2-channel interleaved PFC, just by changing the interleaving scheme to 90 degree phase shift, 39% total volume reduction of the EMI filter can be achieved. The proposed phase angle controlled multi-channel PFC is experimentally demonstrated and verified on a digital controlled 4-channel PFC. The phase angle control method proposed in the multi-channel boost converter can be applied back to the multi-phase buck converter as well. The harmonic cancellation principle will be the same as the multi-channel boost converter. The same benefits can be obtained when the requirement is defined in the frequency domain, e.g. the EMI Standard. The interleaved multi-channel configuration makes it possible to implement the phase-shedding to improve the PFC light load efficiency. By decreasing the number of active channels according to the load, the PFC light load efficiency can be optimized. However, shedding phases can reduce the ripple cancellation effect as well, which will result in the EMI noise increase and losing the benefit on the EMI filter. By applying the proposed phase-shedding with phase angle control strategy, the phase shedding impact on the EMI filter design can be minimized. The light load efficiency can be improved without compromising the EMI filter size. Then, adaptive frequency controlled PFC is proposed to further improve the PFC light load efficiency. The proposed light load efficiency improvement strategies are combined and implemented on the platform of the digital controlled 4-channel PFC. The benefit of improving the light load efficiency is experimentally verified. The EMI performance is also evaluated with the EMI measurement results obtained from the PFC prototype. Following the same approach explored, the benefits of interleaved boost converter can be further extended other applications, such as the boost converter in the Hybrid Electric Vehicles (HEV) and photovoltaic (PV) system. / Ph. D.

The boost power factor correction (PFC) circuit is a common circuit in power electronics. Through years of experience, many designers have optimized the design of these circuits for particular applications. In this study, a new design procedure is presented that guarantees optimal results for any application. The algorithm used incorporates the principles of evolution in order to find the best design. This new design technique requires a rethinking of the traditional design process. Electrical models have been developed specifically for use with the optimization tool. One of the main focuses of this work is the implementation and verification of computationally efficient thermal and electro-magnetic interference (EMI) models for the boost PFC circuit. The EMI model presented can accurately predict noise levels into the 100's of kilohertz range. The thermal models presented provide very fast predictions and they have been adjusted to account for different thermal flows within the layout. This tuning procedure results in thermal predictions within 10% of actual measurement data. In order to further reduce the amount of analysis that the optimization tool must perform, some of the converter design has been performed using traditional methods. This part of the design is discussed in detail. Additionally, a per unit analysis of EMI and thermal levels is introduced. This new analysis method allows EMI and thermal levels to be compared on the same scale thus highlighting the tradeoffs between the both behaviors. / Master of Science

This thesis focuses on the study, implementation and improvement of a digital controller for a power factor correction (PFC) converter. The development of the telecommunications industry and the Internet demands reliable, cost-effective and intelligent power. Nowadays, the telecommunication power systems have output current of up to several kilo amperes, consisting of tens of modules. The high-end server system, which holds over 100 CPUs, consumes tens of kilowatts of power. For mission-critical applications, communication between modules and system controllers is critical for reliability. Information about temperature, current, and the total harmonic distortion (THD) of each module will enable the availability of functions such as dynamic temperature control, fault diagnosis and removal, and adaptive control, and will enhance functions such as current sharing and fault protection. The dominance of analog control at the modular level limits system-module communications. Digital control is well recognized for its communication ability. Digital control will provide the solution to system-module communication for the DC power supply. The PFC converter is an important stage for the distributed power system (DPS). Its controller is among the most complex with its three-loop structure and multiplier/divider. This thesis studies the design method, implementation and cost effectiveness of digital control for both a PFC converter and for an advanced PFC converter. Also discussed is the influence of digital delay on PFC performance. A cost-effective solution that achieves good performance is provided. The effectiveness of the solution is verified by simulation. The three level PFC with range switch is well recognized for its high efficiency. The range switch changes the circuit topology according to the input voltage level. Research literature has discussed the optimal control for both range-switch-off and range-switch-on topologies. Realizing optimal analog control requires a complex structure. Until now optimal control for the three-level PFC with analog control has not been achieved. Another disadvantage of the three-level PFC is the output capacitor voltage imbalance. This thesis proposes an active balancing solution to solve this problem. / Master of Science

Este trabalho apresenta o estudo de um carregador de baterias monofÃsico aplicado a veÃculos elÃtricos. Este carregador à composto por dois estÃgios de processamento de energia e um circuito digital de supervisÃo para controlar a tensÃo sobre o banco de baterias e a corrente de recarga das mesmas. O primeiro estÃgio consiste de um conversor CA-CC bridgeless com caracterÃstica de alto fator de potÃncia, e o segundo estÃgio à representado por um conversor CC-CC fullbridge com isolamento em alta frequÃncia e comutaÃÃo sob tensÃo nula (Zero Voltage Switching â ZVS). Para ambos os conversores, foi realizada uma anÃlise qualitativa e quantitativa, bem como apresentados exemplos de projeto para facilitar o dimensionamento dos componentes. Finalmente, com os componentes escolhidos, foi montado um protÃtipo que permite carregar de uma atà oito baterias de 12 V conectadas em sÃrie. O sistema apresenta como especificaÃÃes: tensÃo de entrada alternada de 220 VÂ15%; tensÃo de saÃda contÃnua de 120 V; corrente de saÃda contÃnua de 20 A; e potÃncia mÃdia de saÃda de 2,4 kW. / This work presents a single-phase battery charger for electric vehicles. This converter is composed by two energy processing stages and a digital circuit to control the voltage across the batteries and their respective charging current. The first stage is a high power factor ACDC bridgeless converter, while the second one consists on a ZVS (Zero Voltage Switching) high frequency isolated DC-DC full-bridge converter. For both converters, the qualitative and quantitative analyses have been performed, as well as design examples have been presented in order to ease the components calculation. Finally, a prototype that allows charging up to eight series-connected 12 V batteries has been built. The system specifications are: AC input voltage of 220 V Â15%; DC output voltage of 120 V; DC output current of 20 A; and average output power of 2.4 kW.

Ce travail vise une exploration et une évaluation de nouvelles variantes de topologies multiniveaux AC/DC non réversibles (PFC) du point de vue de leur sûreté de fonctionnement : recherche d'une grande sécurité électrique sur destruction interne et maintien d'une continuité de fonctionnement. Elles sont caractérisées par une connexion AC non différentielle, un partitionnement cellulaire en série et symétrique autour d'un point milieu. Cette organisation permet d'exploiter la redondance active série entre les cellules d'un même groupe et l'effet de ségrégation topologique qui apparaît entre les deux groupes de cellules. Les structures étudiées sont modulaires et peuvent être parallélisées et étendues à un nombre quelconque de phases. Elles ne possèdent que des cellules mono-transistors basse-tension (Si et SiC 600V max) performantes et intrinsèquement tolérantes aux imperfections de la commande et aux parasites donc naturellement sécurisées. Les comparaisons prenant en compte les pertes, la répartition des pertes, le dimensionnement et le report de contraintes sur défaut interne mettent en avant la structure PFC Double- Boost Flying Cap. à 5 Niveaux, brevetée en début de thèse, comme une solution ayant le meilleur compromis. Sur le plan théorique nous montrons que le seul calcul de la fiabilité basé uniquement sur un critère d'occurrence au premier défaut est inadapté pour décrire ce type de topologie. La prise en compte de la tolérance de panne est nécessaire et permet d'évaluer la fiabilité globalement sur une panne effective (i.e. au second défaut). L'adaptation de modèles théoriques de fiabilité à taux de défaillance constant mais prenant en compte, au niveau de leurs paramètres, le report de contrainte en tension et l'augmentation de température qui résulte d'un premier défaut, permet de chiffrer par intégration et en valeur relative, le gain obtenu sur un temps court. Ce résultat est compatible avec les systèmes embarqués et la maintenance conditionnelle. Un prototype monophasé à 5 niveaux, à commande entièrement numérique et à MLI optimisée reconfigurable en temps réel a été réalisé afin de valider l'étude. Il permet une adaptation automatique de la topologie de 5 à 4 puis à 3 niveaux par exemple. Ce prototype a également servi de banc de test d'endurance du mode de défaillance sur claquage - avalanche de transistors CoolMos™ et diodes SiC, volontairement détruits individuellement dans des conditions d'énergie maîtrisée et reproductibles, afin de prouver expérimentalement le maintien du service sur plusieurs centaines d'heures au prix d'un derating de 30% maximum en puissance seulement. La détection et le diagnostic rapide de défauts internes ont également été traités dans ce travail. D'une part, par la surveillance directe et le seuillage des tensions internes (tensions flottantes) et d'autre part, par une détection harmonique de la fréquence de base (amplitude et phase) en temps réel. Ces deux techniques ont été intégrées numériquement et évaluées sur le prototype, en particulier la seconde qui ne requiert qu'un seul capteur. VI Enfin, nous proposons dans ce travail une nouvelle variante PFC Vienna multicellulaire expérimentée en fin de mémoire, utilisant deux fois moins de transistors et de drivers pour les mêmes performances fréquentielles au prix d'un rendement et d'une répartition des pertes légèrement moins favorables que la structure brevetée.

In this work, single stage power factor corrected AC/DC converters for LEDs / single stage Flyback converter having different configuration from the traditional Flyback and single stage SEPIC converter is investigated. The study involves analysis, circuit design, performance comparisons and implementation. The study covers LEDs / their developments, characteristics and state-of-art in this new technology. The circuits are investigated by means of computer simulations. Operating principles and operating modes are studied along with design calculations. After applying prototypes in laboratory, the simulation results and theoretical analyses are confirmed. The single stage Flyback converter has high voltage input (220-240 Vac), and the output feeds up to 216 HB-LEDs, with the ratings of 24 V, 3.25 A with 90 W. The single stage SEPIC converter with universal input (80-265 Vac) has an output that feeds 21 power LEDs, with 67 V, 0.30 and 20 W ratings.

In this thesis an educational test bench for studying the power quality attributes of the commonly used single-phase full-bridge diode rectifiers with power factor correction (PFC) circuits is designed and tested. This thesis covers the active and passive power factor correction methods for single-phase bridge rectifier. Passive filtering approach with dc side inductor and tuned filter along with active filtering approach via singleswitch boost converter is considered. Analysis, simulation, and design of a single phase rectifier and PFC circuits is followed by hardware implementation and tests. In the active PFC approach, various control methods is applied and compared. The educational bench is aimed to useful for undergraduate and graduate power electronics course, power quality related laboratory studies.

Three novel single-stage electronic ballasts with the advantages of high-power-factor, low current harmonic, high efficiency, and low cost are proposed for rapid-start fluorescent lamps. Included are (1) single-stage high-power-factor electronic ballast with asymmetrical topology, (2) single-stage high- power-factor electronic ballast with symmetrical topology, and (3) single-stage single-switch high-power-factor electronic ballast. The circuit configurations are obtained by integrating the buck-boost power-factor-correction converter into the Class D or the Class E resonant inverter. With simple circuit configuration and less component count, desired circuit performances of high-power-factor and high efficiency are realized. The control methods of pulse-width-modulation (PWM) with asymmetrical and symmetrical approaches are utilized for the three presented ballasts. The buck-boost conversion stage is operated at discontinuous current mode (DCM) to achieve nearly unity power factor at a fixed switching frequency. With carefully designed circuit parameters, the power switches can exhibit either zero-voltage switching-on (ZVS) or zero-current switching-on (ZCS). As a result, high circuit efficiency can be ensured. Design equations are derived and computer analyses are performed based on the lamp¡¦s equivalent resistance model and fundamental approximation. Accordingly, design guidelines for determining circuit parameters are provided. Prototypes of the three proposed circuits designed for a T8-36W lamp, two series-connected T9-40W lamps and a PL-27W lamp are built and tested to verify the computer simulations and analytical predictions.

Η παρούσα διπλωματική εργασία πραγματεύεται την μελέτη και το σχεδιασμό μιας τριφασικής ανορθωτικής διάταξης με την οποία επιτυγχάνεται διόρθωση του συντελεστή ισχύος. Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του Τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών της Πολυτεχνικής Σχολής του Πανεπιστημίου Πατρών. Κύριος σκοπός αυτής της διπλωματικής εργασίας είναι η κατασκευή ενός μετατροπέα ανόρθωσης ανύψωσης ο οποίος λειτουργεί σε ασυνεχή αγωγή και μπορεί να τοποθετηθεί στην έξοδο μιας ανεμογεννήτριας σαν πρώτο στάδιο σύνδεσης με το δίκτυο. Απώτερος σκοπός είναι η πειραματική επιβεβαίωση της θεωρίας καθώς και του μηχανισμού με τον οποίο επιτυγχάνεται η διόρθωση του συντελεστή ισχύος. Αρχικά γίνεται μια γενική αναφορά στην έννοια της ποιότητας ισχύος, τα χαρακτηριστικά της μεγέθη, το συντελεστή ισχύος και τις ανώτερες αρμονικές. Επίσης αναφέρονται βασικές τριφασικές ανορθωτικές διατάξεις με διορθωμένο συντελεστή ισχύος ενώ γίνεται και μια γενική αναφορά στα αιολικά συστήματα, τον τρόπο λειτουργίας τους και την σύνδεση τους με το δίκτυο. Στη συνέχεια, αναλύεται η λειτουργία του μετατροπέα που κατασκευάστηκε κατά την διάρκεια αυτής της διπλωματικής εργασίας, δηλαδή τριφασικής διάταξης ανόρθωσης-ανύψωσης με ένα διακοπτικό στοιχείο, που λειτουργεί στην περιοχή ασυνεχούς αγωγής (DCM). Ο μετατροπέας αυτός θα δέχεται πολική τάση στην είσοδο του 40-100V, ανυψώνοντας την στα 350V στην έξοδο. Παράλληλα το ρεύμα εισόδου έχει μικρό αρμονικό περιεχόμενο επιτυγχάνοντας έναν υψηλό συντελεστή ισχύος. Το επόμενο βήμα είναι η μοντελοποίηση και η προσομοίωση του μετατροπέα σε περιβάλλον Matlab/Simulink έτσι ώστε να εξακριβωθεί η ορθή λειτουργία του σύμφωνα με τη θεωρητική ανάλυση. Τέλος, μελετάται και κατασκευάζεται στο εργαστήριο η πειραματική διάταξη με την οποία διεξάγονται μετρήσεις για την επιβεβαίωση και αξιολόγηση της θεωρητικής μελέτης. / In this diploma thesis the analysis and design of a three phase rectifier achieving high power factor are presented. This work was developed in the Laboratory of Electromechanical Energy Conversion at the Department of Electrical Engineering and Computer Technology of the Polytechnic School, University of Patras, Greece. The main purpose of this diploma thesis is the implementation of a Power Factor Correction Three Phase Rectifier operated in Discontinuous Current Mode (DCM) which can be used as a first stage for the connection of a small wind turbine to the grid. Through this work, the theoretical analysis and the mechanism that achieves the high power factor are verified through the implementation of a laboratory prototype. Initially, the concepts of power quality, power factor and high order harmonics are explained. Furthermore, some common power factor correction rectifier topologies are reported as well as a reference on wind turbines, their operation and their connection to the grid. Secondly, the working principle of the Single Switch Power Factor Correction DCM Boost Rectifier is presented. This converter is designed to rectify and boost the voltage of a small wind turbine, varying between 40 and 100V line to line rms, to 350Vdc. In addition the converter’s input current presents low harmonic distortion which results in a high power factor. The following step is to model and simulate the converter in Matlab/Simulink in order to verify its operation based on the theoretical analysis. Finally, a laboratory prototype is designed and implemented, on which experiments are conducted, in order to verify and evaluate the theoretical study.

In this thesis, a new approach for single-stage power factor correction converters is proposed to increase their power ratings to be in the multiple kilowatts levels. The proposed techniques are based on the utilization of modified three-level resonant converter topologies. These topologies provide low component stresses, high frequency operation, zero voltage switching, applicability under a wide range of input and output conditions as well as added control flexibility. The proposed control algorithms are based on a combination of variable frequency and asymmetrical pulse width modulation control or variable frequency and phase shift modulation control. In either case, the variable frequency control is used to tightly regulate the output voltage, whereas, pulse width or phase shift modulation is used to regulate the dc-bus voltage as well as the input power factor. New converter topologies, their operation and steady state and dynamic analyses are presented in details. A modelling approach based on average multiple frequency methods is also proposed. This approach leads to the development of a full order state space model with the two control variables explicitly separated allowing a better controller design. The model can be used either at high level of detail expressing the non-linearities of the system or it can readily be simplified to a linear decoupled model for approximate solutions. Finally, a discrete time controller for the proposed converters, which is suitable for FPGA implementation, is presented. Analytical, simulation and experimental results are provided to verify the proposed concepts. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2008-01-30 14:28:15.725