Skyrmion is a topologically protected nanometer-sized spin configuration, which makes it a promising candidate for future memory devices. All skyrmion applications are based on the formation and manipulation of spin textures in nanostructured elements. Therefore, fabrication of geometrically confined skyrmion-based nanodevices is an essential step in the investigation of skyrmion properties. In this study, my research mainly focuses on the fabrication of high-quality Fe3Sn2 nanostripes with different geometric parameters for Lorentz transmission electron microscopy (LTEM) by a focused ion beam (FIB) system. The observation of the skyrmions using LTEM was mainly performed by Dr. Qiang Zhang, although I have deeply involved the discussion on new samples to be fabricated based on the results obtained from LTEM and also performed some LTEM experiments. To investigate the formation process and thermal stability of skyrmions in a geometrically confined environment, I have fabricated more than fifty high-quality nanostripes with a width of 265-4,000 nm. Studying with LTEM, a distinct evolutionary path of stripe-skyrmion transformation is observed after gradually increasing the magnetic field (out-of-plane direction) and the critical magnetic field of skyrmion is found to decrease with an increasing strength of confinements. Moreover, a series of racetrack devices with controlled thicknesses (125-404 nm) is fabricated to study the effect of thickness in skyrmion formation. Overall, in order to obtain less damaged, flat skyrmion-based devices by FIB system, experimental parameters are optimized and fabrication skills are improved. This method develops the possible application of centrosymmetric frustrated magnet Fe3Sn2 in skyrmion-based racetrack devices.

Depuis la première observation de désaimantation ultra-rapide dans des films de Ni soumis à une excitation laser pulsée, on a assisté à un grand intérêt de comprendre l'interaction entre les impulsions laser ultra-courtes et l'aimantation. Ces études ont conduit à la découverte de la commutation toute optique de l'aimantation dans un alliage de film ferrimagnétique en utilisant des impulsions laser femtosecondes. La commutation toute optique permet un renversement de l’aimantation d’un matériau magnétique sans champ magnétique externe. La direction de l'aimantation résultante est donnée par la polarisation circulaire droite ou gauche de la lumière. La manipulation de l'aimantation par un faisceau laser a longtemps été limité à un seul type de matériau, mais ce mécanisme s'est avéré être un phénomène plus général qui s’applique à une grande variété de matériaux ferromagnétiques, y compris des alliages, des empilements et des hétérostructures, ainsi que des hétérostructures ferrimagnétiques synthétiques de terres-rares. Récemment, nous avons observé le même phénomène dans des films ferromagnétiques simples, ouvrant ainsi la voie à une intégration de l'écriture toute optique dans les dispositifs spintroniques. De plus, dans des matériaux de type [Co/Pt] ou [Co/Ni] avec une polarisation de spin élevée et une anisotropie magnétique perpendiculaire contrôlable, un mouvement de parois de domaines induit par un courant polarisé peut être observé dans des pistes magnétiques (couple spin-orbite ou couple de transfert de spin), ce qui présente un grand intérêt pour des applications spintroniques basse consommation et de densité élevée, telles que le concept de mémoire racetrack et la logique magnétique. Cependant, la densité de courant requise pour le mouvement des parois de domaines est encore trop élevée pour permettre la réalisation de dispositifs à faible puissance. Dans ce contexte innovant, la recherche effectuée dans le cadre de ma thèse s’est concentrée sur la manipulation de parois de domaines dans les pistes fabriquées à partir de films minces à forte anisotropie magnétique perpendiculaire en combinant à la fois les effets du courant polarisé et ceux de la commutation toute optique. Différents films minces ont été explorés afin d'étudier les effets combinés optiques dépendant de l'hélicité et des couples spin-orbite ou de transfert de spin sur le mouvement des parois de domaines. Nous avons montré que les parois de domaine peuvent rester piégées sous une hélicité circulaire du laser et dépiégées par une hélicité circulaire opposée, et la densité de courant polarisé seuil peut être considérablement réduite en utilisant un laser femtoseconde. Nos résultats sont prometteurs pour le développement de nouveaux dispositifs photoniques-spintroniques de faible puissance. / Since the first observation of ultrafast demagnetization in Ni films arising from a pulsed laser excitation, there has been a strong interest in understanding the interaction between ultrashort laser pulses and magnetization. These studies have led to the discovery of all-optical switching (AOS) of magnetization in a ferrimagnetic film alloy of GdFeCo using femtosecond laser pulses. All-optical switching enables an energy-efficient magnetization reversal of the magnetic material with no external magnetic field, where the direction of the resulting magnetization is given by the right or left circular polarization of the light. The manipulation of magnetization through laser beam has long been restricted to one material, though it turned out to be a more general phenomenon for a variety of ferromagnetic materials, including alloys, multilayers and heterostructures, as well as rare earth free synthetic ferrimagnetic heterostructures. Recently, we have observed the same phenomenon in single ferromagnetic films, thus paving the way for an integration of all-optical writing in spintronic devices. Moreover, in similar materials, like [Co/Pt] or [Co/Ni] with high spin polarization and tunable perpendicular magnetic anisotropy (PMA), efficient current-induced domain wall (DW) motion can be observed in magnetic wires, where spin-orbit torque (SOT) or spin transfer torque (STT) provides a powerful means of manipulating domain walls, which is of great interest for several spintronic applications, such as high-density racetrack memory and magnetic domain wall logic. However, the current density required for domain wall motion is still too high to realize low power devices. This is within this very innovative context that my Ph.D. research has focused on domain wall manipulation in magnetic wires made out of thin film with strong perpendicular magnetic anisotropy combining both spin-polarized current and all-optical switching. Different material structures have been explored, in order to investigate the combined effects of helicity-dependent optical effect and spin-orbit torque or spin transfer torque on domain wall motion in magnetic wires based on these structures. We show that domain wall can remain pinned under one laser circular helicity while depinned by the opposite circular helicity, and the threshold current density can be greatly reduced by using femtosecond laser pulses. Our findings provide novel insights towards the development of low power spintronic-photonic devices.

With the rise of computationally expensive application domains such as machine learning, genomics, and fluids simulation, the quest for performance and energy-efficient computing has gained unprecedented momentum. The significant increase in computing and memory devices in modern systems has resulted in an unsustainable surge in energy consumption, a substantial portion of which is attributed to the memory system. The scaling of conventional memory technologies and their suitability for the next-generation system is also questionable. This has led to the emergence and rise of nonvolatile memory ( NVM ) technologies. Today, in different development stages, several NVM technologies are competing for their rapid access to the market. Racetrack memory ( RTM ) is one such nonvolatile memory technology that promises SRAM -comparable latency, reduced energy consumption, and unprecedented density compared to other technologies. However, racetrack memory ( RTM ) is sequential in nature, i.e., data in an RTM cell needs to be shifted to an access port before it can be accessed. These shift operations incur performance and energy penalties. An ideal RTM , requiring at most one shift per access, can easily outperform SRAM . However, in the worst-cast shifting scenario, RTM can be an order of magnitude slower than SRAM . This thesis presents an overview of the RTM device physics, its evolution, strengths and challenges, and its application in the memory subsystem. We develop tools that allow the programmability and modeling of RTM -based systems. For shifts minimization, we propose a set of techniques including optimal, near-optimal, and evolutionary algorithms for efficient scalar and instruction placement in RTMs . For array accesses, we explore schedule and layout transformations that eliminate the longer overhead shifts in RTMs . We present an automatic compilation framework that analyzes static control flow programs and transforms the loop traversal order and memory layout to maximize accesses to consecutive RTM locations and minimize shifts. We develop a simulation framework called RTSim that models various RTM parameters and enables accurate architectural level simulation. Finally, to demonstrate the RTM potential in non-Von-Neumann in-memory computing paradigms, we exploit its device attributes to implement logic and arithmetic operations. As a concrete use-case, we implement an entire hyperdimensional computing framework in RTM to accelerate the language recognition problem. Our evaluation shows considerable performance and energy improvements compared to conventional Von-Neumann models and state-of-the-art accelerators.

<p>Modern computing platforms, from servers to mobile devices, demand ever-increasing amounts of memory to keep up with the growing amounts of data they process, and to bridge the widening processor-memory gap. A large and growing fraction of chip area and energy is expended in memories, which face challenges with technology scaling due to increased leakage, process variations, and unreliability. On the other hand, data intensive workloads such as machine learning and data analytics pose increasing demands on memory systems. Consequently, improving the energy-efficiency and performance of memory systems is an important challenge for computing system designers.</p> <p>Spintronic memories, which offer several desirable characteristics - near-zero leakage, high density, non-volatility and high endurance - are of great interest for designing future memory systems. However, these memories are not drop-in replacements for current memory technologies, viz. Static Random Access Memory (SRAM) and Dynamic Random Access Memory (DRAM). They pose unique challenges such as variable access times, and require higher write latency and write energy. This dissertation explores new approaches to improving the energy efficiency of spintronic memory systems.</p> <p>The dissertation first explores the design of approximate memories, in which the need to store and access data precisely is foregone in return for improvements in energy efficiency. This is of particular interest, since many emerging workloads exhibit an inherent ability to tolerate approximations to their underlying computations and data while still producing outputs of acceptable quality. The dissertation proposes that approximate spintronic memories can be realized either by reducing the amount of data that is written to/read from them, or by reducing the energy consumed per access. To reduce memory traffic, the dissertation proposes approximate memory compression, wherein a quality-aware memory controller transparently compresses/decompresses data written to or read from memory. For broader applicability, the quality-aware memory controller can be programmed to specify memory regions that can tolerate approximations, and conforms to a specified error constraint for each such region. To reduce the per-access energy, various mechanisms are identified at the circuit and architecture levels that yield substantial energy benefits at the cost of small probabilities of read, write or retention failures. Based on these mechanisms, a quality-configurable Spin Transfer Torque Magnetic RAM (STT-MRAM) array is designed in which read/write operations can be performed at varying levels of accuracy and energy at runtime, depending on the needs of applications. To illustrate the utility of the proposed quality-configurable memory array, it is evaluated as an L2 cache in the context of a general-purpose processor, and as a scratchpad memory for a domain-specific vector processor.</p> <p>The dissertation also explores the design of caches with Domain Wall Memory (DWM), a more advanced spintronic memory technology that offers unparalleled density arising from a unique tape-like structure. However, this structure also leads to serialized access to the bits in each bit-cell, resulting in increased access latency, thereby degrading overall performance. To mitigate the performance overheads, the dissertation proposes a reconfigurable DWM-based cache architecture that modulates the active bits per tape with minimal overheads depending on the application's memory access characteristics. The proposed cache is evaluated in a general purpose processor and improvements in performance are demonstrated over both CMOS and previously proposed spintronic caches.</p> <p>In summary, the dissertation suggests directions to improve the energy efficiency of spintronic memories and re-affirms their potential for the design of future memory systems.</p>

Silicon-on-Insulator (SOI) micro-ring resonators (MRRs) are versatile elements in high-density integrated optics telecommunication systems. However, small inaccuracies in the fabrication process intensely deteriorate the response of SOI MRRs. By utilizing the racetrack resonator structures with strong coupling abilities, one can improve the fabrication tolerance. For the SOI racetrack resonators, the FSR is usually large. By introducing gratings into SOI racetrack resonators, the mutual mode coupling between the clockwise and counterclockwise modes can be induced and result in the resonance splitting. The grating-assisted SOI racetrack resonators can increase the operation wavelength and open up the possibility to overcome this limitation. In this thesis, we first use the 2-D FDTD method with the effective index method (EIM) to obtain the transmission spectra of the SOI racetrack resonators. The transmission spectra are then fitted by using the time-domain coupled mode theory (CMT) to obtain the quality factor and optical parameters of the SOI racetrack resonators. Next, we demonstrate the characteristics of mode splitting resulted from the mutual mode coupling between the clockwise and counterclockwise modes in the grating-assisted racetrack resonators by utilizing both the CMT and the 2-D FDTD method with the EIM. By tuning the grating configurations, such as the length or the structure of sidewall gratings, one can obtain the desired transmission spectrum of the grating-assisted racetrack resonators. Finally, we numerically investigate the temperature-dependent spectral characterics of the grating-assisted SOI racetrack resonator by taking the thermal-optic responce of the SOI materials into account. The thermal sensitivity of this device is 95.38 pm/¢XC, and the calculted properties can help the further designs based on the grating-assisted SOI racetrack resonators.

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Made available in DSpace on 2014-10-09T12:55:12Z (GMT). No. of bitstreams: 0 / Made available in DSpace on 2014-10-09T14:06:01Z (GMT). No. of bitstreams: 0 / O acelerador de elétrons recirculado do tipo microtron, que está sendo construído no Instituto de Física da Universidade de São Paulo, possui algumas centenas de parâmetros a serem monitorados e controlados. Estes parâmetros pertencem a vários subsistemas, tais como: transporte; vácuo; RF; e diagnóstico. Para diminuir a carga cognitiva do operador e auxiliá-lo no controle da máquina, foi construído um sistema de controle computadorizado, capaz de permear os diversos subsistemas e que permite ao operador medir e alterar os parâmetros de interesse, além de alertá-lo quando algum destes parâmetros exceder um valor pré-determinado. Este sistema de controle foi construído usando-se a metodologia do modelo das três camadas lógicas, a saber: camada dos dispositivos de entrada e saída; camada dos servidores de dispositivos; e camada da interface com o usuário. Na camada dos dispositivos de entrada e saída foram utilizados vários equipamentos, comerciais ou construídos no Laboratório do Acelerador Linear (LAL), possuindo interfaces de comunicação diversas. Na camada dos servidores de dispositivos foram utilizados PCs industriais. A camada da interface com o usuário utiliza um PC convencional executando uma interface humano-computador construída com o auxílio do software LabWindows/CVI (National Instruments). O sistema de controle deve apresentar características associadas à flexibilidade, escalabilidade e custo, para que seja passível de utilização durante todo o tempo de vida útil do acelerador e suporte manutenção pela equipe do próprio LAL. / Tese (Doutoramento) / IPEN/T / Instituto de Pesquisas Energeticas e Nucleares - IPEN-CNEN/SP

La miniaturisation du nœud technologique de CMOS en dessous de 90 nm conduit à une forte consommation statique pour les mémoires et les circuits logiques, due aux courants de fuite de plus en plus importants. La spintronique, une technologie émergente, est d’un grand intérêt pour remédier à ce problème grâce à sa non-volatilité, sa grande vitesse d’accès et son intégration facile avec les procédés CMOS. Comparé à la commutation induite par le champ magnétique, le transfert de spin (STT), une approche de commutation induite par le courant, non seulement simplifie le processus de commutation mais aussi permet un fonctionnement sans précédent en termes de consommation et de vitesse. Cette thèse est consacrée à la modélisation compacte et la conception de circuit hybride pour les dispositifs spintroniques basés sur la commutation induite par le courant. La jonction tunnel magnétique (JTM), élément fondamental de la mémoire magnétique (MRAM), et la mémoire racetrack, nouveau concept fondé sur la propagation des parois de domaine induites par le courant, sont particulièrement étudiés. Ces dispositifs et circuits spintroniques sont basés sur les matériaux à anisotropie magnétique perpendiculaire (AMP) qui ouvrent la perspective d’une miniaturisation submicronique tout en conservant une grande stabilité thermique. De nombreux modèles physiques et paramètres réalistes sont intégrés dans la modélisation compacte pour obtenir une bonne cohérence avec les mesures expérimentales. En utilisant ces modèles compacts précis, certaines applications pour la logique et les mémoires magnétiques, tels que l’additionneur complet magnétique (ACM) et la mémoire adressable par contenu (CAM), sont conçues et simulées. Nous analysons et évaluons leur potentiel de performance en termes de surface, vitesse et consommation d’énergie par rapport aux circuits classiques. Enfin, afin de lutter contre la limitation de capacité entravant la large application, nous proposons deux optimisations de conception : la mémoire multivaluée (MLC) pour la STT-MRAM et l’assistance par champ magnétique pour la mémoire racetrack. Ce concept de MLC utilise le comportement stochastique des STT pour atteindre une haute vitesse tout en augmentant la densité de STT-MRAM. La mémoire racetrack assistée par champ magnétique est fondée sur l’observation d’une propagation des parois de domaine en dessous du courant critique, propagation est attribué à l’effet « Walker breakdown ». Ceci ouvre une nouvelle voie pour réduire le courant de propagation et augmenter la capacité des mémoires racetrack au-delà des améliorations des circuits périphériques et des matériaux. / The shrinking of complementary metal oxide semiconductor (CMOS) fabrication node below 90 nm leads to high static power in memories and logic circuits due to the increasing leakage currents. Emerging spintronic technology is of great interest to overcome this issue thanks to its non-volatility, high access speed and easy integration with CMOS process. Spin transfer torque (STT), a current-induced switching approach, not only simplifies the switching process but also provides an unprecedented speed and power performances, compared with the field-induced switching. This thesis is dedicated to the compact modelling and hybrid circuit design for current-induced switching spintronic devices. Magnetic tunnel junction (MTJ), the basic element of magnetic random access memory (MRAM), and racetrack memory, a novel concept based on current-induced domain wall (CIDW) motion, are particularly investigated. These spintronic devices and circuits are based on the materials with perpendicular-magnetic-anisotropy (PMA) that promises the deep submicron miniaturization while keeping a high thermal stability. Numbers of physical models and realistic parameters are integrated in the compact modeling to achieve a good agreement with experimental measurements. By using these accurate compact models of PMA STT MTJ and PMA racetrack memory, some magnetic logic and memory applications, such as magnetic full adder (MFA) and content addressable memory (CAM), are designed and simulated. We analyze and assess their performance potential in terms of speed, area and power consumption compared with the conventional circuits. Finally, in order to tackle the capacity bottleneck hindering the wide application, we propose two design optimizations: MLC for MRAM and magnetic field assistance for racetrack memory. This MLC design benefits from the STT stochastic behavior to achieve an ultra-high speed while increasing the density. The racetrack memory with magnetic field assistance is based on the observation that CIDW motion can be triggered below the critical current due to “Walker breakdown” effect. This opens a new route to reduce the propagation current and increase the capacity of racetrack memory beyond the improvements of peripheral circuits or materials.